2 * This file is part of the libsigrok project.
4 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
21 #define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
23 /* Message logging helpers with subsystem-specific prefix string. */
24 #define LOG_PREFIX "sysclk-lwla"
27 #include "libsigrok.h"
28 #include "libsigrok-internal.h"
32 /* For now, only the LWLA1034 is supported.
34 #define VENDOR_NAME "SysClk"
35 #define MODEL_NAME "LWLA1034"
37 #define USB_VID_PID "2961.6689"
38 #define USB_INTERFACE 0
39 #define USB_TIMEOUT 3000 /* ms */
42 #define TRIGGER_TYPES "01fr"
44 /* Bit mask covering all 34 channels.
46 #define ALL_CHANNELS_MASK (((uint64_t)1 << NUM_PROBES) - 1)
48 /** Unit and packet size for the sigrok logic datafeed.
50 #define UNIT_SIZE ((NUM_PROBES + 7) / 8)
51 #define PACKET_LENGTH 10000 /* units */
53 /** Size of the acquisition buffer in device memory units.
55 #define MEMORY_DEPTH (256 * 1024) /* 256k x 36 bit */
57 /** Number of device memory units (36 bit) to read at a time. Slices of 8
58 * consecutive 36-bit words are mapped to 9 32-bit words each, so the chunk
59 * length should be a multiple of 8 to ensure alignment to slice boundaries.
61 * Experimentation has shown that reading chunks larger than about 1024 bytes
62 * is unreliable. The threshold seems to relate to the buffer size on the FX2
63 * USB chip: The configured endpoint buffer size is 512, and with double or
64 * triple buffering enabled a multiple of 512 bytes can be kept in fly.
66 * The vendor software limits reads to 120 words (15 slices, 540 bytes) at
67 * a time. So far, it appears safe to increase this to 224 words (28 slices,
68 * 1008 bytes), thus making the most of two 512 byte buffers.
70 #define READ_CHUNK_LEN (28 * 8)
72 /** Calculate the required buffer size in 32-bit units for reading a given
73 * number of device memory words. Rounded to a multiple of 8 device words.
75 #define LWLA1034_MEMBUF_LEN(count) (((count) + 7) / 8 * 9)
77 /** Maximum number of 16-bit words sent at a time during acquisition.
78 * Used for allocating the libusb transfer buffer.
80 #define MAX_ACQ_SEND_WORDS 8 /* 5 for memory read request plus stuffing */
82 /** Maximum number of 32-bit words received at a time during acquisition.
83 * Round to the next multiple of the endpoint buffer size to avoid nasty
84 * transfer overflow conditions on hiccups.
86 #define MAX_ACQ_RECV_LEN ((READ_CHUNK_LEN / 8 * 9 + 127) / 128 * 128)
88 /** Maximum length of a register write sequence.
90 #define MAX_REG_WRITE_SEQ_LEN 5
92 /** Default configured samplerate.
94 #define DEFAULT_SAMPLERATE SR_MHZ(125)
96 /** Maximum configurable sample count limit.
98 #define MAX_LIMIT_SAMPLES (UINT64_C(1) << 48)
100 /** Maximum configurable capture duration in milliseconds.
102 #define MAX_LIMIT_MSEC (UINT64_C(1) << 32)
104 /** LWLA1034 FPGA clock configurations.
113 /** Available clock sources.
120 /** Available trigger sources.
122 enum trigger_source {
123 TRIGGER_CHANNELS = 0,
127 /** Available edge choices for the external clock and trigger inputs.
134 /** LWLA device states.
142 STATE_STATUS_REQUEST,
143 STATE_STATUS_RESPONSE,
147 STATE_LENGTH_REQUEST,
148 STATE_LENGTH_RESPONSE,
156 /** LWLA run-length encoding states.
163 /** LWLA sample acquisition and decompression state.
165 struct acquisition_state {
169 /** Maximum number of samples to process. */
170 uint64_t samples_max;
171 /** Number of samples sent to the session bus. */
172 uint64_t samples_done;
174 /** Maximum duration of capture, in milliseconds. */
175 uint64_t duration_max;
176 /** Running capture duration since trigger event. */
177 uint64_t duration_now;
179 /** Capture memory fill level. */
180 size_t mem_addr_fill;
182 size_t mem_addr_done;
183 size_t mem_addr_next;
184 size_t mem_addr_stop;
188 struct libusb_transfer *xfer_in;
189 struct libusb_transfer *xfer_out;
191 unsigned int capture_flags;
195 /** Whether to bypass the clock divider. */
196 gboolean bypass_clockdiv;
198 /* Payload data buffers for incoming and outgoing transfers. */
199 uint32_t xfer_buf_in[MAX_ACQ_RECV_LEN];
200 uint16_t xfer_buf_out[MAX_ACQ_SEND_WORDS];
202 /* Payload buffer for sigrok logic packets. */
203 uint8_t out_packet[PACKET_LENGTH * UNIT_SIZE];
206 /** Private, per-device-instance driver context.
209 /** The samplerate selected by the user. */
212 /** The maximimum sampling duration, in milliseconds. */
215 /** The maximimum number of samples to acquire. */
216 uint64_t limit_samples;
218 /** Channels to use. */
219 uint64_t channel_mask;
221 uint64_t trigger_mask;
222 uint64_t trigger_edge_mask;
223 uint64_t trigger_values;
225 struct acquisition_state *acquisition;
227 struct regval_pair reg_write_seq[MAX_REG_WRITE_SEQ_LEN];
231 enum device_state state;
233 /** The currently active clock configuration of the device. */
234 enum clock_config cur_clock_config;
236 /** Clock source configuration setting. */
237 enum clock_source cfg_clock_source;
238 /** Clock edge configuration setting. */
239 enum signal_edge cfg_clock_edge;
241 /** Trigger source configuration setting. */
242 enum trigger_source cfg_trigger_source;
243 /** Trigger slope configuration setting. */
244 enum signal_edge cfg_trigger_slope;
246 /* Indicates that stopping the acquisition is currently in progress. */
247 gboolean stopping_in_progress;
249 /* Indicates whether a transfer failed. */
250 gboolean transfer_error;
253 SR_PRIV struct acquisition_state *lwla_alloc_acquisition_state(void);
254 SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
256 SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
257 SR_PRIV int lwla_set_clock_config(const struct sr_dev_inst *sdi);
258 SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
259 SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
260 SR_PRIV int lwla_abort_acquisition(const struct sr_dev_inst *sdi);
262 SR_PRIV int lwla_receive_data(int fd, int revents, void *cb_data);
264 #endif /* !LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H */