2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
28 #include "libsigrok.h"
29 #include "libsigrok-internal.h"
32 static const int32_t hwopts[] = {
37 static const int32_t hwcaps[] = {
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
48 static const int32_t analog_hwcaps[] = {
55 static const uint64_t timebases[][2] = {
98 static const uint64_t vdivs[][2] = {
118 #define NUM_TIMEBASE ARRAY_SIZE(timebases)
119 #define NUM_VDIV ARRAY_SIZE(vdivs)
121 static const char *trigger_sources[] = {
146 static const char *coupling[] = {
152 /* Do not change the order of entries */
153 static const char *data_sources[] = {
160 * name, series, protocol flavor, min timebase, max timebase, min vdiv,
161 * digital channels, number of horizontal divs
164 #define RIGOL "Rigol Technologies"
165 #define AGILENT "Agilent Technologies"
166 #define RIGOL_SHORT "Rigol"
167 #define AGILENT_SHORT "Agilent"
169 static const struct rigol_ds_model supported_models[] = {
170 {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
171 {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
172 {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
173 {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
174 {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
175 {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
176 {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
177 {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
178 {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
179 {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
180 {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
181 {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
182 {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
183 {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14},
184 {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
185 {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
186 {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
187 {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
188 {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
189 {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
190 {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
191 {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
192 {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14},
193 {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14},
194 {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
195 {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
196 {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
197 {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
198 {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
199 {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12},
202 SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
203 static struct sr_dev_driver *di = &rigol_ds_driver_info;
205 static void clear_helper(void *priv)
207 struct dev_context *devc;
211 g_free(devc->buffer);
212 g_free(devc->coupling[0]);
213 g_free(devc->coupling[1]);
214 g_free(devc->trigger_source);
215 g_free(devc->trigger_slope);
216 g_slist_free(devc->analog_groups[0].probes);
217 g_slist_free(devc->analog_groups[1].probes);
218 g_slist_free(devc->digital_group.probes);
221 static int dev_clear(void)
223 return std_dev_clear(di, clear_helper);
226 static int set_cfg(const struct sr_dev_inst *sdi, const char *format, ...)
228 struct dev_context *devc = sdi->priv;
232 va_start(args, format);
233 ret = sr_scpi_send_variadic(sdi->conn, format, args);
239 if (devc->model->series == RIGOL_DS1000) {
240 /* The DS1000 series needs this stupid delay, *OPC? doesn't work. */
241 sr_spew("delay %dms", 100);
245 return sr_scpi_get_opc(sdi->conn);
249 static int init(struct sr_context *sr_ctx)
251 return std_init(sr_ctx, di, LOG_PREFIX);
254 static int probe_port(const char *resource, const char *serialcomm, GSList **devices)
256 struct dev_context *devc;
257 struct sr_dev_inst *sdi;
258 struct sr_scpi_dev_inst *scpi;
259 struct sr_scpi_hw_info *hw_info;
260 struct sr_probe *probe;
263 const struct rigol_ds_model *model = NULL;
264 gchar *channel_name, *vendor, **version;
268 if (!(scpi = scpi_dev_inst_new(resource, serialcomm)))
271 if (sr_scpi_open(scpi) != SR_OK) {
272 sr_info("Couldn't open SCPI device.");
277 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
278 sr_info("Couldn't get IDN response.");
284 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
285 if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) &&
286 !strcmp(hw_info->model, supported_models[i].name)) {
287 model = &supported_models[i];
292 if (!strcmp(hw_info->manufacturer, RIGOL))
293 vendor = RIGOL_SHORT;
294 else if (!strcmp(hw_info->manufacturer, AGILENT))
295 vendor = AGILENT_SHORT;
297 vendor = hw_info->manufacturer;
298 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
299 vendor, hw_info->model,
300 hw_info->firmware_version))) {
301 sr_scpi_hw_info_free(hw_info);
312 sdi->inst_type = SR_INST_SCPI;
314 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
315 return SR_ERR_MALLOC;
317 devc->limit_frames = 0;
319 devc->protocol = model->protocol;
321 /* DS1000 models with firmware before 0.2.4 used the old
322 * legacy protocol. */
323 if (model->series == RIGOL_DS1000) {
324 version = g_strsplit(hw_info->firmware_version, ".", 0);
326 if (!version[0] || !version[1] || !version[2])
328 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
330 for (i = 0; i < 3; i++) {
331 if (sr_atol(version[i], &n[i]) != SR_OK)
336 if (n[0] != 0 || n[1] > 2)
338 if (n[1] == 2 && n[2] > 3)
340 sr_dbg("Found DS1000 firmware < 0.2.4, using old protocol.");
341 devc->protocol = PROTOCOL_LEGACY;
346 sr_scpi_hw_info_free(hw_info);
348 for (i = 0; i < model->analog_channels; i++) {
349 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
350 return SR_ERR_MALLOC;
351 probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name);
352 sdi->probes = g_slist_append(sdi->probes, probe);
353 devc->analog_groups[i].name = channel_name;
354 devc->analog_groups[i].probes = g_slist_append(NULL, probe);
355 sdi->probe_groups = g_slist_append(sdi->probe_groups,
356 &devc->analog_groups[i]);
359 if (devc->model->has_digital) {
360 for (i = 0; i < 16; i++) {
361 if (!(channel_name = g_strdup_printf("D%d", i)))
362 return SR_ERR_MALLOC;
363 probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE, channel_name);
364 g_free(channel_name);
366 return SR_ERR_MALLOC;
367 sdi->probes = g_slist_append(sdi->probes, probe);
368 devc->digital_group.probes = g_slist_append(
369 devc->digital_group.probes, probe);
371 devc->digital_group.name = "LA";
372 sdi->probe_groups = g_slist_append(sdi->probe_groups,
373 &devc->digital_group);
376 for (i = 0; i < NUM_TIMEBASE; i++) {
377 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
378 devc->timebases = &timebases[i];
379 if (!memcmp(&devc->model->max_timebase, &timebases[i], sizeof(uint64_t[2])))
380 devc->num_timebases = &timebases[i] - devc->timebases + 1;
383 for (i = 0; i < NUM_VDIV; i++)
384 if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
385 devc->vdivs = &vdivs[i];
387 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
388 return SR_ERR_MALLOC;
389 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
390 return SR_ERR_MALLOC;
392 devc->data_source = DATA_SOURCE_LIVE;
396 *devices = g_slist_append(NULL, sdi);
401 static GSList *scan(GSList *options)
403 struct drv_context *drvc;
404 struct sr_config *src;
408 const gchar *dev_name;
410 gchar *serialcomm = NULL;
414 for (l = options; l; l = l->next) {
418 port = (char *)g_variant_get_string(src->data, NULL);
420 case SR_CONF_SERIALCOMM:
421 serialcomm = (char *)g_variant_get_string(src->data, NULL);
428 if (probe_port(port, serialcomm, &devices) == SR_ERR_MALLOC) {
435 if (!(dir = g_dir_open("/sys/class/usbmisc/", 0, NULL)))
436 if (!(dir = g_dir_open("/sys/class/usb/", 0, NULL)))
438 while ((dev_name = g_dir_read_name(dir))) {
439 if (strncmp(dev_name, "usbtmc", 6))
441 port = g_strconcat("/dev/", dev_name, NULL);
442 ret = probe_port(port, serialcomm, &devices);
446 if (ret == SR_ERR_MALLOC) {
454 /* Tack a copy of the newly found devices onto the driver list. */
455 l = g_slist_copy(devices);
456 drvc->instances = g_slist_concat(drvc->instances, l);
461 static GSList *dev_list(void)
463 return ((struct drv_context *)(di->priv))->instances;
466 static int dev_open(struct sr_dev_inst *sdi)
468 struct sr_scpi_dev_inst *scpi = sdi->conn;
470 if (sr_scpi_open(scpi) < 0)
473 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
476 sdi->status = SR_ST_ACTIVE;
481 static int dev_close(struct sr_dev_inst *sdi)
483 struct sr_scpi_dev_inst *scpi;
484 struct dev_context *devc;
489 if (devc->model->series != RIGOL_VS5000)
490 set_cfg(sdi, ":KEY:LOCK DISABLE");
493 if (sr_scpi_close(scpi) < 0)
495 sdi->status = SR_ST_INACTIVE;
501 static int cleanup(void)
506 static int analog_frame_size(const struct sr_dev_inst *sdi)
508 struct dev_context *devc = sdi->priv;
509 struct sr_probe *probe;
510 int analog_probes = 0;
513 switch (devc->model->series) {
515 return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
517 return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
519 for (l = sdi->probes; l; l = l->next) {
521 if (probe->type == SR_PROBE_ANALOG && probe->enabled)
524 if (devc->data_source == DATA_SOURCE_MEMORY) {
525 if (analog_probes == 1)
526 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C;
528 return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C;
530 if (devc->model->series == AGILENT_DSO1000)
531 return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE;
533 return DS2000_ANALOG_LIVE_WAVEFORM_SIZE;
538 static int digital_frame_size(const struct sr_dev_inst *sdi)
540 struct dev_context *devc = sdi->priv;
542 switch (devc->model->series) {
544 return VS5000_DIGITAL_WAVEFORM_SIZE;
546 return DS1000_DIGITAL_WAVEFORM_SIZE;
552 static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
553 const struct sr_probe_group *probe_group)
555 struct dev_context *devc;
556 struct sr_probe *probe;
559 int analog_channel = -1;
560 float smallest_diff = 0.0000000001;
564 if (!sdi || !(devc = sdi->priv))
567 /* If a probe group is specified, it must be a valid one. */
568 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
569 sr_err("Invalid probe group specified.");
574 probe = g_slist_nth_data(probe_group->probes, 0);
577 if (probe->type == SR_PROBE_ANALOG) {
578 if (probe->name[2] < '1' || probe->name[2] > '4')
580 analog_channel = probe->name[2] - '1';
585 case SR_CONF_NUM_TIMEBASE:
586 *data = g_variant_new_int32(devc->model->num_horizontal_divs);
588 case SR_CONF_NUM_VDIV:
589 *data = g_variant_new_int32(NUM_VDIV);
590 case SR_CONF_DATA_SOURCE:
591 if (devc->data_source == DATA_SOURCE_LIVE)
592 *data = g_variant_new_string("Live");
593 else if (devc->data_source == DATA_SOURCE_MEMORY)
594 *data = g_variant_new_string("Memory");
596 *data = g_variant_new_string("Segmented");
598 case SR_CONF_SAMPLERATE:
599 if (devc->data_source == DATA_SOURCE_LIVE) {
600 samplerate = analog_frame_size(sdi) /
601 (devc->timebase * devc->model->num_horizontal_divs);
602 *data = g_variant_new_uint64(samplerate);
607 case SR_CONF_TRIGGER_SOURCE:
608 if (!strcmp(devc->trigger_source, "ACL"))
610 else if (!strcmp(devc->trigger_source, "CHAN1"))
612 else if (!strcmp(devc->trigger_source, "CHAN2"))
614 else if (!strcmp(devc->trigger_source, "CHAN3"))
616 else if (!strcmp(devc->trigger_source, "CHAN4"))
619 tmp_str = devc->trigger_source;
620 *data = g_variant_new_string(tmp_str);
622 case SR_CONF_TIMEBASE:
623 for (i = 0; i < devc->num_timebases; i++) {
624 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
625 float diff = fabs(devc->timebase - tb);
626 if (diff < smallest_diff) {
627 smallest_diff = diff;
633 *data = g_variant_new("(tt)", devc->timebases[idx][0],
634 devc->timebases[idx][1]);
637 if (analog_channel < 0)
639 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
640 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
641 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
642 if (diff < smallest_diff) {
643 smallest_diff = diff;
649 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
651 case SR_CONF_COUPLING:
652 if (analog_channel < 0)
654 *data = g_variant_new_string(devc->coupling[analog_channel]);
663 static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
664 const struct sr_probe_group *probe_group)
666 struct dev_context *devc;
667 uint64_t tmp_u64, p, q;
674 if (!(devc = sdi->priv))
677 if (sdi->status != SR_ST_ACTIVE)
678 return SR_ERR_DEV_CLOSED;
680 /* If a probe group is specified, it must be a valid one. */
681 if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) {
682 sr_err("Invalid probe group specified.");
688 case SR_CONF_LIMIT_FRAMES:
689 devc->limit_frames = g_variant_get_uint64(data);
691 case SR_CONF_TRIGGER_SLOPE:
692 tmp_u64 = g_variant_get_uint64(data);
693 if (tmp_u64 != 0 && tmp_u64 != 1)
695 g_free(devc->trigger_slope);
696 devc->trigger_slope = g_strdup(tmp_u64 ? "POS" : "NEG");
697 ret = set_cfg(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
699 case SR_CONF_HORIZ_TRIGGERPOS:
700 t_dbl = g_variant_get_double(data);
701 if (t_dbl < 0.0 || t_dbl > 1.0)
703 devc->horiz_triggerpos = t_dbl;
704 /* We have the trigger offset as a percentage of the frame, but
705 * need to express this in seconds. */
706 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
707 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
708 ret = set_cfg(sdi, ":TIM:OFFS %s", buffer);
710 case SR_CONF_TIMEBASE:
711 g_variant_get(data, "(tt)", &p, &q);
712 for (i = 0; i < devc->num_timebases; i++) {
713 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
714 devc->timebase = (float)p / q;
715 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
717 ret = set_cfg(sdi, ":TIM:SCAL %s", buffer);
721 if (i == devc->num_timebases)
724 case SR_CONF_TRIGGER_SOURCE:
725 tmp_str = g_variant_get_string(data, NULL);
726 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
727 if (!strcmp(trigger_sources[i], tmp_str)) {
728 g_free(devc->trigger_source);
729 devc->trigger_source = g_strdup(trigger_sources[i]);
730 if (!strcmp(devc->trigger_source, "AC Line"))
732 else if (!strcmp(devc->trigger_source, "CH1"))
734 else if (!strcmp(devc->trigger_source, "CH2"))
736 else if (!strcmp(devc->trigger_source, "CH3"))
738 else if (!strcmp(devc->trigger_source, "CH4"))
741 tmp_str = (char *)devc->trigger_source;
742 ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
746 if (i == ARRAY_SIZE(trigger_sources))
751 sr_err("No probe group specified.");
752 return SR_ERR_PROBE_GROUP;
754 g_variant_get(data, "(tt)", &p, &q);
755 for (i = 0; i < 2; i++) {
756 if (probe_group == &devc->analog_groups[i]) {
757 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
758 if (vdivs[j][0] != p || vdivs[j][1] != q)
760 devc->vdiv[i] = (float)p / q;
761 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
763 return set_cfg(sdi, ":CHAN%d:SCAL %s", i + 1,
770 case SR_CONF_COUPLING:
772 sr_err("No probe group specified.");
773 return SR_ERR_PROBE_GROUP;
775 tmp_str = g_variant_get_string(data, NULL);
776 for (i = 0; i < 2; i++) {
777 if (probe_group == &devc->analog_groups[i]) {
778 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
779 if (!strcmp(tmp_str, coupling[j])) {
780 g_free(devc->coupling[i]);
781 devc->coupling[i] = g_strdup(coupling[j]);
782 return set_cfg(sdi, ":CHAN%d:COUP %s", i + 1,
790 case SR_CONF_DATA_SOURCE:
791 tmp_str = g_variant_get_string(data, NULL);
792 if (!strcmp(tmp_str, "Live"))
793 devc->data_source = DATA_SOURCE_LIVE;
794 else if (!strcmp(tmp_str, "Memory"))
795 devc->data_source = DATA_SOURCE_MEMORY;
796 else if (devc->model->series >= RIGOL_DS1000Z
797 && !strcmp(tmp_str, "Segmented"))
798 devc->data_source = DATA_SOURCE_SEGMENTED;
810 static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
811 const struct sr_probe_group *probe_group)
813 GVariant *tuple, *rational[2];
816 struct dev_context *devc = NULL;
821 if (key == SR_CONF_SCAN_OPTIONS) {
822 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
823 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
825 } else if (key == SR_CONF_DEVICE_OPTIONS && probe_group == NULL) {
826 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
827 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
831 /* Every other option requires a valid device instance. */
832 if (!sdi || !(devc = sdi->priv))
835 /* If a probe group is specified, it must be a valid one. */
837 if (probe_group != &devc->analog_groups[0]
838 && probe_group != &devc->analog_groups[1]) {
839 sr_err("Invalid probe group specified.");
845 case SR_CONF_DEVICE_OPTIONS:
847 sr_err("No probe group specified.");
848 return SR_ERR_PROBE_GROUP;
850 if (probe_group == &devc->digital_group) {
851 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
852 NULL, 0, sizeof(int32_t));
855 for (i = 0; i < 2; i++) {
856 if (probe_group == &devc->analog_groups[i]) {
857 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
858 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
865 case SR_CONF_COUPLING:
867 sr_err("No probe group specified.");
868 return SR_ERR_PROBE_GROUP;
870 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
874 /* Can't know this until we have the exact model. */
877 sr_err("No probe group specified.");
878 return SR_ERR_PROBE_GROUP;
880 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
881 for (i = 0; i < NUM_VDIV; i++) {
882 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
883 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
884 tuple = g_variant_new_tuple(rational, 2);
885 g_variant_builder_add_value(&gvb, tuple);
887 *data = g_variant_builder_end(&gvb);
889 case SR_CONF_TIMEBASE:
891 /* Can't know this until we have the exact model. */
893 if (devc->num_timebases <= 0)
895 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
896 for (i = 0; i < devc->num_timebases; i++) {
897 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
898 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
899 tuple = g_variant_new_tuple(rational, 2);
900 g_variant_builder_add_value(&gvb, tuple);
902 *data = g_variant_builder_end(&gvb);
904 case SR_CONF_TRIGGER_SOURCE:
906 /* Can't know this until we have the exact model. */
908 *data = g_variant_new_strv(trigger_sources,
909 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
911 case SR_CONF_DATA_SOURCE:
913 /* Can't know this until we have the exact model. */
915 /* This needs tweaking by series/model! */
916 if (devc->model->series == RIGOL_DS2000)
917 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
919 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
928 static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
930 struct sr_scpi_dev_inst *scpi;
931 struct dev_context *devc;
932 struct sr_probe *probe;
933 struct sr_datafeed_packet packet;
936 if (sdi->status != SR_ST_ACTIVE)
937 return SR_ERR_DEV_CLOSED;
942 devc->num_frames = 0;
944 for (l = sdi->probes; l; l = l->next) {
946 sr_dbg("handling probe %s", probe->name);
947 if (probe->type == SR_PROBE_ANALOG) {
949 devc->enabled_analog_probes = g_slist_append(
950 devc->enabled_analog_probes, probe);
951 if (probe->enabled != devc->analog_channels[probe->index]) {
952 /* Enabled channel is currently disabled, or vice versa. */
953 if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1,
954 probe->enabled ? "ON" : "OFF") != SR_OK)
956 devc->analog_channels[probe->index] = probe->enabled;
958 } else if (probe->type == SR_PROBE_LOGIC) {
959 if (probe->enabled) {
960 devc->enabled_digital_probes = g_slist_append(
961 devc->enabled_digital_probes, probe);
962 /* Turn on LA module if currently off. */
963 if (!devc->la_enabled) {
964 if (set_cfg(sdi, ":LA:DISP ON") != SR_OK)
966 devc->la_enabled = TRUE;
969 if (probe->enabled != devc->digital_channels[probe->index]) {
970 /* Enabled channel is currently disabled, or vice versa. */
971 if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index,
972 probe->enabled ? "ON" : "OFF") != SR_OK)
974 devc->digital_channels[probe->index] = probe->enabled;
979 if (!devc->enabled_analog_probes && !devc->enabled_digital_probes)
982 /* Turn off LA module if on and no digital probes selected. */
983 if (devc->la_enabled && !devc->enabled_digital_probes)
984 if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK)
987 if (devc->data_source == DATA_SOURCE_LIVE) {
988 if (set_cfg(sdi, ":RUN") != SR_OK)
990 } else if (devc->data_source == DATA_SOURCE_MEMORY) {
991 if (devc->model->series != RIGOL_DS2000) {
992 sr_err("Data source 'Memory' not supported for this device");
995 } else if (devc->data_source == DATA_SOURCE_SEGMENTED) {
996 sr_err("Data source 'Segmented' not yet supported");
1000 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
1002 /* Send header packet to the session bus. */
1003 std_session_send_df_header(cb_data, LOG_PREFIX);
1005 if (devc->enabled_analog_probes)
1006 devc->channel_entry = devc->enabled_analog_probes;
1008 devc->channel_entry = devc->enabled_digital_probes;
1010 devc->analog_frame_size = analog_frame_size(sdi);
1011 devc->digital_frame_size = digital_frame_size(sdi);
1013 if (devc->model->series < RIGOL_DS1000Z) {
1014 /* Fetch the first frame. */
1015 if (rigol_ds_channel_start(sdi) != SR_OK)
1018 if (devc->enabled_analog_probes) {
1019 if (devc->data_source == DATA_SOURCE_MEMORY) {
1020 /* Apparently for the DS2000 the memory
1021 * depth can only be set in Running state -
1022 * this matches the behaviour of the UI. */
1023 if (set_cfg(sdi, ":RUN") != SR_OK)
1025 if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK)
1027 if (set_cfg(sdi, ":STOP") != SR_OK)
1030 if (rigol_ds_capture_start(sdi) != SR_OK)
1035 /* Start of first frame. */
1036 packet.type = SR_DF_FRAME_BEGIN;
1037 sr_session_send(cb_data, &packet);
1042 static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1044 struct dev_context *devc;
1045 struct sr_scpi_dev_inst *scpi;
1046 struct sr_datafeed_packet packet;
1052 if (sdi->status != SR_ST_ACTIVE) {
1053 sr_err("Device inactive, can't stop acquisition.");
1057 /* End of last frame. */
1058 packet.type = SR_DF_END;
1059 sr_session_send(sdi, &packet);
1061 g_slist_free(devc->enabled_analog_probes);
1062 g_slist_free(devc->enabled_digital_probes);
1063 devc->enabled_analog_probes = NULL;
1064 devc->enabled_digital_probes = NULL;
1066 sr_scpi_source_remove(scpi);
1071 SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1073 .longname = "Rigol DS",
1078 .dev_list = dev_list,
1079 .dev_clear = dev_clear,
1080 .config_get = config_get,
1081 .config_set = config_set,
1082 .config_list = config_list,
1083 .dev_open = dev_open,
1084 .dev_close = dev_close,
1085 .dev_acquisition_start = dev_acquisition_start,
1086 .dev_acquisition_stop = dev_acquisition_stop,