2 * This file is part of the libsigrok project.
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
30 #include <libsigrok/libsigrok.h>
31 #include "libsigrok-internal.h"
35 static const uint32_t scanopts[] = {
40 static const uint32_t drvopts[] = {
44 static const uint32_t devopts[] = {
45 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
46 SR_CONF_SAMPLERATE | SR_CONF_GET,
47 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
48 SR_CONF_NUM_HDIV | SR_CONF_GET,
49 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
50 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_TRIGGER_LEVEL | SR_CONF_GET | SR_CONF_SET,
53 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56 static const uint32_t devopts_cg_analog[] = {
57 SR_CONF_NUM_VDIV | SR_CONF_GET,
58 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
59 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
60 SR_CONF_PROBE_FACTOR | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
63 static const uint64_t timebases[][2] = {
106 static const uint64_t vdivs[][2] = {
129 static const char *trigger_sources_2_chans[] = {
132 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
133 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
136 static const char *trigger_sources_4_chans[] = {
137 "CH1", "CH2", "CH3", "CH4",
139 "D0", "D1", "D2", "D3", "D4", "D5", "D6", "D7",
140 "D8", "D9", "D10", "D11", "D12", "D13", "D14", "D15",
143 static const char *trigger_slopes[] = {
147 static const char *coupling[] = {
151 static const uint64_t probe_factor[] = {
152 1, 2, 5, 10, 20, 50, 100, 200, 500, 1000,
155 /* Do not change the order of entries */
156 static const char *data_sources[] = {
162 static const struct rigol_ds_command std_cmd[] = {
163 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:OFFS?" },
164 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:OFFS %s" },
167 static const struct rigol_ds_command mso7000a_cmd[] = {
168 { CMD_GET_HORIZ_TRIGGERPOS, ":TIM:POS?" },
169 { CMD_SET_HORIZ_TRIGGERPOS, ":TIM:POS %s" },
188 /* short name, full name */
189 static const struct rigol_ds_vendor supported_vendors[] = {
190 [RIGOL] = {"Rigol", "Rigol Technologies"},
191 [AGILENT] = {"Agilent", "Agilent Technologies"},
194 #define VENDOR(x) &supported_vendors[x]
195 /* vendor, series/name, protocol, data format, max timebase, min vdiv,
196 * number of horizontal divs, live waveform samples, memory buffer samples */
197 static const struct rigol_ds_series supported_series[] = {
198 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
199 {50, 1}, {2, 1000}, 14, 2048, 0},
200 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
201 {50, 1}, {2, 1000}, 12, 600, 1048576},
202 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {500, 1}, {500, 1000000}, 14, 1400, 14000},
204 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
205 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
206 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
207 {50, 1}, {2, 1000}, 12, 600, 20480},
208 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
209 {50, 1}, {1, 1000}, 12, 1200, 12000000},
210 [DS4000] = {VENDOR(RIGOL), "DS4000", PROTOCOL_V4, FORMAT_IEEE488_2,
211 {1000, 1}, {1, 1000}, 14, 1400, 14000},
212 [MSO7000A] = {VENDOR(AGILENT), "MSO7000A", PROTOCOL_V4, FORMAT_IEEE488_2,
213 {50, 1}, {2, 1000}, 10, 1000, 8000000},
216 #define SERIES(x) &supported_series[x]
218 * Use a macro to select the correct list of trigger sources and its length
219 * based on the number of analog channels and presence of digital channels.
221 #define CH_INFO(num, digital) \
222 num, digital, trigger_sources_##num##_chans, \
223 digital ? ARRAY_SIZE(trigger_sources_##num##_chans) : (num + 2)
224 /* series, model, min timebase, analog channels, digital */
225 static const struct rigol_ds_model supported_models[] = {
226 {SERIES(VS5000), "VS5022", {20, 1000000000}, CH_INFO(2, false), std_cmd},
227 {SERIES(VS5000), "VS5042", {10, 1000000000}, CH_INFO(2, false), std_cmd},
228 {SERIES(VS5000), "VS5062", {5, 1000000000}, CH_INFO(2, false), std_cmd},
229 {SERIES(VS5000), "VS5102", {2, 1000000000}, CH_INFO(2, false), std_cmd},
230 {SERIES(VS5000), "VS5202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
231 {SERIES(VS5000), "VS5022D", {20, 1000000000}, CH_INFO(2, true), std_cmd},
232 {SERIES(VS5000), "VS5042D", {10, 1000000000}, CH_INFO(2, true), std_cmd},
233 {SERIES(VS5000), "VS5062D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
234 {SERIES(VS5000), "VS5102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
235 {SERIES(VS5000), "VS5202D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
236 {SERIES(DS1000), "DS1052E", {5, 1000000000}, CH_INFO(2, false), std_cmd},
237 {SERIES(DS1000), "DS1102E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
238 {SERIES(DS1000), "DS1152E", {2, 1000000000}, CH_INFO(2, false), std_cmd},
239 {SERIES(DS1000), "DS1052D", {5, 1000000000}, CH_INFO(2, true), std_cmd},
240 {SERIES(DS1000), "DS1102D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
241 {SERIES(DS1000), "DS1152D", {2, 1000000000}, CH_INFO(2, true), std_cmd},
242 {SERIES(DS2000), "DS2072", {5, 1000000000}, CH_INFO(2, false), std_cmd},
243 {SERIES(DS2000), "DS2102", {5, 1000000000}, CH_INFO(2, false), std_cmd},
244 {SERIES(DS2000), "DS2202", {2, 1000000000}, CH_INFO(2, false), std_cmd},
245 {SERIES(DS2000), "DS2302", {1, 1000000000}, CH_INFO(2, false), std_cmd},
246 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
247 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
248 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
249 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, CH_INFO(2, false), std_cmd},
250 {SERIES(DS2000A), "MSO2072A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
251 {SERIES(DS2000A), "MSO2102A", {5, 1000000000}, CH_INFO(2, true), std_cmd},
252 {SERIES(DS2000A), "MSO2202A", {2, 1000000000}, CH_INFO(2, true), std_cmd},
253 {SERIES(DS2000A), "MSO2302A", {1, 1000000000}, CH_INFO(2, true), std_cmd},
254 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, CH_INFO(2, false), std_cmd},
255 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, CH_INFO(4, false), std_cmd},
256 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
257 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
258 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, CH_INFO(2, false), std_cmd},
259 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, CH_INFO(4, false), std_cmd},
260 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
261 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
262 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, CH_INFO(4, false), std_cmd},
263 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
264 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, CH_INFO(4, false), std_cmd},
265 {SERIES(DS1000Z), "DS1074Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
266 {SERIES(DS1000Z), "DS1104Z Plus", {5, 1000000000}, CH_INFO(4, false), std_cmd},
267 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
268 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, CH_INFO(4, true), std_cmd},
269 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
270 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, CH_INFO(4, true), std_cmd},
271 {SERIES(DS4000), "DS4024", {1, 1000000000}, CH_INFO(4, false), std_cmd},
272 /* TODO: Digital channels are not yet supported on MSO7000A. */
273 {SERIES(MSO7000A), "MSO7034A", {2, 1000000000}, CH_INFO(4, false), mso7000a_cmd},
276 static struct sr_dev_driver rigol_ds_driver_info;
278 static void clear_helper(struct dev_context *devc)
283 g_free(devc->buffer);
284 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
285 g_free(devc->coupling[i]);
286 g_free(devc->trigger_source);
287 g_free(devc->trigger_slope);
288 g_free(devc->analog_groups);
291 static int dev_clear(const struct sr_dev_driver *di)
293 return std_dev_clear_with_callback(di, (std_dev_clear_callback)clear_helper);
296 static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
298 struct dev_context *devc;
299 struct sr_dev_inst *sdi;
300 struct sr_scpi_hw_info *hw_info;
301 struct sr_channel *ch;
304 const struct rigol_ds_model *model = NULL;
305 gchar *channel_name, **version;
307 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
308 sr_info("Couldn't get IDN response, retrying.");
311 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
312 sr_info("Couldn't get IDN response.");
317 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
318 if (!g_ascii_strcasecmp(hw_info->manufacturer,
319 supported_models[i].series->vendor->full_name) &&
320 !strcmp(hw_info->model, supported_models[i].name)) {
321 model = &supported_models[i];
327 sr_scpi_hw_info_free(hw_info);
331 sdi = g_malloc0(sizeof(struct sr_dev_inst));
332 sdi->vendor = g_strdup(model->series->vendor->name);
333 sdi->model = g_strdup(model->name);
334 sdi->version = g_strdup(hw_info->firmware_version);
336 sdi->driver = &rigol_ds_driver_info;
337 sdi->inst_type = SR_INST_SCPI;
338 sdi->serial_num = g_strdup(hw_info->serial_number);
339 devc = g_malloc0(sizeof(struct dev_context));
340 devc->limit_frames = 0;
342 devc->format = model->series->format;
344 /* DS1000 models with firmware before 0.2.4 used the old data format. */
345 if (model->series == SERIES(DS1000)) {
346 version = g_strsplit(hw_info->firmware_version, ".", 0);
348 if (!version[0] || !version[1] || !version[2])
350 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
352 for (i = 0; i < 3; i++) {
353 if (sr_atol(version[i], &n[i]) != SR_OK)
358 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
359 if (scpi->firmware_version < 24) {
360 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
361 devc->format = FORMAT_RAW;
368 sr_scpi_hw_info_free(hw_info);
370 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
371 model->analog_channels);
373 for (i = 0; i < model->analog_channels; i++) {
374 channel_name = g_strdup_printf("CH%d", i + 1);
375 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
377 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
379 devc->analog_groups[i]->name = channel_name;
380 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
381 sdi->channel_groups = g_slist_append(sdi->channel_groups,
382 devc->analog_groups[i]);
385 if (devc->model->has_digital) {
386 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
388 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
389 channel_name = g_strdup_printf("D%d", i);
390 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
391 g_free(channel_name);
392 devc->digital_group->channels = g_slist_append(
393 devc->digital_group->channels, ch);
395 devc->digital_group->name = g_strdup("LA");
396 sdi->channel_groups = g_slist_append(sdi->channel_groups,
397 devc->digital_group);
400 for (i = 0; i < ARRAY_SIZE(timebases); i++) {
401 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
402 devc->timebases = &timebases[i];
403 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
404 devc->num_timebases = &timebases[i] - devc->timebases + 1;
407 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
408 if (!memcmp(&devc->model->series->min_vdiv,
409 &vdivs[i], sizeof(uint64_t[2]))) {
410 devc->vdivs = &vdivs[i];
411 devc->num_vdivs = ARRAY_SIZE(vdivs) - i;
415 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
416 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
418 devc->data_source = DATA_SOURCE_LIVE;
425 static GSList *scan(struct sr_dev_driver *di, GSList *options)
427 return sr_scpi_scan(di->context, options, probe_device);
430 static int dev_open(struct sr_dev_inst *sdi)
433 struct sr_scpi_dev_inst *scpi = sdi->conn;
435 if ((ret = sr_scpi_open(scpi)) < 0) {
436 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
440 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
441 sr_err("Failed to get device config: %s.", sr_strerror(ret));
448 static int dev_close(struct sr_dev_inst *sdi)
450 struct sr_scpi_dev_inst *scpi;
451 struct dev_context *devc;
459 if (devc->model->series->protocol == PROTOCOL_V2)
460 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
462 return sr_scpi_close(scpi);
465 static int analog_frame_size(const struct sr_dev_inst *sdi)
467 struct dev_context *devc = sdi->priv;
468 struct sr_channel *ch;
469 int analog_channels = 0;
472 for (l = sdi->channels; l; l = l->next) {
474 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
478 if (analog_channels == 0)
481 switch (devc->data_source) {
482 case DATA_SOURCE_LIVE:
483 return devc->model->series->live_samples;
484 case DATA_SOURCE_MEMORY:
485 return devc->model->series->buffer_samples / analog_channels;
491 static int digital_frame_size(const struct sr_dev_inst *sdi)
493 struct dev_context *devc = sdi->priv;
495 switch (devc->data_source) {
496 case DATA_SOURCE_LIVE:
497 return devc->model->series->live_samples * 2;
498 case DATA_SOURCE_MEMORY:
499 return devc->model->series->buffer_samples * 2;
505 static int config_get(uint32_t key, GVariant **data,
506 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
508 struct dev_context *devc;
509 struct sr_channel *ch;
512 int analog_channel = -1;
513 float smallest_diff = INFINITY;
522 /* If a channel group is specified, it must be a valid one. */
523 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
524 sr_err("Invalid channel group specified.");
529 ch = g_slist_nth_data(cg->channels, 0);
532 if (ch->type == SR_CHANNEL_ANALOG) {
533 if (ch->name[2] < '1' || ch->name[2] > '4')
535 analog_channel = ch->name[2] - '1';
540 case SR_CONF_NUM_HDIV:
541 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
543 case SR_CONF_NUM_VDIV:
544 *data = g_variant_new_int32(devc->num_vdivs);
546 case SR_CONF_DATA_SOURCE:
547 if (devc->data_source == DATA_SOURCE_LIVE)
548 *data = g_variant_new_string("Live");
549 else if (devc->data_source == DATA_SOURCE_MEMORY)
550 *data = g_variant_new_string("Memory");
552 *data = g_variant_new_string("Segmented");
554 case SR_CONF_SAMPLERATE:
555 if (devc->data_source == DATA_SOURCE_LIVE) {
556 samplerate = analog_frame_size(sdi) /
557 (devc->timebase * devc->model->series->num_horizontal_divs);
558 *data = g_variant_new_uint64(samplerate);
560 sr_dbg("Unknown data source: %d.", devc->data_source);
564 case SR_CONF_TRIGGER_SOURCE:
565 if (!strcmp(devc->trigger_source, "ACL"))
567 else if (!strcmp(devc->trigger_source, "CHAN1"))
569 else if (!strcmp(devc->trigger_source, "CHAN2"))
571 else if (!strcmp(devc->trigger_source, "CHAN3"))
573 else if (!strcmp(devc->trigger_source, "CHAN4"))
576 tmp_str = devc->trigger_source;
577 *data = g_variant_new_string(tmp_str);
579 case SR_CONF_TRIGGER_SLOPE:
580 if (!strncmp(devc->trigger_slope, "POS", 3)) {
582 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
585 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
588 *data = g_variant_new_string(tmp_str);
590 case SR_CONF_TRIGGER_LEVEL:
591 *data = g_variant_new_double(devc->trigger_level);
593 case SR_CONF_TIMEBASE:
594 for (i = 0; i < devc->num_timebases; i++) {
595 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
596 float diff = fabs(devc->timebase - tb);
597 if (diff < smallest_diff) {
598 smallest_diff = diff;
603 sr_dbg("Negative timebase index: %d.", idx);
606 *data = g_variant_new("(tt)", devc->timebases[idx][0],
607 devc->timebases[idx][1]);
610 if (analog_channel < 0) {
611 sr_dbg("Negative analog channel: %d.", analog_channel);
614 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
615 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
616 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
617 if (diff < smallest_diff) {
618 smallest_diff = diff;
623 sr_dbg("Negative vdiv index: %d.", idx);
626 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
628 case SR_CONF_COUPLING:
629 if (analog_channel < 0) {
630 sr_dbg("Negative analog channel: %d.", analog_channel);
633 *data = g_variant_new_string(devc->coupling[analog_channel]);
635 case SR_CONF_PROBE_FACTOR:
636 if (analog_channel < 0) {
637 sr_dbg("Negative analog channel: %d.", analog_channel);
640 *data = g_variant_new_uint64(devc->attenuation[analog_channel]);
649 static int config_set(uint32_t key, GVariant *data,
650 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
652 struct dev_context *devc;
661 /* If a channel group is specified, it must be a valid one. */
662 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
663 sr_err("Invalid channel group specified.");
668 case SR_CONF_LIMIT_FRAMES:
669 devc->limit_frames = g_variant_get_uint64(data);
671 case SR_CONF_TRIGGER_SLOPE:
672 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(trigger_slopes))) < 0)
674 g_free(devc->trigger_slope);
675 devc->trigger_slope = g_strdup((trigger_slopes[idx][0] == 'r') ? "POS" : "NEG");
676 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
677 case SR_CONF_HORIZ_TRIGGERPOS:
678 t_dbl = g_variant_get_double(data);
679 if (t_dbl < 0.0 || t_dbl > 1.0) {
680 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
683 devc->horiz_triggerpos = t_dbl;
684 /* We have the trigger offset as a percentage of the frame, but
685 * need to express this in seconds. */
686 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
687 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
688 return rigol_ds_config_set(sdi,
689 devc->model->cmds[CMD_SET_HORIZ_TRIGGERPOS].str, buffer);
690 case SR_CONF_TRIGGER_LEVEL:
691 t_dbl = g_variant_get_double(data);
692 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", t_dbl);
693 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:LEV %s", buffer);
695 devc->trigger_level = t_dbl;
697 case SR_CONF_TIMEBASE:
698 if ((idx = std_u64_tuple_idx(data, devc->timebases, devc->num_timebases)) < 0)
700 devc->timebase = (float)devc->timebases[idx][0] / devc->timebases[idx][1];
701 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
703 return rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
704 case SR_CONF_TRIGGER_SOURCE:
705 if ((idx = std_str_idx(data, devc->model->trigger_sources, devc->model->num_trigger_sources)) < 0)
707 g_free(devc->trigger_source);
708 devc->trigger_source = g_strdup(devc->model->trigger_sources[idx]);
709 if (!strcmp(devc->trigger_source, "AC Line"))
711 else if (!strcmp(devc->trigger_source, "CH1"))
713 else if (!strcmp(devc->trigger_source, "CH2"))
715 else if (!strcmp(devc->trigger_source, "CH3"))
717 else if (!strcmp(devc->trigger_source, "CH4"))
720 tmp_str = (char *)devc->trigger_source;
721 return rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
724 return SR_ERR_CHANNEL_GROUP;
725 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
727 if ((idx = std_u64_tuple_idx(data, ARRAY_AND_SIZE(vdivs))) < 0)
729 devc->vdiv[i] = (float)vdivs[idx][0] / vdivs[idx][1];
730 g_ascii_formatd(buffer, sizeof(buffer), "%.3f", devc->vdiv[i]);
731 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1, buffer);
732 case SR_CONF_COUPLING:
734 return SR_ERR_CHANNEL_GROUP;
735 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
737 if ((idx = std_str_idx(data, ARRAY_AND_SIZE(coupling))) < 0)
739 g_free(devc->coupling[i]);
740 devc->coupling[i] = g_strdup(coupling[idx]);
741 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1, devc->coupling[i]);
742 case SR_CONF_PROBE_FACTOR:
744 return SR_ERR_CHANNEL_GROUP;
745 if ((i = std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels)) < 0)
747 if ((idx = std_u64_idx(data, ARRAY_AND_SIZE(probe_factor))) < 0)
749 p = g_variant_get_uint64(data);
750 devc->attenuation[i] = probe_factor[idx];
751 ret = rigol_ds_config_set(sdi, ":CHAN%d:PROB %"PRIu64, i + 1, p);
753 rigol_ds_get_dev_cfg_vertical(sdi);
755 case SR_CONF_DATA_SOURCE:
756 tmp_str = g_variant_get_string(data, NULL);
757 if (!strcmp(tmp_str, "Live"))
758 devc->data_source = DATA_SOURCE_LIVE;
759 else if (devc->model->series->protocol >= PROTOCOL_V2
760 && !strcmp(tmp_str, "Memory"))
761 devc->data_source = DATA_SOURCE_MEMORY;
762 else if (devc->model->series->protocol >= PROTOCOL_V3
763 && !strcmp(tmp_str, "Segmented"))
764 devc->data_source = DATA_SOURCE_SEGMENTED;
766 sr_err("Unknown data source: '%s'.", tmp_str);
777 static int config_list(uint32_t key, GVariant **data,
778 const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
780 struct dev_context *devc;
782 devc = (sdi) ? sdi->priv : NULL;
785 case SR_CONF_SCAN_OPTIONS:
786 case SR_CONF_DEVICE_OPTIONS:
788 return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
791 if (cg == devc->digital_group) {
792 *data = std_gvar_array_u32(NULL, 0);
795 if (std_cg_idx(cg, devc->analog_groups, devc->model->analog_channels) < 0)
797 *data = std_gvar_array_u32(ARRAY_AND_SIZE(devopts_cg_analog));
801 case SR_CONF_COUPLING:
803 return SR_ERR_CHANNEL_GROUP;
804 *data = g_variant_new_strv(ARRAY_AND_SIZE(coupling));
806 case SR_CONF_PROBE_FACTOR:
808 return SR_ERR_CHANNEL_GROUP;
809 *data = std_gvar_array_u64(ARRAY_AND_SIZE(probe_factor));
813 /* Can't know this until we have the exact model. */
816 return SR_ERR_CHANNEL_GROUP;
817 *data = std_gvar_tuple_array(devc->vdivs, devc->num_vdivs);
819 case SR_CONF_TIMEBASE:
821 /* Can't know this until we have the exact model. */
823 if (devc->num_timebases <= 0)
825 *data = std_gvar_tuple_array(devc->timebases, devc->num_timebases);
827 case SR_CONF_TRIGGER_SOURCE:
829 /* Can't know this until we have the exact model. */
831 *data = g_variant_new_strv(devc->model->trigger_sources, devc->model->num_trigger_sources);
833 case SR_CONF_TRIGGER_SLOPE:
834 *data = g_variant_new_strv(ARRAY_AND_SIZE(trigger_slopes));
836 case SR_CONF_DATA_SOURCE:
838 /* Can't know this until we have the exact model. */
840 switch (devc->model->series->protocol) {
842 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
845 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
848 *data = g_variant_new_strv(ARRAY_AND_SIZE(data_sources));
859 static int dev_acquisition_start(const struct sr_dev_inst *sdi)
861 struct sr_scpi_dev_inst *scpi;
862 struct dev_context *devc;
863 struct sr_channel *ch;
864 struct sr_datafeed_packet packet;
865 gboolean some_digital;
871 devc->num_frames = 0;
873 some_digital = FALSE;
874 for (l = sdi->channels; l; l = l->next) {
876 sr_dbg("handling channel %s", ch->name);
877 if (ch->type == SR_CHANNEL_ANALOG) {
879 devc->enabled_channels = g_slist_append(
880 devc->enabled_channels, ch);
881 if (ch->enabled != devc->analog_channels[ch->index]) {
882 /* Enabled channel is currently disabled, or vice versa. */
883 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
884 ch->enabled ? "ON" : "OFF") != SR_OK)
886 devc->analog_channels[ch->index] = ch->enabled;
888 } else if (ch->type == SR_CHANNEL_LOGIC) {
889 /* Only one list entry for older protocols. All channels are
890 * retrieved together when this entry is processed. */
892 devc->model->series->protocol > PROTOCOL_V3 ||
894 devc->enabled_channels = g_slist_append(
895 devc->enabled_channels, ch);
898 /* Turn on LA module if currently off. */
899 if (!devc->la_enabled) {
900 if (rigol_ds_config_set(sdi,
901 devc->model->series->protocol >= PROTOCOL_V3 ?
902 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
904 devc->la_enabled = TRUE;
907 if (ch->enabled != devc->digital_channels[ch->index]) {
908 /* Enabled channel is currently disabled, or vice versa. */
909 if (rigol_ds_config_set(sdi,
910 devc->model->series->protocol >= PROTOCOL_V3 ?
911 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
912 ch->enabled ? "ON" : "OFF") != SR_OK)
914 devc->digital_channels[ch->index] = ch->enabled;
919 if (!devc->enabled_channels)
922 /* Turn off LA module if on and no digital channels selected. */
923 if (devc->la_enabled && !some_digital)
924 if (rigol_ds_config_set(sdi,
925 devc->model->series->protocol >= PROTOCOL_V3 ?
926 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
929 /* Set memory mode. */
930 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
931 sr_err("Data source 'Segmented' not yet supported");
935 devc->analog_frame_size = analog_frame_size(sdi);
936 devc->digital_frame_size = digital_frame_size(sdi);
938 switch (devc->model->series->protocol) {
940 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
944 /* Apparently for the DS2000 the memory
945 * depth can only be set in Running state -
946 * this matches the behaviour of the UI. */
947 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
949 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
950 devc->analog_frame_size) != SR_OK)
952 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
959 if (devc->data_source == DATA_SOURCE_LIVE)
960 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
963 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
964 rigol_ds_receive, (void *)sdi);
966 std_session_send_df_header(sdi);
968 devc->channel_entry = devc->enabled_channels;
970 if (rigol_ds_capture_start(sdi) != SR_OK)
973 /* Start of first frame. */
974 packet.type = SR_DF_FRAME_BEGIN;
975 sr_session_send(sdi, &packet);
980 static int dev_acquisition_stop(struct sr_dev_inst *sdi)
982 struct dev_context *devc;
983 struct sr_scpi_dev_inst *scpi;
987 std_session_send_df_end(sdi);
989 g_slist_free(devc->enabled_channels);
990 devc->enabled_channels = NULL;
992 sr_scpi_source_remove(sdi->session, scpi);
997 static struct sr_dev_driver rigol_ds_driver_info = {
999 .longname = "Rigol DS",
1002 .cleanup = std_cleanup,
1004 .dev_list = std_dev_list,
1005 .dev_clear = dev_clear,
1006 .config_get = config_get,
1007 .config_set = config_set,
1008 .config_list = config_list,
1009 .dev_open = dev_open,
1010 .dev_close = dev_close,
1011 .dev_acquisition_start = dev_acquisition_start,
1012 .dev_acquisition_stop = dev_acquisition_stop,
1015 SR_REGISTER_DEV_DRIVER(rigol_ds_driver_info);