2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
30 #include "asix-sigma.h"
32 #define USB_VENDOR 0xa600
33 #define USB_PRODUCT 0xa000
34 #define USB_DESCRIPTION "ASIX SIGMA"
35 #define USB_VENDOR_NAME "ASIX"
36 #define USB_MODEL_NAME "SIGMA"
37 #define USB_MODEL_VERSION ""
39 static GSList *device_instances = NULL;
41 // XXX These should be per device
42 static struct ftdi_context ftdic;
43 static uint64_t cur_samplerate = 0;
44 static uint32_t limit_msec = 0;
45 static struct timeval start_tv;
46 static int cur_firmware = -1;
47 static int num_probes = 0;
48 static int samples_per_event = 0;
50 static uint64_t supported_samplerates[] = {
57 static struct samplerates samplerates = {
61 supported_samplerates,
64 static int capabilities[] = {
68 /* These are really implemented in the driver, not the hardware. */
73 /* Force the FPGA to reboot. */
74 static uint8_t suicide[] = {
75 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
78 /* Prepare to upload firmware (FPGA specific). */
79 static uint8_t init[] = {
80 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
83 /* Initialize the logic analyzer mode. */
84 static uint8_t logic_mode_start[] = {
85 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
86 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
89 static const char *firmware_files[] =
91 "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */
92 "asix-sigma-100.fw", /* 100 MHz */
93 "asix-sigma-200.fw", /* 200 MHz */
94 "asix-sigma-50sync.fw", /* Asynchronous sampling */
95 "asix-sigma-phasor.fw", /* Frequency counter */
98 static int sigma_read(void* buf, size_t size)
102 ret = ftdi_read_data(&ftdic, (unsigned char *)buf, size);
104 g_warning("ftdi_read_data failed: %s",
105 ftdi_get_error_string(&ftdic));
111 static int sigma_write(void *buf, size_t size)
115 ret = ftdi_write_data(&ftdic, (unsigned char *)buf, size);
117 g_warning("ftdi_write_data failed: %s",
118 ftdi_get_error_string(&ftdic));
119 } else if ((size_t) ret != size) {
120 g_warning("ftdi_write_data did not complete write\n");
126 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len)
129 uint8_t buf[len + 2];
132 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
133 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
135 for (i = 0; i < len; ++i) {
136 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
137 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
140 return sigma_write(buf, idx);
143 static int sigma_set_register(uint8_t reg, uint8_t value)
145 return sigma_write_register(reg, &value, 1);
148 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len)
152 buf[0] = REG_ADDR_LOW | (reg & 0xf);
153 buf[1] = REG_ADDR_HIGH | (reg >> 4);
154 buf[2] = REG_READ_ADDR;
156 sigma_write(buf, sizeof(buf));
158 return sigma_read(data, len);
161 static uint8_t sigma_get_register(uint8_t reg)
165 if (1 != sigma_read_register(reg, &value, 1)) {
166 g_warning("Sigma_get_register: 1 byte expected");
173 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos)
176 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
178 REG_READ_ADDR | NEXT_REG,
179 REG_READ_ADDR | NEXT_REG,
180 REG_READ_ADDR | NEXT_REG,
181 REG_READ_ADDR | NEXT_REG,
182 REG_READ_ADDR | NEXT_REG,
183 REG_READ_ADDR | NEXT_REG,
187 sigma_write(buf, sizeof(buf));
189 sigma_read(result, sizeof(result));
191 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
192 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
197 static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
203 /* Send the startchunk. Index start with 1. */
204 buf[0] = startchunk >> 8;
205 buf[1] = startchunk & 0xff;
206 sigma_write_register(WRITE_MEMROW, buf, 2);
209 buf[idx++] = REG_DRAM_BLOCK;
210 buf[idx++] = REG_DRAM_WAIT_ACK;
212 for (i = 0; i < numchunks; ++i) {
213 /* Alternate bit to copy from DRAM to cache. */
214 if (i != (numchunks - 1))
215 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
217 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
219 if (i != (numchunks - 1))
220 buf[idx++] = REG_DRAM_WAIT_ACK;
223 sigma_write(buf, idx);
225 return sigma_read(data, numchunks * CHUNK_SIZE);
228 /* Generate the bitbang stream for programming the FPGA. */
229 static int bin2bitbang(const char *filename,
230 unsigned char **buf, size_t *buf_size)
234 unsigned long offset = 0;
236 uint8_t *compressed_buf, *firmware;
237 uLongf csize, fwsize;
238 const int buffer_size = 65536;
241 uint32_t imm = 0x3f6df2ab;
243 f = fopen(filename, "r");
245 g_warning("fopen(\"%s\", \"r\")", filename);
249 if (-1 == fseek(f, 0, SEEK_END)) {
250 g_warning("fseek on %s failed", filename);
255 file_size = ftell(f);
257 fseek(f, 0, SEEK_SET);
259 compressed_buf = g_malloc(file_size);
260 firmware = g_malloc(buffer_size);
262 if (!compressed_buf || !firmware) {
263 g_warning("Error allocating buffers");
268 while ((c = getc(f)) != EOF) {
269 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
270 compressed_buf[csize++] = c ^ imm;
274 fwsize = buffer_size;
275 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
277 g_free(compressed_buf);
279 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
283 g_free(compressed_buf);
285 *buf_size = fwsize * 2 * 8;
287 *buf = p = (unsigned char *)g_malloc(*buf_size);
290 g_warning("Error allocating buffers");
294 for (i = 0; i < fwsize; ++i) {
295 for (bit = 7; bit >= 0; --bit) {
296 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
297 p[offset++] = v | 0x01;
304 if (offset != *buf_size) {
306 g_warning("Error reading firmware %s "
307 "offset=%ld, file_size=%ld, buf_size=%zd\n",
308 filename, offset, file_size, *buf_size);
316 static int hw_init(char *deviceinfo)
318 struct sigrok_device_instance *sdi;
320 deviceinfo = deviceinfo;
324 /* Look for SIGMAs. */
325 if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT,
326 USB_DESCRIPTION, NULL) < 0)
329 /* Register SIGMA device. */
330 sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
331 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
335 device_instances = g_slist_append(device_instances, sdi);
337 /* We will open the device again when we need it. */
338 ftdi_usb_close(&ftdic);
343 static int upload_firmware(int firmware_idx)
349 unsigned char result[32];
350 char firmware_path[128];
352 /* Make sure it's an ASIX SIGMA. */
353 if ((ret = ftdi_usb_open_desc(&ftdic,
354 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
355 g_warning("ftdi_usb_open failed: %s",
356 ftdi_get_error_string(&ftdic));
360 if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
361 g_warning("ftdi_set_bitmode failed: %s",
362 ftdi_get_error_string(&ftdic));
366 /* Four times the speed of sigmalogan - Works well. */
367 if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) {
368 g_warning("ftdi_set_baudrate failed: %s",
369 ftdi_get_error_string(&ftdic));
373 /* Force the FPGA to reboot. */
374 sigma_write(suicide, sizeof(suicide));
375 sigma_write(suicide, sizeof(suicide));
376 sigma_write(suicide, sizeof(suicide));
377 sigma_write(suicide, sizeof(suicide));
379 /* Prepare to upload firmware (FPGA specific). */
380 sigma_write(init, sizeof(init));
382 ftdi_usb_purge_buffers(&ftdic);
384 /* Wait until the FPGA asserts INIT_B. */
386 ret = sigma_read(result, 1);
387 if (result[0] & 0x20)
391 /* Prepare firmware */
392 snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR,
393 firmware_files[firmware_idx]);
395 if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) {
396 g_warning("An error occured while reading the firmware: %s",
401 /* Upload firmare. */
402 sigma_write(buf, buf_size);
406 if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
407 g_warning("ftdi_set_bitmode failed: %s",
408 ftdi_get_error_string(&ftdic));
412 ftdi_usb_purge_buffers(&ftdic);
414 /* Discard garbage. */
415 while (1 == sigma_read(&pins, 1))
418 /* Initialize the logic analyzer mode. */
419 sigma_write(logic_mode_start, sizeof(logic_mode_start));
421 /* Expect a 3 byte reply. */
422 ret = sigma_read(result, 3);
424 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
425 g_warning("Configuration failed. Invalid reply received.");
429 cur_firmware = firmware_idx;
434 static int hw_opendev(int device_index)
436 struct sigrok_device_instance *sdi;
439 /* Make sure it's an ASIX SIGMA */
440 if ((ret = ftdi_usb_open_desc(&ftdic,
441 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
443 g_warning("ftdi_usb_open failed: %s",
444 ftdi_get_error_string(&ftdic));
449 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
452 sdi->status = ST_ACTIVE;
457 static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerate)
463 for (i = 0; supported_samplerates[i]; i++) {
464 if (supported_samplerates[i] == samplerate)
467 if (supported_samplerates[i] == 0)
468 return SIGROK_ERR_SAMPLERATE;
470 if (samplerate <= MHZ(50)) {
471 ret = upload_firmware(0);
473 // XXX: Setup divider
475 if (samplerate == MHZ(100)) {
476 ret = upload_firmware(1);
479 else if (samplerate == MHZ(200)) {
480 ret = upload_firmware(2);
484 cur_samplerate = samplerate;
485 samples_per_event = 16 / num_probes;
487 g_message("Firmware uploaded");
492 static void hw_closedev(int device_index)
494 device_index = device_index;
496 ftdi_usb_close(&ftdic);
499 static void hw_cleanup(void)
503 static void *hw_get_device_info(int device_index, int device_info_id)
505 struct sigrok_device_instance *sdi;
508 if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
509 fprintf(stderr, "It's NULL.\n");
513 switch (device_info_id) {
518 info = GINT_TO_POINTER(4);
523 case DI_TRIGGER_TYPES:
524 info = 0; //TRIGGER_TYPES;
526 case DI_CUR_SAMPLERATE:
527 info = &cur_samplerate;
534 static int hw_get_status(int device_index)
536 struct sigrok_device_instance *sdi;
538 sdi = get_sigrok_device_instance(device_instances, device_index);
545 static int *hw_get_capabilities(void)
550 static int hw_set_configuration(int device_index, int capability, void *value)
552 struct sigrok_device_instance *sdi;
555 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
558 if (capability == HWCAP_SAMPLERATE) {
559 ret = set_samplerate(sdi, *(uint64_t*) value);
560 } else if (capability == HWCAP_PROBECONFIG) {
562 } else if (capability == HWCAP_LIMIT_MSEC) {
563 limit_msec = strtoull(value, NULL, 10);
573 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
574 * Each event is 20ns apart, and can contain multiple samples.
576 * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart.
577 * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart.
578 * For 50 MHz and below, events contain one sample for each channel,
579 * spread 20 ns apart.
581 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
582 uint16_t *lastsample, void *user_data)
585 uint16_t samples[65536 * samples_per_event];
586 struct datafeed_packet packet;
587 int i, j, k, l, numpad, tosend;
588 size_t n = 0, sent = 0;
589 int clustersize = EVENTS_PER_CLUSTER * samples_per_event;
594 for (i = 0; i < 64; ++i) {
595 ts = *(uint16_t *) &buf[i * 16];
596 tsdiff = ts - *lastts;
599 /* Pad last sample up to current point. */
600 numpad = tsdiff * samples_per_event - clustersize;
602 for (j = 0; j < numpad; ++j)
603 samples[j] = *lastsample;
608 event = (uint16_t *) &buf[i * 16 + 2];
612 /* For each event in cluster. */
613 for (j = 0; j < 7; ++j) {
615 /* For each sample in event. */
616 for (k = 0; k < samples_per_event; ++k) {
619 /* For each probe. */
620 for (l = 0; l < num_probes; ++l)
621 cur_sample |= (!!(event[j] &
622 (1 << (l * 2 + k)))) << l;
624 samples[n++] = cur_sample;
628 *lastsample = samples[n - 1];
630 /* Send to sigrok. */
633 tosend = MIN(2048, n - sent);
635 packet.type = DF_LOGIC16;
636 packet.length = tosend * sizeof(uint16_t);
637 packet.payload = samples + sent;
638 session_bus(user_data, &packet);
647 static int receive_data(int fd, int revents, void *user_data)
649 struct datafeed_packet packet;
650 const int chunks_per_read = 32;
651 unsigned char buf[chunks_per_read * CHUNK_SIZE];
652 int bufsz, numchunks, curchunk, i, newchunks;
653 uint32_t triggerpos, stoppos, running_msec;
656 uint16_t lastsample = 0;
661 /* Get the current position. */
662 sigma_read_pos(&stoppos, &triggerpos);
663 numchunks = stoppos / 512;
665 /* Check if the has expired, or memory is full. */
666 gettimeofday(&tv, 0);
667 running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
668 (tv.tv_usec - start_tv.tv_usec) / 1000;
670 if (running_msec < limit_msec && numchunks < 32767)
673 /* Stop acqusition. */
674 sigma_set_register(WRITE_MODE, 0x11);
676 /* Set SDRAM Read Enable. */
677 sigma_set_register(WRITE_MODE, 0x02);
679 /* Get the current position. */
680 sigma_read_pos(&stoppos, &triggerpos);
682 /* Read mode status. We will care for this later. */
683 sigma_get_register(READ_MODE);
685 /* Download sample data. */
686 for (curchunk = 0; curchunk < numchunks;) {
687 newchunks = MIN(chunks_per_read, numchunks - curchunk);
689 g_message("Downloading sample data: %.0f %%",
690 100.0 * curchunk / numchunks);
692 bufsz = sigma_read_dram(curchunk, newchunks, buf);
696 lastts = *(uint16_t *) buf - 1;
698 /* Decode chunks and send them to sigrok. */
699 for (i = 0; i < newchunks; ++i) {
700 decode_chunk_ts(buf + (i * CHUNK_SIZE),
701 &lastts, &lastsample, user_data);
704 curchunk += newchunks;
708 packet.type = DF_END;
710 session_bus(user_data, &packet);
715 static int hw_start_acquisition(int device_index, gpointer session_device_id)
717 struct sigrok_device_instance *sdi;
718 struct datafeed_packet packet;
719 struct datafeed_header header;
720 uint8_t trigger_option[2] = { 0x38, 0x00 };
722 session_device_id = session_device_id;
724 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
727 device_index = device_index;
729 if (cur_firmware == -1) {
730 /* Samplerate has not been set. Default to 200 MHz */
731 set_samplerate(sdi, 200);
734 /* Setup trigger (by trigger-in). */
735 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
737 /* More trigger setup. */
738 sigma_write_register(WRITE_TRIGGER_OPTION,
739 trigger_option, sizeof(trigger_option));
741 /* Trigger normal (falling edge). */
742 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
744 /* Enable pins (200 MHz, 4 pins). */
745 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0);
747 /* Setup maximum post trigger time. */
748 sigma_set_register(WRITE_POST_TRIGGER, 0xff);
750 /* Start acqusition (software trigger start). */
751 gettimeofday(&start_tv, 0);
752 sigma_set_register(WRITE_MODE, 0x0d);
754 /* Add capture source. */
755 source_add(0, G_IO_IN, 10, receive_data, session_device_id);
757 receive_data(0, 1, session_device_id);
759 /* Send header packet to the session bus. */
760 packet.type = DF_HEADER;
761 packet.length = sizeof(struct datafeed_header);
762 packet.payload = &header;
763 header.feed_version = 1;
764 gettimeofday(&header.starttime, NULL);
765 header.samplerate = cur_samplerate;
766 header.protocol_id = PROTO_RAW;
767 header.num_probes = 4;
768 session_bus(session_device_id, &packet);
773 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
775 device_index = device_index;
776 session_device_id = session_device_id;
778 /* Stop acquisition. */
779 sigma_set_register(WRITE_MODE, 0x11);
781 // XXX Set some state to indicate that data should be sent to sigrok
782 // Now, we just wait for timeout
785 struct device_plugin asix_sigma_plugin_info = {
795 hw_set_configuration,
796 hw_start_acquisition,