2 * This file is part of the sigrok project.
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
23 * ASIX Sigma Logic Analyzer Driver
30 #include "asix-sigma.h"
32 #define USB_VENDOR 0xa600
33 #define USB_PRODUCT 0xa000
34 #define USB_DESCRIPTION "ASIX SIGMA"
35 #define USB_VENDOR_NAME "ASIX"
36 #define USB_MODEL_NAME "SIGMA"
37 #define USB_MODEL_VERSION ""
38 #define FIRMWARE FIRMWARE_DIR "/asix-sigma-200.firmware"
40 static GSList *device_instances = NULL;
42 // XXX These should be per device
43 static struct ftdi_context ftdic;
44 static uint64_t cur_samplerate = MHZ(200);
45 static uint32_t limit_msec = 0;
46 static struct timeval start_tv;
47 static int cur_firmware = -1;
49 static uint64_t supported_samplerates[] = {
54 static struct samplerates samplerates = {
58 supported_samplerates,
61 static int capabilities[] = {
65 /* These are really implemented in the driver, not the hardware. */
70 /* Force the FPGA to reboot. */
71 static uint8_t suicide[] = {
72 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84,
75 /* Prepare to upload firmware (FPGA specific). */
76 static uint8_t init[] = {
77 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01,
80 /* Initialize the logic analyzer mode. */
81 static uint8_t logic_mode_start[] = {
82 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40,
83 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38,
86 static const char *firmware_files[] =
88 "asix-sigma-50.firmware", /* Supports fractions (8 bits) */
89 "asix-sigma-50sync.firmware", /* Asynchronous sampling */
90 "asix-sigma-100.firmware", /* 100 MHz */
91 "asix-sigma-200.firmware", /* 200 MHz */
92 "asix-sigma-phasor.firmware", /* Frequency counter */
95 static int sigma_read(void* buf, size_t size)
99 ret = ftdi_read_data(&ftdic, (unsigned char *)buf, size);
101 g_warning("ftdi_read_data failed: %s",
102 ftdi_get_error_string(&ftdic));
108 static int sigma_write(void *buf, size_t size)
112 ret = ftdi_write_data(&ftdic, (unsigned char *)buf, size);
114 g_warning("ftdi_write_data failed: %s",
115 ftdi_get_error_string(&ftdic));
116 } else if ((size_t) ret != size) {
117 g_warning("ftdi_write_data did not complete write\n");
123 static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len)
126 uint8_t buf[len + 2];
129 buf[idx++] = REG_ADDR_LOW | (reg & 0xf);
130 buf[idx++] = REG_ADDR_HIGH | (reg >> 4);
132 for (i = 0; i < len; ++i) {
133 buf[idx++] = REG_DATA_LOW | (data[i] & 0xf);
134 buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4);
137 return sigma_write(buf, idx);
140 static int sigma_set_register(uint8_t reg, uint8_t value)
142 return sigma_write_register(reg, &value, 1);
145 static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len)
149 buf[0] = REG_ADDR_LOW | (reg & 0xf);
150 buf[1] = REG_ADDR_HIGH | (reg >> 4);
151 buf[2] = REG_READ_ADDR;
153 sigma_write(buf, sizeof(buf));
155 return sigma_read(data, len);
158 static uint8_t sigma_get_register(uint8_t reg)
162 if (1 != sigma_read_register(reg, &value, 1)) {
163 g_warning("Sigma_get_register: 1 byte expected");
170 static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos)
173 REG_ADDR_LOW | READ_TRIGGER_POS_LOW,
175 REG_READ_ADDR | NEXT_REG,
176 REG_READ_ADDR | NEXT_REG,
177 REG_READ_ADDR | NEXT_REG,
178 REG_READ_ADDR | NEXT_REG,
179 REG_READ_ADDR | NEXT_REG,
180 REG_READ_ADDR | NEXT_REG,
184 sigma_write(buf, sizeof(buf));
186 sigma_read(result, sizeof(result));
188 *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16);
189 *stoppos = result[3] | (result[4] << 8) | (result[5] << 16);
194 static int sigma_read_dram(uint16_t startchunk, size_t numchunks, uint8_t *data)
200 /* Send the startchunk. Index start with 1. */
201 buf[0] = startchunk >> 8;
202 buf[1] = startchunk & 0xff;
203 sigma_write_register(WRITE_MEMROW, buf, 2);
206 buf[idx++] = REG_DRAM_BLOCK;
207 buf[idx++] = REG_DRAM_WAIT_ACK;
209 for (i = 0; i < numchunks; ++i) {
210 /* Alternate bit to copy from DRAM to cache. */
211 if (i != (numchunks - 1))
212 buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4);
214 buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4);
216 if (i != (numchunks - 1))
217 buf[idx++] = REG_DRAM_WAIT_ACK;
220 sigma_write(buf, idx);
222 return sigma_read(data, numchunks * CHUNK_SIZE);
225 /* Generate the bitbang stream for programming the FPGA. */
226 static int bin2bitbang(const char *filename,
227 unsigned char **buf, size_t *buf_size)
231 unsigned long offset = 0;
233 uint8_t *compressed_buf, *firmware;
234 uLongf csize, fwsize;
235 const int buffer_size = 65536;
238 uint32_t imm = 0x3f6df2ab;
240 f = fopen(filename, "r");
242 g_warning("fopen(\"%s\", \"r\")", filename);
246 if (-1 == fseek(f, 0, SEEK_END)) {
247 g_warning("fseek on %s failed", filename);
252 file_size = ftell(f);
254 fseek(f, 0, SEEK_SET);
256 compressed_buf = g_malloc(file_size);
257 firmware = g_malloc(buffer_size);
259 if (!compressed_buf || !firmware) {
260 g_warning("Error allocating buffers");
265 while ((c = getc(f)) != EOF) {
266 imm = (imm + 0xa853753) % 177 + (imm * 0x8034052);
267 compressed_buf[csize++] = c ^ imm;
271 fwsize = buffer_size;
272 ret = uncompress(firmware, &fwsize, compressed_buf, csize);
274 g_free(compressed_buf);
276 g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret);
280 g_free(compressed_buf);
282 *buf_size = fwsize * 2 * 8;
284 *buf = p = (unsigned char *)g_malloc(*buf_size);
287 g_warning("Error allocating buffers");
291 for (i = 0; i < fwsize; ++i) {
292 for (bit = 7; bit >= 0; --bit) {
293 v = firmware[i] & 1 << bit ? 0x40 : 0x00;
294 p[offset++] = v | 0x01;
301 if (offset != *buf_size) {
303 g_warning("Error reading firmware %s "
304 "offset=%ld, file_size=%ld, buf_size=%zd\n",
305 filename, offset, file_size, *buf_size);
313 static int hw_init(char *deviceinfo)
315 struct sigrok_device_instance *sdi;
317 deviceinfo = deviceinfo;
321 /* Look for SIGMAs. */
322 if (ftdi_usb_open_desc(&ftdic, USB_VENDOR, USB_PRODUCT,
323 USB_DESCRIPTION, NULL) < 0)
326 /* Register SIGMA device. */
327 sdi = sigrok_device_instance_new(0, ST_INITIALIZING,
328 USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION);
332 device_instances = g_slist_append(device_instances, sdi);
334 /* We will open the device again when we need it. */
335 ftdi_usb_close(&ftdic);
340 static int upload_firmware(int firmware_idx)
346 unsigned char result[32];
347 char firmware_file[64];
349 /* Make sure it's an ASIX SIGMA. */
350 if ((ret = ftdi_usb_open_desc(&ftdic,
351 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
352 g_warning("ftdi_usb_open failed: %s",
353 ftdi_get_error_string(&ftdic));
357 if ((ret = ftdi_set_bitmode(&ftdic, 0xdf, BITMODE_BITBANG)) < 0) {
358 g_warning("ftdi_set_bitmode failed: %s",
359 ftdi_get_error_string(&ftdic));
363 /* Four times the speed of sigmalogan - Works well. */
364 if ((ret = ftdi_set_baudrate(&ftdic, 750000)) < 0) {
365 g_warning("ftdi_set_baudrate failed: %s",
366 ftdi_get_error_string(&ftdic));
370 /* Force the FPGA to reboot. */
371 sigma_write(suicide, sizeof(suicide));
372 sigma_write(suicide, sizeof(suicide));
373 sigma_write(suicide, sizeof(suicide));
374 sigma_write(suicide, sizeof(suicide));
376 /* Prepare to upload firmware (FPGA specific). */
377 sigma_write(init, sizeof(init));
379 ftdi_usb_purge_buffers(&ftdic);
381 /* Wait until the FPGA asserts INIT_B. */
383 ret = sigma_read(result, 1);
384 if (result[0] & 0x20)
388 /* Prepare firmware */
389 snprintf(firmware_file, sizeof(firmware_file), "%s/%s", FIRMWARE_DIR,
390 firmware_files[firmware_idx]);
392 if (-1 == bin2bitbang(firmware_file, &buf, &buf_size)) {
393 g_warning("An error occured while reading the firmware: %s",
398 /* Upload firmare. */
399 sigma_write(buf, buf_size);
403 if ((ret = ftdi_set_bitmode(&ftdic, 0x00, BITMODE_RESET)) < 0) {
404 g_warning("ftdi_set_bitmode failed: %s",
405 ftdi_get_error_string(&ftdic));
409 ftdi_usb_purge_buffers(&ftdic);
411 /* Discard garbage. */
412 while (1 == sigma_read(&pins, 1))
415 /* Initialize the logic analyzer mode. */
416 sigma_write(logic_mode_start, sizeof(logic_mode_start));
418 /* Expect a 3 byte reply. */
419 ret = sigma_read(result, 3);
421 result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) {
422 g_warning("Configuration failed. Invalid reply received.");
426 cur_firmware = firmware_idx;
431 static int hw_opendev(int device_index)
433 struct sigrok_device_instance *sdi;
436 /* Make sure it's an ASIX SIGMA */
437 if ((ret = ftdi_usb_open_desc(&ftdic,
438 USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) {
440 g_warning("ftdi_usb_open failed: %s",
441 ftdi_get_error_string(&ftdic));
446 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
449 sdi->status = ST_ACTIVE;
454 static int set_samplerate(struct sigrok_device_instance *sdi, uint64_t samplerate)
460 for (i = 0; supported_samplerates[i]; i++) {
461 if (supported_samplerates[i] == samplerate)
464 if (supported_samplerates[i] == 0)
465 return SIGROK_ERR_SAMPLERATE;
467 cur_samplerate = samplerate;
471 g_message("Firmware uploaded");
476 static void hw_closedev(int device_index)
478 device_index = device_index;
480 ftdi_usb_close(&ftdic);
483 static void hw_cleanup(void)
487 static void *hw_get_device_info(int device_index, int device_info_id)
489 struct sigrok_device_instance *sdi;
492 if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) {
493 fprintf(stderr, "It's NULL.\n");
497 switch (device_info_id) {
502 info = GINT_TO_POINTER(4);
507 case DI_TRIGGER_TYPES:
508 info = 0; //TRIGGER_TYPES;
510 case DI_CUR_SAMPLERATE:
511 info = &cur_samplerate;
518 static int hw_get_status(int device_index)
520 struct sigrok_device_instance *sdi;
522 sdi = get_sigrok_device_instance(device_instances, device_index);
529 static int *hw_get_capabilities(void)
534 static int hw_set_configuration(int device_index, int capability, void *value)
536 struct sigrok_device_instance *sdi;
539 fprintf(stderr, "Set config: %d\n", capability);
541 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
544 if (capability == HWCAP_SAMPLERATE) {
545 ret = set_samplerate(sdi, *(uint64_t*) value);
546 } else if (capability == HWCAP_PROBECONFIG) {
548 } else if (capability == HWCAP_LIMIT_MSEC) {
549 limit_msec = strtoull(value, NULL, 10);
559 * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster.
560 * Each event is 20ns apart, and can contain multiple samples.
561 * For 200 MHz, an event contains 4 samples for each channel,
564 static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts,
565 uint8_t *lastsample, void *user_data)
567 const int samples_per_event = 4;
569 uint8_t samples[65536 * samples_per_event];
570 struct datafeed_packet packet;
571 int i, j, k, numpad, tosend;
572 size_t n = 0, sent = 0;
573 int clustersize = EVENTS_PER_CLUSTER * samples_per_event; /* 4 for 200 MHz */
577 for (i = 0; i < 64; ++i) {
578 ts = *(uint16_t *) &buf[i * 16];
579 tsdiff = ts - *lastts;
582 /* Pad last sample up to current point. */
583 numpad = tsdiff * samples_per_event - clustersize;
585 memset(samples, *lastsample,
586 tsdiff * samples_per_event - clustersize);
587 n = tsdiff * samples_per_event - clustersize;
590 event = (uint16_t *) &buf[i * 16 + 2];
592 /* For each sample in cluster. */
593 for (j = 0; j < 7; ++j) {
594 for (k = 0; k < samples_per_event; ++k) {
596 * Extract samples from bytestream.
597 * Samples are packed together in a short.
600 ((!!(event[j] & (1 << (k + 0x0)))) << 0) |
601 ((!!(event[j] & (1 << (k + 0x4)))) << 1) |
602 ((!!(event[j] & (1 << (k + 0x8)))) << 2) |
603 ((!!(event[j] & (1 << (k + 0xc)))) << 3);
607 *lastsample = samples[n - 1];
609 /* Send to sigrok. */
612 tosend = MIN(4096, n - sent);
614 packet.type = DF_LOGIC8;
615 packet.length = tosend;
616 packet.payload = samples + sent;
617 session_bus(user_data, &packet);
626 static int receive_data(int fd, int revents, void *user_data)
628 struct datafeed_packet packet;
629 const int chunks_per_read = 32;
630 unsigned char buf[chunks_per_read * CHUNK_SIZE];
631 int bufsz, numchunks, curchunk, i, newchunks;
632 uint32_t triggerpos, stoppos, running_msec;
635 uint8_t lastsample = 0;
640 /* Get the current position. */
641 sigma_read_pos(&stoppos, &triggerpos);
642 numchunks = stoppos / 512;
644 /* Check if the has expired, or memory is full. */
645 gettimeofday(&tv, 0);
646 running_msec = (tv.tv_sec - start_tv.tv_sec) * 1000 +
647 (tv.tv_usec - start_tv.tv_usec) / 1000;
649 if (running_msec < limit_msec && numchunks < 32767)
652 /* Stop acqusition. */
653 sigma_set_register(WRITE_MODE, 0x11);
655 /* Set SDRAM Read Enable. */
656 sigma_set_register(WRITE_MODE, 0x02);
658 /* Get the current position. */
659 sigma_read_pos(&stoppos, &triggerpos);
661 /* Download sample data. */
662 for (curchunk = 0; curchunk < numchunks;) {
663 newchunks = MIN(chunks_per_read, numchunks - curchunk);
665 g_message("Downloading sample data: %.0f %%",
666 100.0 * curchunk / numchunks);
668 bufsz = sigma_read_dram(curchunk, newchunks, buf);
672 lastts = *(uint16_t *) buf - 1;
674 /* Decode chunks and send them to sigrok. */
675 for (i = 0; i < newchunks; ++i) {
676 decode_chunk_ts(buf + (i * CHUNK_SIZE),
677 &lastts, &lastsample, user_data);
680 curchunk += newchunks;
684 packet.type = DF_END;
686 session_bus(user_data, &packet);
691 static int hw_start_acquisition(int device_index, gpointer session_device_id)
693 struct sigrok_device_instance *sdi;
694 struct datafeed_packet packet;
695 struct datafeed_header header;
696 uint8_t trigger_option[2] = { 0x38, 0x00 };
698 session_device_id = session_device_id;
700 if (!(sdi = get_sigrok_device_instance(device_instances, device_index)))
703 device_index = device_index;
705 /* Setup trigger (by trigger-in). */
706 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20);
708 /* More trigger setup. */
709 sigma_write_register(WRITE_TRIGGER_OPTION,
710 trigger_option, sizeof(trigger_option));
712 /* Trigger normal (falling edge). */
713 sigma_set_register(WRITE_TRIGGER_SELECT1, 0x08);
715 /* Enable pins (200 MHz, 4 pins). */
716 sigma_set_register(WRITE_CLOCK_SELECT, 0xf0);
718 /* Setup maximum post trigger time. */
719 sigma_set_register(WRITE_POST_TRIGGER, 0xff);
721 /* Start acqusition (software trigger start). */
722 gettimeofday(&start_tv, 0);
723 sigma_set_register(WRITE_MODE, 0x0d);
725 /* Add capture source. */
726 source_add(0, G_IO_IN, 10, receive_data, session_device_id);
728 receive_data(0, 1, session_device_id);
730 /* Send header packet to the session bus. */
731 packet.type = DF_HEADER;
732 packet.length = sizeof(struct datafeed_header);
733 packet.payload = &header;
734 header.feed_version = 1;
735 gettimeofday(&header.starttime, NULL);
736 header.samplerate = cur_samplerate;
737 header.protocol_id = PROTO_RAW;
738 header.num_probes = 4;
739 session_bus(session_device_id, &packet);
744 static void hw_stop_acquisition(int device_index, gpointer session_device_id)
746 device_index = device_index;
747 session_device_id = session_device_id;
749 /* Stop acquisition. */
750 sigma_set_register(WRITE_MODE, 0x11);
752 // XXX Set some state to indicate that data should be sent to sigrok
753 // Now, we just wait for timeout
756 struct device_plugin asix_sigma_plugin_info = {
766 hw_set_configuration,
767 hw_start_acquisition,