2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include <fx2macros.h>
23 #include <autovector.h>
27 #define SET_ANALOG_MODE() PA7 = 1
29 /* Toggle the 1kHz calibration pin, only accurate up to ca. 8MHz. */
30 #define TOGGLE_CALIBRATION_PIN() PC2 = !PC2
32 #define LED_CLEAR() PC0 = 1; PC1 = 1;
33 #define LED_GREEN() PC0 = 1; PC1 = 0;
34 #define LED_RED() PC0 = 0; PC1 = 1;
36 /* Change to support as many interfaces as you need. */
37 static BYTE altiface = 0;
39 static volatile WORD ledcounter = 0;
41 static volatile __bit dosud = FALSE;
42 static volatile __bit dosuspend = FALSE;
44 extern __code BYTE highspd_dscr;
45 extern __code BYTE fullspd_dscr;
47 void resume_isr(void) __interrupt RESUME_ISR
52 void sudav_isr(void) __interrupt SUDAV_ISR
58 void usbreset_isr(void) __interrupt USBRESET_ISR
60 handle_hispeed(FALSE);
64 void hispeed_isr(void) __interrupt HISPEED_ISR
70 void suspend_isr(void) __interrupt SUSPEND_ISR
76 void timer2_isr(void) __interrupt TF2_ISR
78 TOGGLE_CALIBRATION_PIN();
80 if (ledcounter && (--ledcounter == 0))
87 * This sets three bits for each channel, one channel at a time.
88 * For channel 0 we want to set bits 1, 2 & 3
89 * For channel 1 we want to set bits 4, 5 & 6
91 * We convert the input values that are strange due to original
92 * firmware code into the value of the three bits as follows:
100 * The third bit is always zero since there are only four outputs connected
101 * in the serial selector chip.
103 * The multiplication of the converted value by 0x24 sets the relevant bits in
104 * both channels and then we mask it out to only affect the channel currently
107 static BOOL set_voltage(BYTE channel, BYTE val)
128 bits = bits << (channel ? 1 : 4);
129 mask = (channel) ? 0x70 : 0x0e;
130 IOA = (IOA & ~mask) | (bits & mask);
135 static BOOL set_numchannels(BYTE numchannels)
137 if (numchannels == 1 || numchannels == 2) {
138 BYTE fifocfg = 7 + numchannels;
139 EP2FIFOCFG = fifocfg;
140 EP6FIFOCFG = fifocfg;
147 static void clear_fifo(void)
160 static void stop_sampling(void)
164 INPKTEND = (altiface == 0) ? 6 : 2;
167 static void start_sampling(void)
175 for (i = 0; i < 1000; i++);
177 while (!(GPIFTRIG & 0x80))
184 GPIFTRIG = (altiface == 0) ? 6 : 4;
186 /* Set green LED, don't clear LED afterwards (ledcounter = 0). */
191 static void select_interface(BYTE alt)
193 const BYTE *pPacketSize = \
194 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
195 + (9 + (16 * alt) + 9 + 4);
204 EP6AUTOINLENL = pPacketSize[0];
205 EP6AUTOINLENH = pPacketSize[1];
211 EP2AUTOINLENL = pPacketSize[0];
212 EP2AUTOINLENH = pPacketSize[1] & 0x7;
213 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
217 static const struct samplerate_info {
226 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
227 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
228 { 24, 1, 0, 2, 1, 0x10, 0xca },
229 { 16, 1, 1, 2, 0, 0x10, 0xca },
230 { 12, 2, 1, 2, 0, 0x10, 0xca },
231 { 8, 3, 2, 2, 0, 0x10, 0xca },
232 { 4, 6, 5, 2, 0, 0x10, 0xca },
233 { 2, 12, 11, 2, 0, 0x10, 0xca },
234 { 1, 24, 23, 2, 0, 0x10, 0xca },
235 { 50, 48, 47, 2, 0, 0x10, 0xca },
236 { 20, 120, 119, 2, 0, 0x10, 0xca },
237 { 10, 240, 239, 2, 0, 0x10, 0xca },
240 static BOOL set_samplerate(BYTE rate)
244 while (samplerates[i].rate != rate) {
246 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
250 IFCONFIG = samplerates[i].ifcfg;
253 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
257 * The program for low-speed, e.g. 1 MHz, is:
258 * wait 24, CTLx=0, FIFO
262 * The program for 24 MHz is:
263 * wait 1, CTLx=0, FIFO
266 * The program for 30/48 MHz is:
267 * jump 0, CTLx=Z, FIFO, LOOP
269 * (CTLx is device-dependent, could be e.g. CTL0 or CTL2.)
272 /* LENGTH / BRANCH 0-7 */
273 EXTAUTODAT2 = samplerates[i].wait0;
274 EXTAUTODAT2 = samplerates[i].wait1;
283 EXTAUTODAT2 = samplerates[i].opc0;
284 EXTAUTODAT2 = samplerates[i].opc1;
285 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
293 EXTAUTODAT2 = samplerates[i].out0;
294 EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
295 EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
302 /* LOGIC FUNCTION 0-7 */
312 for (i = 0; i < 96; i++)
318 /* Set *alt_ifc to the current alt interface for ifc. */
319 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
329 * Return TRUE if you set the interface requested.
331 * Note: This function should reconfigure and reset the endpoints
332 * according to the interface descriptors you provided.
334 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
337 select_interface(alt_ifc);
342 BYTE handle_get_configuration(void)
344 /* We only support configuration 0. */
348 BOOL handle_set_configuration(BYTE cfg)
350 /* We only support configuration 0. */
356 BOOL handle_vendorcommand(BYTE cmd)
360 /* Set red LED, clear after timeout. */
364 /* Clear EP0BCH/L for each valid command. */
365 if (cmd >= 0xe0 && cmd <= 0xe4) {
368 while (EP0CS & bmEPBUSY);
374 set_voltage(cmd - 0xe0, EP0BUF[0]);
377 set_samplerate(EP0BUF[0]);
384 set_numchannels(EP0BUF[0]);
388 return FALSE; /* Not handled by handlers. */
391 static void init(void)
398 /* In idle mode tristate all outputs. */
399 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
400 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
402 GPIFREADYSTAT = 0x00;
413 static void main(void)
420 /* Set up interrupts. */
429 /* Global (8051) interrupt enable. */
433 RCAP2L = -500 & 0xff;
434 RCAP2H = (-500 & 0xff00) >> 8;
457 /* Make sure ext wakeups are cleared. */
458 WAKEUPCS |= bmWU | bmWU2;
470 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
472 /* Resume (TRM 6.4). */
473 if (REMOTE_WAKEUP()) {
475 USBCS |= bmSIGRESUME;
477 USBCS &= ~bmSIGRESUME;