2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2009 Ubixum, Inc.
5 * Copyright (C) 2015 Jochen Hoenicke
7 * This library is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
12 * This library is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
21 #include <fx2macros.h>
23 #include <autovector.h>
27 /* Change to support as many interfaces as you need. */
28 static BYTE altiface = 0;
30 static volatile WORD ledcounter = 0;
32 static volatile __bit dosud = FALSE;
33 static volatile __bit dosuspend = FALSE;
35 extern __code BYTE highspd_dscr;
36 extern __code BYTE fullspd_dscr;
38 void resume_isr(void) __interrupt RESUME_ISR
43 void sudav_isr(void) __interrupt SUDAV_ISR
49 void usbreset_isr(void) __interrupt USBRESET_ISR
51 handle_hispeed(FALSE);
55 void hispeed_isr(void) __interrupt HISPEED_ISR
61 void suspend_isr(void) __interrupt SUSPEND_ISR
67 void timer2_isr(void) __interrupt TF2_ISR
71 if (--ledcounter == 0) {
81 * This sets three bits for each channel, one channel at a time.
82 * For channel 0 we want to set bits 5, 6 & 7
83 * For channel 1 we want to set bits 2, 3 & 4
85 * We convert the input values that are strange due to original
86 * firmware code into the value of the three bits as follows:
94 * The third bit is always zero since there are only four outputs connected
95 * in the serial selector chip.
97 * The multiplication of the converted value by 0x24 sets the relevant bits in
98 * both channels and then we mask it out to only affect the channel currently
101 static BOOL set_voltage(BYTE channel, BYTE val)
122 mask = (channel) ? 0xe0 : 0x1c;
123 IOC = (IOC & ~mask) | (bits & mask);
128 static BOOL set_numchannels(BYTE numchannels)
130 if (numchannels == 1 || numchannels == 2) {
131 BYTE fifocfg = 7 + numchannels;
132 EP2FIFOCFG = fifocfg;
133 EP6FIFOCFG = fifocfg;
140 static void clear_fifo(void)
153 static void stop_sampling(void)
157 INPKTEND = (altiface == 0) ? 6 : 2;
160 static void start_sampling(void)
166 for (i = 0; i < 1000; i++);
168 while (!(GPIFTRIG & 0x80))
175 GPIFTRIG = (altiface == 0) ? 6 : 4;
177 /* Set green LED, don't clear LED. */
183 static void select_interface(BYTE alt)
185 const BYTE *pPacketSize = \
186 ((USBCS & bmHSM) ? &highspd_dscr : &fullspd_dscr)
187 + (9 + (16 * alt) + 9 + 4);
196 EP6AUTOINLENL = pPacketSize[0];
197 EP6AUTOINLENH = pPacketSize[1];
203 EP2AUTOINLENL = pPacketSize[0];
204 EP2AUTOINLENH = pPacketSize[1] & 0x7;
205 EP2ISOINPKTS = (pPacketSize[1] >> 3) + 1;
209 static const struct samplerate_info {
218 { 48, 0x80, 0, 3, 0, 0x00, 0xea },
219 { 30, 0x80, 0, 3, 0, 0x00, 0xaa },
220 { 24, 1, 0, 2, 1, 0x40, 0xca },
221 { 16, 1, 1, 2, 0, 0x40, 0xca },
222 { 12, 2, 1, 2, 0, 0x40, 0xca },
223 { 8, 3, 2, 2, 0, 0x40, 0xca },
224 { 4, 6, 5, 2, 0, 0x40, 0xca },
225 { 2, 12, 11, 2, 0, 0x40, 0xca },
226 { 1, 24, 23, 2, 0, 0x40, 0xca },
227 { 50, 48, 47, 2, 0, 0x40, 0xca },
228 { 20, 120, 119, 2, 0, 0x40, 0xca },
229 { 10, 240, 239, 2, 0, 0x40, 0xca },
232 static BOOL set_samplerate(BYTE rate)
236 while (samplerates[i].rate != rate) {
238 if (i == sizeof(samplerates) / sizeof(samplerates[0]))
242 IFCONFIG = samplerates[i].ifcfg;
245 AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */
249 * The program for low-speed, e.g. 1 MHz, is:
250 * wait 24, CTL2=0, FIFO
254 * The program for 24 MHz is:
255 * wait 1, CTL2=0, FIFO
258 * The program for 30/48 MHz is:
259 * jump 0, CTL2=Z, FIFO, LOOP
262 /* LENGTH / BRANCH 0-7 */
263 EXTAUTODAT2 = samplerates[i].wait0;
264 EXTAUTODAT2 = samplerates[i].wait1;
273 EXTAUTODAT2 = samplerates[i].opc0;
274 EXTAUTODAT2 = samplerates[i].opc1;
275 EXTAUTODAT2 = 1; /* DATA=0 DP=1 */
283 EXTAUTODAT2 = samplerates[i].out0;
284 EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
285 EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
292 /* LOGIC FUNCTION 0-7 */
302 for (i = 0; i < 96; i++)
308 /* Set *alt_ifc to the current alt interface for ifc. */
309 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
319 * Return TRUE if you set the interface requested.
321 * Note: This function should reconfigure and reset the endpoints
322 * according to the interface descriptors you provided.
324 BOOL handle_set_interface(BYTE ifc,BYTE alt_ifc)
327 select_interface(alt_ifc);
332 BYTE handle_get_configuration(void)
334 /* We only support configuration 0. */
338 BOOL handle_set_configuration(BYTE cfg)
340 /* We only support configuration 0. */
346 BOOL handle_vendorcommand(BYTE cmd)
355 /* Clear EP0BCH/L for each valid command. */
356 if (cmd >= 0xe0 && cmd <= 0xe4) {
359 while (EP0CS & bmEPBUSY);
365 set_voltage(cmd - 0xe0, EP0BUF[0]);
368 set_samplerate(EP0BUF[0]);
375 set_numchannels(EP0BUF[0]);
379 return FALSE; /* Not handled by handlers. */
382 static void init(void)
387 /* In idle mode tristate all outputs. */
388 GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
389 GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
391 GPIFREADYSTAT = 0x00;
402 static void main(void)
409 /* Set up interrupts. */
418 /* Global (8051) interrupt enable. */
422 RCAP2L = -500 & 0xff;
423 RCAP2H = (-500 & 0xff00) >> 8;
444 /* Make sure ext wakeups are cleared. */
445 WAKEUPCS |= bmWU|bmWU2;
457 } while (!remote_wakeup_allowed && REMOTE_WAKEUP());
459 /* Resume (TRM 6.4). */
460 if (REMOTE_WAKEUP()) {
462 USBCS |= bmSIGRESUME;
464 USBCS &= ~bmSIGRESUME;