2 * This file is part of the fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
24 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
25 * The code is licensed under the terms of the GNU GPL, version 2 or later.
29 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
30 * - We use the internal 48MHz clock for GPIF.
31 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
32 * or PB0-PB7 + PD0-PD7 for 16-channel sampling.
33 * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
37 * - See http://sigrok.org/wiki/Fx2lafw
41 #include <fx2macros.h>
48 #include <gpif-acquisition.h>
51 volatile __bit got_sud;
54 static void setup_endpoints(void)
57 EP2CFG = (1 << 7) | /* EP is valid/activated */
58 (1 << 6) | /* EP direction: IN */
59 (1 << 5) | (0 << 4) | /* EP Type: bulk */
60 (1 << 3) | /* EP buffer size: 1024 */
61 (0 << 2) | /* Reserved. */
62 (0 << 1) | (0 << 0); /* EP buffering: quad buffering */
65 /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
68 EP1OUTCFG &= ~bmVALID;
77 /* EP2: Reset the FIFOs. */
78 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
81 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
82 EP2FIFOCFG = bmAUTOIN;
85 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
91 /* EP2: Set the GPIF flag to 'full'. */
92 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
96 static void send_fw_version(void)
98 /* Populate the buffer. */
99 struct version_info *const vi = (struct version_info *)EP0BUF;
100 vi->major = FX2LAFW_VERSION_MAJOR;
101 vi->minor = FX2LAFW_VERSION_MINOR;
103 /* Send the message. */
105 EP0BCL = sizeof(struct version_info);
108 static void send_revid_version(void)
112 /* Populate the buffer. */
113 p = (uint8_t *)EP0BUF;
116 /* Send the message. */
121 BOOL handle_vendorcommand(BYTE cmd)
123 /* Protocol implementation */
126 vendor_command = cmd;
130 case CMD_GET_FW_VERSION:
134 case CMD_GET_REVID_VERSION:
135 send_revid_version();
143 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
145 /* We only support interface 0, alternate interface 0. */
153 BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
155 /* We only support interface 0, alternate interface 0. */
156 if (ifc != 0 || alt_ifc != 0)
159 /* Perform procedure from TRM, section 2.3.7: */
163 /* (2) Reset data toggles of the EPs in the interface. */
164 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
167 /* (3) Restore EPs to their default conditions. */
168 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
172 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
177 BYTE handle_get_configuration(void)
179 /* We only support configuration 1. */
183 BOOL handle_set_configuration(BYTE cfg)
185 /* We only support configuration 1. */
186 return (cfg == 1) ? TRUE : FALSE;
189 void sudav_isr(void) __interrupt SUDAV_ISR
195 void sof_isr(void) __interrupt SOF_ISR __using 1
200 void usbreset_isr(void) __interrupt USBRESET_ISR
202 handle_hispeed(FALSE);
206 void hispeed_isr(void) __interrupt HISPEED_ISR
208 handle_hispeed(TRUE);
212 void fx2lafw_init(void)
214 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
215 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
227 /* TODO: Does the order of the following lines matter? */
233 /* Global (8051) interrupt enable. */
236 /* Setup the endpoints. */
239 /* Put the FX2 into GPIF master mode and setup the GPIF. */
243 void fx2lafw_poll(void)
250 if (vendor_command) {
251 switch (vendor_command) {
253 if ((EP0CS & bmEPBUSY) != 0)
256 if (EP0BCL == sizeof(struct cmd_start_acquisition)) {
257 gpif_acquisition_start(
258 (const struct cmd_start_acquisition *)EP0BUF);
261 /* Acknowledge the vendor command. */
265 /* Unimplemented command. */