2 * This file is part of the sigrok-firmware-fx2lafw project.
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
21 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
23 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
24 * The code is licensed under the terms of the GNU GPL, version 2 or later.
28 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
29 * - We use the internal 48MHz clock for GPIF.
30 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
31 * or PB0-PB7 + PD0-PD7 for 16-channel sampling.
32 * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
36 * - See http://sigrok.org/wiki/Fx2lafw
40 #include <fx2macros.h>
48 #include <gpif-acquisition.h>
51 volatile __bit got_sud;
54 volatile WORD ledcounter = 0;
56 static void setup_endpoints(void)
59 EP2CFG = (1u << 7) | /* EP is valid/activated */
60 (1u << 6) | /* EP direction: IN */
61 (1u << 5) | (0u << 4) | /* EP Type: bulk */
62 (1u << 3) | /* EP buffer size: 1024 */
63 (0u << 2) | /* Reserved. */
64 (0u << 1) | (0u << 0); /* EP buffering: quad buffering */
67 /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
70 EP1OUTCFG &= ~bmVALID;
79 /* EP2: Reset the FIFOs. */
80 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
83 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
84 EP2FIFOCFG = bmAUTOIN;
87 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
93 /* EP2: Set the GPIF flag to 'full'. */
94 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
98 static void send_fw_version(void)
100 /* Populate the buffer. */
101 struct version_info *const vi = (struct version_info *)EP0BUF;
102 vi->major = FX2LAFW_VERSION_MAJOR;
103 vi->minor = FX2LAFW_VERSION_MINOR;
105 /* Send the message. */
108 EP0BCL = sizeof(struct version_info);
112 static void send_revid_version(void)
116 /* Populate the buffer. */
117 p = (uint8_t *)EP0BUF;
120 /* Send the message. */
127 BOOL handle_vendorcommand(BYTE cmd)
129 /* Protocol implementation */
132 /* Tell hardware we are ready to receive data. */
133 vendor_command = cmd;
137 case CMD_GET_FW_VERSION:
140 case CMD_GET_REVID_VERSION:
141 send_revid_version();
148 BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
150 /* We only support interface 0, alternate interface 0. */
158 BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
160 /* We only support interface 0, alternate interface 0. */
161 if (ifc != 0 || alt_ifc != 0)
164 /* Perform procedure from TRM, section 2.3.7: */
168 /* (2) Reset data toggles of the EPs in the interface. */
169 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
172 /* (3) Restore EPs to their default conditions. */
173 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
177 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
182 BYTE handle_get_configuration(void)
184 /* We only support configuration 1. */
188 BOOL handle_set_configuration(BYTE cfg)
190 /* We only support configuration 1. */
191 return (cfg == 1) ? TRUE : FALSE;
194 void sudav_isr(void) __interrupt SUDAV_ISR
200 /* IN BULK NAK - the host started requesting data. */
201 void ibn_isr(void) __interrupt IBN_ISR
204 * If the IBN interrupt is not disabled, clearing
205 * does not work. See AN78446, 6.2.
207 BYTE ibnsave = IBNIE;
212 * If the host sent the START command, start the GPIF
213 * engine. The host will repeat the BULK IN in the next
216 if ((IBNIRQ & bmEP2IBN) && (gpif_acquiring == PREPARED)) {
219 gpif_acquisition_start();
222 /* Clear IBN flags for all EPs. */
232 void usbreset_isr(void) __interrupt USBRESET_ISR
234 handle_hispeed(FALSE);
238 void hispeed_isr(void) __interrupt HISPEED_ISR
240 handle_hispeed(TRUE);
244 void timer2_isr(void) __interrupt TF2_ISR
246 /* Blink LED during acquisition, keep it on otherwise. */
247 if (gpif_acquiring == RUNNING) {
248 if (--ledcounter == 0) {
252 } else if (gpif_acquiring == STOPPED) {
258 void fx2lafw_init(void)
260 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
261 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
273 /* TODO: Does the order of the following lines matter? */
283 RCAP2L = -500 & 0xff;
284 RCAP2H = (-500 & 0xff00) >> 8;
289 /* Global (8051) interrupt enable. */
292 /* Setup the endpoints. */
295 /* Put the FX2 into GPIF master mode and setup the GPIF. */
299 void fx2lafw_poll(void)
306 if (vendor_command) {
307 switch (vendor_command) {
309 if ((EP0CS & bmEPBUSY) != 0)
312 if (EP0BCL == sizeof(struct cmd_start_acquisition)) {
313 gpif_acquisition_prepare(
314 (const struct cmd_start_acquisition *)EP0BUF);
317 /* Acknowledge the vendor command. */
321 /* Unimplemented command. */