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sysclk-lwla: Skip unused registers in status poll
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Daniel Elstner <daniel.kitta@gmail.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#ifndef LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
21#define LIBSIGROK_HARDWARE_SYSCLK_LWLA_PROTOCOL_H
22
23#define LOG_PREFIX "sysclk-lwla"
24
25#include <stdint.h>
26#include <libusb.h>
27#include <glib.h>
28#include <libsigrok/libsigrok.h>
29#include <libsigrok-internal.h>
30
31#define VENDOR_NAME "SysClk"
32
33/* Maximum configurable sample count limit.
34 * Due to compression, there is no meaningful hardware limit the driver
35 * could report. So this value is less than 2^64-1 for no reason other
36 * than to safeguard against integer overflows.
37 */
38#define MAX_LIMIT_SAMPLES (UINT64_C(1000) * 1000 * 1000 * 1000)
39
40/* Maximum configurable acquisition time limit.
41 * Due to compression, there is no hardware limit that would be meaningful
42 * in practice. However, the LWLA1016 reports the elapsed time as a 32-bit
43 * value, so keep this below 2^32.
44 */
45#define MAX_LIMIT_MSEC (1000 * 1000 * 1000)
46
47struct acquisition_state;
48
49/* USB vendor and product IDs.
50 */
51enum {
52 USB_VID_SYSCLK = 0x2961,
53 USB_PID_LWLA1016 = 0x6688,
54 USB_PID_LWLA1034 = 0x6689,
55};
56
57/* USB device characteristics.
58 */
59enum {
60 USB_CONFIG = 1,
61 USB_INTERFACE = 0,
62 USB_TIMEOUT_MS = 3000,
63};
64
65/** USB device end points.
66 */
67enum usb_endpoint {
68 EP_COMMAND = 2,
69 EP_CONFIG = 4,
70 EP_REPLY = 6 | LIBUSB_ENDPOINT_IN
71};
72
73/** LWLA1034 clock sources.
74 */
75enum clock_source {
76 CLOCK_INTERNAL = 0,
77 CLOCK_EXT_CLK,
78};
79
80/** LWLA1034 trigger sources.
81 */
82enum trigger_source {
83 TRIGGER_CHANNELS = 0,
84 TRIGGER_EXT_TRG,
85};
86
87/** Edge choices for the LWLA1034 external clock and trigger inputs.
88 */
89enum signal_edge {
90 EDGE_POSITIVE = 0,
91 EDGE_NEGATIVE,
92};
93
94/* Common indicator for no or unknown FPGA config. */
95enum {
96 FPGA_NOCONF = -1,
97};
98
99/** Acquisition protocol states.
100 */
101enum protocol_state {
102 /* idle states */
103 STATE_IDLE = 0,
104 STATE_STATUS_WAIT,
105 /* device command states */
106 STATE_START_CAPTURE,
107 STATE_STOP_CAPTURE,
108 STATE_READ_PREPARE,
109 STATE_READ_FINISH,
110 /* command followed by response */
111 STATE_EXPECT_RESPONSE = 1 << 3,
112 STATE_STATUS_REQUEST = STATE_EXPECT_RESPONSE,
113 STATE_LENGTH_REQUEST,
114 STATE_READ_REQUEST,
115};
116
117/** Private, per-device-instance driver context.
118 */
119struct dev_context {
120 uint64_t samplerate; /* requested samplerate */
121 uint64_t limit_msec; /* requested capture duration in ms */
122 uint64_t limit_samples; /* requested capture length in samples */
123
124 uint64_t channel_mask; /* bit mask of enabled channels */
125 uint64_t trigger_mask; /* trigger enable mask */
126 uint64_t trigger_edge_mask; /* trigger type mask */
127 uint64_t trigger_values; /* trigger level/slope bits */
128
129 const struct model_info *model; /* device model descriptor */
130 struct acquisition_state *acquisition; /* running capture state */
131 int active_fpga_config; /* FPGA configuration index */
132
133 enum protocol_state state; /* async protocol state */
134 gboolean cancel_requested; /* stop after current transfer */
135 gboolean transfer_error; /* error during device communication */
136
137 gboolean cfg_rle; /* RLE compression setting */
138 enum clock_source cfg_clock_source; /* clock source setting */
139 enum signal_edge cfg_clock_edge; /* ext clock edge setting */
140 enum trigger_source cfg_trigger_source; /* trigger source setting */
141 enum signal_edge cfg_trigger_slope; /* ext trigger slope setting */
142
143};
144
145/** LWLA model descriptor.
146 */
147struct model_info {
148 char name[12];
149 int num_channels;
150
151 unsigned int num_devopts;
152 uint32_t devopts[8];
153
154 unsigned int num_samplerates;
155 uint64_t samplerates[20];
156
157 int (*apply_fpga_config)(const struct sr_dev_inst *sdi);
158 int (*device_init_check)(const struct sr_dev_inst *sdi);
159 int (*setup_acquisition)(const struct sr_dev_inst *sdi);
160
161 int (*prepare_request)(const struct sr_dev_inst *sdi);
162 int (*handle_response)(const struct sr_dev_inst *sdi);
163};
164
165extern SR_PRIV const struct model_info lwla1016_info;
166extern SR_PRIV const struct model_info lwla1034_info;
167
168SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);
169
170#endif