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Remove unnecessary std_init() wrapper functions
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <config.h>
23#include <fcntl.h>
24#include <unistd.h>
25#include <stdlib.h>
26#include <string.h>
27#include <strings.h>
28#include <math.h>
29#include <glib.h>
30#include <libsigrok/libsigrok.h>
31#include "libsigrok-internal.h"
32#include "scpi.h"
33#include "protocol.h"
34
35static const uint32_t scanopts[] = {
36 SR_CONF_CONN,
37 SR_CONF_SERIALCOMM
38};
39
40static const uint32_t devopts[] = {
41 SR_CONF_OSCILLOSCOPE,
42 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
43 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
44 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
45 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
46 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
47 SR_CONF_NUM_HDIV | SR_CONF_GET,
48 SR_CONF_SAMPLERATE | SR_CONF_GET,
49 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
50};
51
52static const uint32_t analog_devopts[] = {
53 SR_CONF_NUM_VDIV | SR_CONF_GET,
54 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
55 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
56};
57
58static const uint64_t timebases[][2] = {
59 /* nanoseconds */
60 { 1, 1000000000 },
61 { 2, 1000000000 },
62 { 5, 1000000000 },
63 { 10, 1000000000 },
64 { 20, 1000000000 },
65 { 50, 1000000000 },
66 { 100, 1000000000 },
67 { 500, 1000000000 },
68 /* microseconds */
69 { 1, 1000000 },
70 { 2, 1000000 },
71 { 5, 1000000 },
72 { 10, 1000000 },
73 { 20, 1000000 },
74 { 50, 1000000 },
75 { 100, 1000000 },
76 { 200, 1000000 },
77 { 500, 1000000 },
78 /* milliseconds */
79 { 1, 1000 },
80 { 2, 1000 },
81 { 5, 1000 },
82 { 10, 1000 },
83 { 20, 1000 },
84 { 50, 1000 },
85 { 100, 1000 },
86 { 200, 1000 },
87 { 500, 1000 },
88 /* seconds */
89 { 1, 1 },
90 { 2, 1 },
91 { 5, 1 },
92 { 10, 1 },
93 { 20, 1 },
94 { 50, 1 },
95 { 100, 1 },
96 { 200, 1 },
97 { 500, 1 },
98 { 1000, 1 },
99};
100
101static const uint64_t vdivs[][2] = {
102 /* microvolts */
103 { 500, 1000000 },
104 /* millivolts */
105 { 1, 1000 },
106 { 2, 1000 },
107 { 5, 1000 },
108 { 10, 1000 },
109 { 20, 1000 },
110 { 50, 1000 },
111 { 100, 1000 },
112 { 200, 1000 },
113 { 500, 1000 },
114 /* volts */
115 { 1, 1 },
116 { 2, 1 },
117 { 5, 1 },
118 { 10, 1 },
119 { 20, 1 },
120 { 50, 1 },
121 { 100, 1 },
122};
123
124#define NUM_TIMEBASE ARRAY_SIZE(timebases)
125#define NUM_VDIV ARRAY_SIZE(vdivs)
126
127static const char *trigger_sources[] = {
128 "CH1",
129 "CH2",
130 "CH3",
131 "CH4",
132 "EXT",
133 "AC Line",
134 "D0",
135 "D1",
136 "D2",
137 "D3",
138 "D4",
139 "D5",
140 "D6",
141 "D7",
142 "D8",
143 "D9",
144 "D10",
145 "D11",
146 "D12",
147 "D13",
148 "D14",
149 "D15",
150};
151
152static const char *trigger_slopes[] = {
153 "r",
154 "f",
155};
156
157static const char *coupling[] = {
158 "AC",
159 "DC",
160 "GND",
161};
162
163/* Do not change the order of entries */
164static const char *data_sources[] = {
165 "Live",
166 "Memory",
167 "Segmented",
168};
169
170enum vendor {
171 RIGOL,
172 AGILENT,
173};
174
175enum series {
176 VS5000,
177 DS1000,
178 DS2000,
179 DS2000A,
180 DSO1000,
181 DS1000Z,
182};
183
184/* short name, full name */
185static const struct rigol_ds_vendor supported_vendors[] = {
186 [RIGOL] = {"Rigol", "Rigol Technologies"},
187 [AGILENT] = {"Agilent", "Agilent Technologies"},
188};
189
190#define VENDOR(x) &supported_vendors[x]
191/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
192 * live waveform samples, memory buffer samples */
193static const struct rigol_ds_series supported_series[] = {
194 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
195 {50, 1}, {2, 1000}, 14, 2048, 0},
196 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
197 {50, 1}, {2, 1000}, 12, 600, 1048576},
198 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
199 {500, 1}, {500, 1000000}, 14, 1400, 14000},
200 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
201 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
202 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
203 {50, 1}, {2, 1000}, 12, 600, 20480},
204 [DS1000Z] = {VENDOR(RIGOL), "DS1000Z", PROTOCOL_V4, FORMAT_IEEE488_2,
205 {50, 1}, {1, 1000}, 12, 1200, 12000000},
206};
207
208#define SERIES(x) &supported_series[x]
209/* series, model, min timebase, analog channels, digital */
210static const struct rigol_ds_model supported_models[] = {
211 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
212 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
213 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
214 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
215 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
216 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
217 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
218 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
219 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
220 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
221 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
222 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
223 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
224 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
225 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
226 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
227 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
228 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
229 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
230 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
231 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
232 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
233 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
234 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
235 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
236 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
237 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
238 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
239 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
240 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
241 {SERIES(DS1000Z), "DS1054Z", {5, 1000000000}, 4, false},
242 {SERIES(DS1000Z), "DS1074Z", {5, 1000000000}, 4, false},
243 {SERIES(DS1000Z), "DS1104Z", {5, 1000000000}, 4, false},
244 {SERIES(DS1000Z), "DS1074Z-S", {5, 1000000000}, 4, false},
245 {SERIES(DS1000Z), "DS1104Z-S", {5, 1000000000}, 4, false},
246 {SERIES(DS1000Z), "MSO1074Z", {5, 1000000000}, 4, true},
247 {SERIES(DS1000Z), "MSO1104Z", {5, 1000000000}, 4, true},
248 {SERIES(DS1000Z), "MSO1074Z-S", {5, 1000000000}, 4, true},
249 {SERIES(DS1000Z), "MSO1104Z-S", {5, 1000000000}, 4, true},
250};
251
252SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
253
254static void clear_helper(void *priv)
255{
256 struct dev_context *devc;
257 unsigned int i;
258
259 devc = priv;
260 g_free(devc->data);
261 g_free(devc->buffer);
262 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
263 g_free(devc->coupling[i]);
264 g_free(devc->trigger_source);
265 g_free(devc->trigger_slope);
266 g_free(devc->analog_groups);
267 g_free(devc);
268}
269
270static int dev_clear(const struct sr_dev_driver *di)
271{
272 return std_dev_clear(di, clear_helper);
273}
274
275static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
276{
277 struct dev_context *devc;
278 struct sr_dev_inst *sdi;
279 struct sr_scpi_hw_info *hw_info;
280 struct sr_channel *ch;
281 long n[3];
282 unsigned int i;
283 const struct rigol_ds_model *model = NULL;
284 gchar *channel_name, **version;
285
286 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
287 sr_info("Couldn't get IDN response, retrying.");
288 sr_scpi_close(scpi);
289 sr_scpi_open(scpi);
290 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
291 sr_info("Couldn't get IDN response.");
292 return NULL;
293 }
294 }
295
296 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
297 if (!g_ascii_strcasecmp(hw_info->manufacturer,
298 supported_models[i].series->vendor->full_name) &&
299 !strcmp(hw_info->model, supported_models[i].name)) {
300 model = &supported_models[i];
301 break;
302 }
303 }
304
305 if (!model) {
306 sr_scpi_hw_info_free(hw_info);
307 return NULL;
308 }
309
310 sdi = g_malloc0(sizeof(struct sr_dev_inst));
311 sdi->vendor = g_strdup(model->series->vendor->name);
312 sdi->model = g_strdup(model->name);
313 sdi->version = g_strdup(hw_info->firmware_version);
314 sdi->conn = scpi;
315 sdi->driver = &rigol_ds_driver_info;
316 sdi->inst_type = SR_INST_SCPI;
317 sdi->serial_num = g_strdup(hw_info->serial_number);
318 devc = g_malloc0(sizeof(struct dev_context));
319 devc->limit_frames = 0;
320 devc->model = model;
321 devc->format = model->series->format;
322
323 /* DS1000 models with firmware before 0.2.4 used the old data format. */
324 if (model->series == SERIES(DS1000)) {
325 version = g_strsplit(hw_info->firmware_version, ".", 0);
326 do {
327 if (!version[0] || !version[1] || !version[2])
328 break;
329 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
330 break;
331 for (i = 0; i < 3; i++) {
332 if (sr_atol(version[i], &n[i]) != SR_OK)
333 break;
334 }
335 if (i != 3)
336 break;
337 scpi->firmware_version = n[0] * 100 + n[1] * 10 + n[2];
338 if (scpi->firmware_version < 24) {
339 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
340 devc->format = FORMAT_RAW;
341 }
342 break;
343 } while (0);
344 g_strfreev(version);
345 }
346
347 sr_scpi_hw_info_free(hw_info);
348
349 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
350 model->analog_channels);
351
352 for (i = 0; i < model->analog_channels; i++) {
353 channel_name = g_strdup_printf("CH%d", i + 1);
354 ch = sr_channel_new(sdi, i, SR_CHANNEL_ANALOG, TRUE, channel_name);
355
356 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
357
358 devc->analog_groups[i]->name = channel_name;
359 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
360 sdi->channel_groups = g_slist_append(sdi->channel_groups,
361 devc->analog_groups[i]);
362 }
363
364 if (devc->model->has_digital) {
365 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group));
366
367 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
368 channel_name = g_strdup_printf("D%d", i);
369 ch = sr_channel_new(sdi, i, SR_CHANNEL_LOGIC, TRUE, channel_name);
370 g_free(channel_name);
371 devc->digital_group->channels = g_slist_append(
372 devc->digital_group->channels, ch);
373 }
374 devc->digital_group->name = g_strdup("LA");
375 sdi->channel_groups = g_slist_append(sdi->channel_groups,
376 devc->digital_group);
377 }
378
379 for (i = 0; i < NUM_TIMEBASE; i++) {
380 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
381 devc->timebases = &timebases[i];
382 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
383 devc->num_timebases = &timebases[i] - devc->timebases + 1;
384 }
385
386 for (i = 0; i < NUM_VDIV; i++) {
387 if (!memcmp(&devc->model->series->min_vdiv,
388 &vdivs[i], sizeof(uint64_t[2]))) {
389 devc->vdivs = &vdivs[i];
390 devc->num_vdivs = NUM_VDIV - i;
391 }
392 }
393
394 devc->buffer = g_malloc(ACQ_BUFFER_SIZE);
395 devc->data = g_malloc(ACQ_BUFFER_SIZE * sizeof(float));
396
397 devc->data_source = DATA_SOURCE_LIVE;
398
399 sdi->priv = devc;
400
401 return sdi;
402}
403
404static GSList *scan(struct sr_dev_driver *di, GSList *options)
405{
406 return sr_scpi_scan(di->context, options, probe_device);
407}
408
409static int dev_open(struct sr_dev_inst *sdi)
410{
411 int ret;
412 struct sr_scpi_dev_inst *scpi = sdi->conn;
413
414 if ((ret = sr_scpi_open(scpi)) < 0) {
415 sr_err("Failed to open SCPI device: %s.", sr_strerror(ret));
416 return SR_ERR;
417 }
418
419 if ((ret = rigol_ds_get_dev_cfg(sdi)) < 0) {
420 sr_err("Failed to get device config: %s.", sr_strerror(ret));
421 return SR_ERR;
422 }
423
424 sdi->status = SR_ST_ACTIVE;
425
426 return SR_OK;
427}
428
429static int dev_close(struct sr_dev_inst *sdi)
430{
431 struct sr_scpi_dev_inst *scpi;
432 struct dev_context *devc;
433
434 if (sdi->status != SR_ST_ACTIVE)
435 return SR_ERR_DEV_CLOSED;
436
437 scpi = sdi->conn;
438 devc = sdi->priv;
439
440 if (devc->model->series->protocol == PROTOCOL_V2)
441 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
442
443 if (scpi) {
444 if (sr_scpi_close(scpi) < 0)
445 return SR_ERR;
446 sdi->status = SR_ST_INACTIVE;
447 }
448
449 return SR_OK;
450}
451
452static int analog_frame_size(const struct sr_dev_inst *sdi)
453{
454 struct dev_context *devc = sdi->priv;
455 struct sr_channel *ch;
456 int analog_channels = 0;
457 GSList *l;
458
459 for (l = sdi->channels; l; l = l->next) {
460 ch = l->data;
461 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
462 analog_channels++;
463 }
464
465 if (analog_channels == 0)
466 return 0;
467
468 switch (devc->data_source) {
469 case DATA_SOURCE_LIVE:
470 return devc->model->series->live_samples;
471 case DATA_SOURCE_MEMORY:
472 return devc->model->series->buffer_samples / analog_channels;
473 default:
474 return 0;
475 }
476}
477
478static int digital_frame_size(const struct sr_dev_inst *sdi)
479{
480 struct dev_context *devc = sdi->priv;
481
482 switch (devc->data_source) {
483 case DATA_SOURCE_LIVE:
484 return devc->model->series->live_samples * 2;
485 case DATA_SOURCE_MEMORY:
486 return devc->model->series->buffer_samples * 2;
487 default:
488 return 0;
489 }
490}
491
492static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
493 const struct sr_channel_group *cg)
494{
495 struct dev_context *devc;
496 struct sr_channel *ch;
497 const char *tmp_str;
498 uint64_t samplerate;
499 int analog_channel = -1;
500 float smallest_diff = INFINITY;
501 int idx = -1;
502 unsigned i;
503
504 if (!sdi || !(devc = sdi->priv))
505 return SR_ERR_ARG;
506
507 /* If a channel group is specified, it must be a valid one. */
508 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
509 sr_err("Invalid channel group specified.");
510 return SR_ERR;
511 }
512
513 if (cg) {
514 ch = g_slist_nth_data(cg->channels, 0);
515 if (!ch)
516 return SR_ERR;
517 if (ch->type == SR_CHANNEL_ANALOG) {
518 if (ch->name[2] < '1' || ch->name[2] > '4')
519 return SR_ERR;
520 analog_channel = ch->name[2] - '1';
521 }
522 }
523
524 switch (key) {
525 case SR_CONF_NUM_HDIV:
526 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
527 break;
528 case SR_CONF_NUM_VDIV:
529 *data = g_variant_new_int32(devc->num_vdivs);
530 break;
531 case SR_CONF_DATA_SOURCE:
532 if (devc->data_source == DATA_SOURCE_LIVE)
533 *data = g_variant_new_string("Live");
534 else if (devc->data_source == DATA_SOURCE_MEMORY)
535 *data = g_variant_new_string("Memory");
536 else
537 *data = g_variant_new_string("Segmented");
538 break;
539 case SR_CONF_SAMPLERATE:
540 if (devc->data_source == DATA_SOURCE_LIVE) {
541 samplerate = analog_frame_size(sdi) /
542 (devc->timebase * devc->model->series->num_horizontal_divs);
543 *data = g_variant_new_uint64(samplerate);
544 } else {
545 sr_dbg("Unknown data source: %d.", devc->data_source);
546 return SR_ERR_NA;
547 }
548 break;
549 case SR_CONF_TRIGGER_SOURCE:
550 if (!strcmp(devc->trigger_source, "ACL"))
551 tmp_str = "AC Line";
552 else if (!strcmp(devc->trigger_source, "CHAN1"))
553 tmp_str = "CH1";
554 else if (!strcmp(devc->trigger_source, "CHAN2"))
555 tmp_str = "CH2";
556 else if (!strcmp(devc->trigger_source, "CHAN3"))
557 tmp_str = "CH3";
558 else if (!strcmp(devc->trigger_source, "CHAN4"))
559 tmp_str = "CH4";
560 else
561 tmp_str = devc->trigger_source;
562 *data = g_variant_new_string(tmp_str);
563 break;
564 case SR_CONF_TRIGGER_SLOPE:
565 if (!strncmp(devc->trigger_slope, "POS", 3)) {
566 tmp_str = "r";
567 } else if (!strncmp(devc->trigger_slope, "NEG", 3)) {
568 tmp_str = "f";
569 } else {
570 sr_dbg("Unknown trigger slope: '%s'.", devc->trigger_slope);
571 return SR_ERR_NA;
572 }
573 *data = g_variant_new_string(tmp_str);
574 break;
575 case SR_CONF_TIMEBASE:
576 for (i = 0; i < devc->num_timebases; i++) {
577 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
578 float diff = fabs(devc->timebase - tb);
579 if (diff < smallest_diff) {
580 smallest_diff = diff;
581 idx = i;
582 }
583 }
584 if (idx < 0) {
585 sr_dbg("Negative timebase index: %d.", idx);
586 return SR_ERR_NA;
587 }
588 *data = g_variant_new("(tt)", devc->timebases[idx][0],
589 devc->timebases[idx][1]);
590 break;
591 case SR_CONF_VDIV:
592 if (analog_channel < 0) {
593 sr_dbg("Negative analog channel: %d.", analog_channel);
594 return SR_ERR_NA;
595 }
596 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
597 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
598 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
599 if (diff < smallest_diff) {
600 smallest_diff = diff;
601 idx = i;
602 }
603 }
604 if (idx < 0) {
605 sr_dbg("Negative vdiv index: %d.", idx);
606 return SR_ERR_NA;
607 }
608 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
609 break;
610 case SR_CONF_COUPLING:
611 if (analog_channel < 0) {
612 sr_dbg("Negative analog channel: %d.", analog_channel);
613 return SR_ERR_NA;
614 }
615 *data = g_variant_new_string(devc->coupling[analog_channel]);
616 break;
617 default:
618 return SR_ERR_NA;
619 }
620
621 return SR_OK;
622}
623
624static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
625 const struct sr_channel_group *cg)
626{
627 struct dev_context *devc;
628 uint64_t p, q;
629 double t_dbl;
630 unsigned int i, j;
631 int ret;
632 const char *tmp_str;
633 char buffer[16];
634
635 if (!(devc = sdi->priv))
636 return SR_ERR_ARG;
637
638 if (sdi->status != SR_ST_ACTIVE)
639 return SR_ERR_DEV_CLOSED;
640
641 /* If a channel group is specified, it must be a valid one. */
642 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
643 sr_err("Invalid channel group specified.");
644 return SR_ERR;
645 }
646
647 ret = SR_OK;
648 switch (key) {
649 case SR_CONF_LIMIT_FRAMES:
650 devc->limit_frames = g_variant_get_uint64(data);
651 break;
652 case SR_CONF_TRIGGER_SLOPE:
653 tmp_str = g_variant_get_string(data, NULL);
654
655 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r')) {
656 sr_err("Unknown trigger slope: '%s'.",
657 (tmp_str) ? tmp_str : "NULL");
658 return SR_ERR_ARG;
659 }
660
661 g_free(devc->trigger_slope);
662 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
663 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
664 break;
665 case SR_CONF_HORIZ_TRIGGERPOS:
666 t_dbl = g_variant_get_double(data);
667 if (t_dbl < 0.0 || t_dbl > 1.0) {
668 sr_err("Invalid horiz. trigger position: %g.", t_dbl);
669 return SR_ERR;
670 }
671 devc->horiz_triggerpos = t_dbl;
672 /* We have the trigger offset as a percentage of the frame, but
673 * need to express this in seconds. */
674 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
675 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
676 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
677 break;
678 case SR_CONF_TIMEBASE:
679 g_variant_get(data, "(tt)", &p, &q);
680 for (i = 0; i < devc->num_timebases; i++) {
681 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
682 devc->timebase = (float)p / q;
683 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
684 devc->timebase);
685 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
686 break;
687 }
688 }
689 if (i == devc->num_timebases) {
690 sr_err("Invalid timebase index: %d.", i);
691 ret = SR_ERR_ARG;
692 }
693 break;
694 case SR_CONF_TRIGGER_SOURCE:
695 tmp_str = g_variant_get_string(data, NULL);
696 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
697 if (!strcmp(trigger_sources[i], tmp_str)) {
698 g_free(devc->trigger_source);
699 devc->trigger_source = g_strdup(trigger_sources[i]);
700 if (!strcmp(devc->trigger_source, "AC Line"))
701 tmp_str = "ACL";
702 else if (!strcmp(devc->trigger_source, "CH1"))
703 tmp_str = "CHAN1";
704 else if (!strcmp(devc->trigger_source, "CH2"))
705 tmp_str = "CHAN2";
706 else if (!strcmp(devc->trigger_source, "CH3"))
707 tmp_str = "CHAN3";
708 else if (!strcmp(devc->trigger_source, "CH4"))
709 tmp_str = "CHAN4";
710 else
711 tmp_str = (char *)devc->trigger_source;
712 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
713 break;
714 }
715 }
716 if (i == ARRAY_SIZE(trigger_sources)) {
717 sr_err("Invalid trigger source index: %d.", i);
718 ret = SR_ERR_ARG;
719 }
720 break;
721 case SR_CONF_VDIV:
722 if (!cg) {
723 sr_err("No channel group specified.");
724 return SR_ERR_CHANNEL_GROUP;
725 }
726 g_variant_get(data, "(tt)", &p, &q);
727 for (i = 0; i < devc->model->analog_channels; i++) {
728 if (cg == devc->analog_groups[i]) {
729 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
730 if (vdivs[j][0] != p || vdivs[j][1] != q)
731 continue;
732 devc->vdiv[i] = (float)p / q;
733 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
734 devc->vdiv[i]);
735 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
736 buffer);
737 }
738 sr_err("Invalid vdiv index: %d.", j);
739 return SR_ERR_ARG;
740 }
741 }
742 sr_dbg("Didn't set vdiv, unknown channel(group).");
743 return SR_ERR_NA;
744 case SR_CONF_COUPLING:
745 if (!cg) {
746 sr_err("No channel group specified.");
747 return SR_ERR_CHANNEL_GROUP;
748 }
749 tmp_str = g_variant_get_string(data, NULL);
750 for (i = 0; i < devc->model->analog_channels; i++) {
751 if (cg == devc->analog_groups[i]) {
752 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
753 if (!strcmp(tmp_str, coupling[j])) {
754 g_free(devc->coupling[i]);
755 devc->coupling[i] = g_strdup(coupling[j]);
756 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
757 devc->coupling[i]);
758 }
759 }
760 sr_err("Invalid coupling index: %d.", j);
761 return SR_ERR_ARG;
762 }
763 }
764 sr_dbg("Didn't set coupling, unknown channel(group).");
765 return SR_ERR_NA;
766 case SR_CONF_DATA_SOURCE:
767 tmp_str = g_variant_get_string(data, NULL);
768 if (!strcmp(tmp_str, "Live"))
769 devc->data_source = DATA_SOURCE_LIVE;
770 else if (devc->model->series->protocol >= PROTOCOL_V2
771 && !strcmp(tmp_str, "Memory"))
772 devc->data_source = DATA_SOURCE_MEMORY;
773 else if (devc->model->series->protocol >= PROTOCOL_V3
774 && !strcmp(tmp_str, "Segmented"))
775 devc->data_source = DATA_SOURCE_SEGMENTED;
776 else {
777 sr_err("Unknown data source: '%s'.", tmp_str);
778 return SR_ERR;
779 }
780 break;
781 default:
782 return SR_ERR_NA;
783 }
784
785 return ret;
786}
787
788static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
789 const struct sr_channel_group *cg)
790{
791 GVariant *tuple, *rational[2];
792 GVariantBuilder gvb;
793 unsigned int i;
794 struct dev_context *devc = NULL;
795
796 if (key == SR_CONF_SCAN_OPTIONS) {
797 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
798 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
799 return SR_OK;
800 } else if (key == SR_CONF_DEVICE_OPTIONS && !cg) {
801 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
802 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
803 return SR_OK;
804 }
805
806 /* Every other option requires a valid device instance. */
807 if (!sdi || !(devc = sdi->priv))
808 return SR_ERR_ARG;
809
810 /* If a channel group is specified, it must be a valid one. */
811 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
812 sr_err("Invalid channel group specified.");
813 return SR_ERR;
814 }
815
816 switch (key) {
817 case SR_CONF_DEVICE_OPTIONS:
818 if (!cg) {
819 sr_err("No channel group specified.");
820 return SR_ERR_CHANNEL_GROUP;
821 }
822 if (cg == devc->digital_group) {
823 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
824 NULL, 0, sizeof(uint32_t));
825 return SR_OK;
826 } else {
827 for (i = 0; i < devc->model->analog_channels; i++) {
828 if (cg == devc->analog_groups[i]) {
829 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
830 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
831 return SR_OK;
832 }
833 }
834 return SR_ERR_NA;
835 }
836 break;
837 case SR_CONF_COUPLING:
838 if (!cg) {
839 sr_err("No channel group specified.");
840 return SR_ERR_CHANNEL_GROUP;
841 }
842 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
843 break;
844 case SR_CONF_VDIV:
845 if (!devc)
846 /* Can't know this until we have the exact model. */
847 return SR_ERR_ARG;
848 if (!cg) {
849 sr_err("No channel group specified.");
850 return SR_ERR_CHANNEL_GROUP;
851 }
852 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
853 for (i = 0; i < devc->num_vdivs; i++) {
854 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
855 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
856 tuple = g_variant_new_tuple(rational, 2);
857 g_variant_builder_add_value(&gvb, tuple);
858 }
859 *data = g_variant_builder_end(&gvb);
860 break;
861 case SR_CONF_TIMEBASE:
862 if (!devc)
863 /* Can't know this until we have the exact model. */
864 return SR_ERR_ARG;
865 if (devc->num_timebases <= 0)
866 return SR_ERR_NA;
867 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
868 for (i = 0; i < devc->num_timebases; i++) {
869 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
870 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
871 tuple = g_variant_new_tuple(rational, 2);
872 g_variant_builder_add_value(&gvb, tuple);
873 }
874 *data = g_variant_builder_end(&gvb);
875 break;
876 case SR_CONF_TRIGGER_SOURCE:
877 if (!devc)
878 /* Can't know this until we have the exact model. */
879 return SR_ERR_ARG;
880 *data = g_variant_new_strv(trigger_sources,
881 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
882 break;
883 case SR_CONF_TRIGGER_SLOPE:
884 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
885 break;
886 case SR_CONF_DATA_SOURCE:
887 if (!devc)
888 /* Can't know this until we have the exact model. */
889 return SR_ERR_ARG;
890 switch (devc->model->series->protocol) {
891 case PROTOCOL_V1:
892 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
893 break;
894 case PROTOCOL_V2:
895 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
896 break;
897 default:
898 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
899 break;
900 }
901 break;
902 default:
903 return SR_ERR_NA;
904 }
905
906 return SR_OK;
907}
908
909static int dev_acquisition_start(const struct sr_dev_inst *sdi)
910{
911 struct sr_scpi_dev_inst *scpi;
912 struct dev_context *devc;
913 struct sr_channel *ch;
914 struct sr_datafeed_packet packet;
915 gboolean some_digital;
916 GSList *l;
917
918 if (sdi->status != SR_ST_ACTIVE)
919 return SR_ERR_DEV_CLOSED;
920
921 scpi = sdi->conn;
922 devc = sdi->priv;
923
924 devc->num_frames = 0;
925
926 some_digital = FALSE;
927 for (l = sdi->channels; l; l = l->next) {
928 ch = l->data;
929 sr_dbg("handling channel %s", ch->name);
930 if (ch->type == SR_CHANNEL_ANALOG) {
931 if (ch->enabled)
932 devc->enabled_channels = g_slist_append(
933 devc->enabled_channels, ch);
934 if (ch->enabled != devc->analog_channels[ch->index]) {
935 /* Enabled channel is currently disabled, or vice versa. */
936 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
937 ch->enabled ? "ON" : "OFF") != SR_OK)
938 return SR_ERR;
939 devc->analog_channels[ch->index] = ch->enabled;
940 }
941 } else if (ch->type == SR_CHANNEL_LOGIC) {
942 /* Only one list entry for DS1000D series. All channels are retrieved
943 * together when this entry is processed. */
944 if (ch->enabled && (
945 devc->model->series->protocol > PROTOCOL_V2 ||
946 !some_digital))
947 devc->enabled_channels = g_slist_append(
948 devc->enabled_channels, ch);
949 if (ch->enabled) {
950 some_digital = TRUE;
951 /* Turn on LA module if currently off. */
952 if (!devc->la_enabled) {
953 if (rigol_ds_config_set(sdi,
954 devc->model->series->protocol >= PROTOCOL_V4 ?
955 ":LA:STAT ON" : ":LA:DISP ON") != SR_OK)
956 return SR_ERR;
957 devc->la_enabled = TRUE;
958 }
959 }
960 if (ch->enabled != devc->digital_channels[ch->index]) {
961 /* Enabled channel is currently disabled, or vice versa. */
962 if (rigol_ds_config_set(sdi,
963 devc->model->series->protocol >= PROTOCOL_V4 ?
964 ":LA:DIG%d:DISP %s" : ":DIG%d:TURN %s", ch->index,
965 ch->enabled ? "ON" : "OFF") != SR_OK)
966 return SR_ERR;
967 devc->digital_channels[ch->index] = ch->enabled;
968 }
969 }
970 }
971
972 if (!devc->enabled_channels)
973 return SR_ERR;
974
975 /* Turn off LA module if on and no digital channels selected. */
976 if (devc->la_enabled && !some_digital)
977 if (rigol_ds_config_set(sdi,
978 devc->model->series->protocol >= PROTOCOL_V4 ?
979 ":LA:STAT OFF" : ":LA:DISP OFF") != SR_OK)
980 return SR_ERR;
981
982 /* Set memory mode. */
983 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
984 sr_err("Data source 'Segmented' not yet supported");
985 return SR_ERR;
986 }
987
988 devc->analog_frame_size = analog_frame_size(sdi);
989 devc->digital_frame_size = digital_frame_size(sdi);
990
991 switch (devc->model->series->protocol) {
992 case PROTOCOL_V2:
993 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
994 return SR_ERR;
995 break;
996 case PROTOCOL_V3:
997 /* Apparently for the DS2000 the memory
998 * depth can only be set in Running state -
999 * this matches the behaviour of the UI. */
1000 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1001 return SR_ERR;
1002 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
1003 devc->analog_frame_size) != SR_OK)
1004 return SR_ERR;
1005 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
1006 return SR_ERR;
1007 break;
1008 default:
1009 break;
1010 }
1011
1012 if (devc->data_source == DATA_SOURCE_LIVE)
1013 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
1014 return SR_ERR;
1015
1016 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
1017 rigol_ds_receive, (void *)sdi);
1018
1019 std_session_send_df_header(sdi, LOG_PREFIX);
1020
1021 devc->channel_entry = devc->enabled_channels;
1022
1023 if (rigol_ds_capture_start(sdi) != SR_OK)
1024 return SR_ERR;
1025
1026 /* Start of first frame. */
1027 packet.type = SR_DF_FRAME_BEGIN;
1028 sr_session_send(sdi, &packet);
1029
1030 return SR_OK;
1031}
1032
1033static int dev_acquisition_stop(struct sr_dev_inst *sdi)
1034{
1035 struct dev_context *devc;
1036 struct sr_scpi_dev_inst *scpi;
1037
1038 devc = sdi->priv;
1039
1040 if (sdi->status != SR_ST_ACTIVE) {
1041 sr_err("Device inactive, can't stop acquisition.");
1042 return SR_ERR;
1043 }
1044
1045 std_session_send_df_end(sdi, LOG_PREFIX);
1046
1047 g_slist_free(devc->enabled_channels);
1048 devc->enabled_channels = NULL;
1049 scpi = sdi->conn;
1050 sr_scpi_source_remove(sdi->session, scpi);
1051
1052 return SR_OK;
1053}
1054
1055SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1056 .name = "rigol-ds",
1057 .longname = "Rigol DS",
1058 .api_version = 1,
1059 .init = std_init,
1060 .cleanup = std_cleanup,
1061 .scan = scan,
1062 .dev_list = std_dev_list,
1063 .dev_clear = dev_clear,
1064 .config_get = config_get,
1065 .config_set = config_set,
1066 .config_list = config_list,
1067 .dev_open = dev_open,
1068 .dev_close = dev_close,
1069 .dev_acquisition_start = dev_acquisition_start,
1070 .dev_acquisition_stop = dev_acquisition_stop,
1071 .context = NULL,
1072};
Hardware access and backend lib