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Add support for HP 6632B.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const int32_t hwopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const int32_t hwcaps[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_TIMEBASE,
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
43 SR_CONF_NUM_TIMEBASE,
44 SR_CONF_LIMIT_FRAMES,
45 SR_CONF_SAMPLERATE,
46};
47
48static const int32_t analog_hwcaps[] = {
49 SR_CONF_NUM_VDIV,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
52 SR_CONF_DATA_SOURCE,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116};
117
118#define NUM_TIMEBASE ARRAY_SIZE(timebases)
119#define NUM_VDIV ARRAY_SIZE(vdivs)
120
121static const char *trigger_sources[] = {
122 "CH1",
123 "CH2",
124 "CH3",
125 "CH4",
126 "EXT",
127 "AC Line",
128 "D0",
129 "D1",
130 "D2",
131 "D3",
132 "D4",
133 "D5",
134 "D6",
135 "D7",
136 "D8",
137 "D9",
138 "D10",
139 "D11",
140 "D12",
141 "D13",
142 "D14",
143 "D15",
144};
145
146static const char *trigger_slopes[] = {
147 "r",
148 "f",
149};
150
151static const char *coupling[] = {
152 "AC",
153 "DC",
154 "GND",
155};
156
157/* Do not change the order of entries */
158static const char *data_sources[] = {
159 "Live",
160 "Memory",
161 "Segmented",
162};
163
164enum vendor {
165 RIGOL,
166 AGILENT,
167};
168
169enum series {
170 VS5000,
171 DS1000,
172 DS2000,
173 DS2000A,
174 DSO1000,
175};
176
177/* short name, full name */
178static const struct rigol_ds_vendor supported_vendors[] = {
179 [RIGOL] = {"Rigol", "Rigol Technologies"},
180 [AGILENT] = {"Agilent", "Agilent Technologies"},
181};
182
183#define VENDOR(x) &supported_vendors[x]
184/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
185 * live waveform samples, memory buffer samples */
186static const struct rigol_ds_series supported_series[] = {
187 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
188 {50, 1}, {2, 1000}, 14, 2048, 0},
189 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
190 {50, 1}, {2, 1000}, 12, 600, 1048576},
191 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
192 {500, 1}, {2, 1000}, 14, 1400, 14000},
193 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
194 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
195 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
196 {50, 1}, {2, 1000}, 12, 600, 20480},
197};
198
199#define SERIES(x) &supported_series[x]
200/* series, model, min timebase, analog channels, digital */
201static const struct rigol_ds_model supported_models[] = {
202 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
203 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
204 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
205 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
208 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
209 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
210 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
212 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
213 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
214 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
215 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
216 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
217 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
218 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
219 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
220 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
221 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
222 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
223 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
224 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
226 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
227 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
228 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
230 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
231 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
232};
233
234SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
235static struct sr_dev_driver *di = &rigol_ds_driver_info;
236
237static void clear_helper(void *priv)
238{
239 struct dev_context *devc;
240
241 devc = priv;
242 g_free(devc->data);
243 g_free(devc->buffer);
244 g_free(devc->coupling[0]);
245 g_free(devc->coupling[1]);
246 g_free(devc->trigger_source);
247 g_free(devc->trigger_slope);
248 g_free(devc->analog_groups);
249 g_free(devc->digital_group);
250 g_free(devc);
251}
252
253static int dev_clear(void)
254{
255 return std_dev_clear(di, clear_helper);
256}
257
258static int init(struct sr_context *sr_ctx)
259{
260 return std_init(sr_ctx, di, LOG_PREFIX);
261}
262
263static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
264{
265 struct dev_context *devc;
266 struct sr_dev_inst *sdi;
267 struct sr_scpi_hw_info *hw_info;
268 struct sr_channel *ch;
269 long n[3];
270 unsigned int i;
271 const struct rigol_ds_model *model = NULL;
272 gchar *channel_name, **version;
273
274 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
275 sr_info("Couldn't get IDN response, retrying.");
276 sr_scpi_close(scpi);
277 sr_scpi_open(scpi);
278 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
279 sr_info("Couldn't get IDN response.");
280 return NULL;
281 }
282 }
283
284 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
285 if (!strcasecmp(hw_info->manufacturer,
286 supported_models[i].series->vendor->full_name) &&
287 !strcmp(hw_info->model, supported_models[i].name)) {
288 model = &supported_models[i];
289 break;
290 }
291 }
292
293 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
294 model->series->vendor->name,
295 model->name,
296 hw_info->firmware_version))) {
297 sr_scpi_hw_info_free(hw_info);
298 return NULL;
299 }
300
301 sdi->conn = scpi;
302
303 sdi->driver = di;
304 sdi->inst_type = SR_INST_SCPI;
305
306 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
307 return NULL;
308
309 devc->limit_frames = 0;
310 devc->model = model;
311 devc->format = model->series->format;
312
313 /* DS1000 models with firmware before 0.2.4 used the old data format. */
314 if (model->series == SERIES(DS1000)) {
315 version = g_strsplit(hw_info->firmware_version, ".", 0);
316 do {
317 if (!version[0] || !version[1] || !version[2])
318 break;
319 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
320 break;
321 for (i = 0; i < 3; i++) {
322 if (sr_atol(version[i], &n[i]) != SR_OK)
323 break;
324 }
325 if (i != 3)
326 break;
327 if (n[0] != 0 || n[1] > 2)
328 break;
329 if (n[1] == 2 && n[2] > 3)
330 break;
331 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
332 devc->format = FORMAT_RAW;
333 } while(0);
334 g_strfreev(version);
335 }
336
337 sr_scpi_hw_info_free(hw_info);
338
339 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
340 model->analog_channels);
341
342 for (i = 0; i < model->analog_channels; i++) {
343 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
344 return NULL;
345 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
346 sdi->channels = g_slist_append(sdi->channels, ch);
347
348 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
349
350 devc->analog_groups[i]->name = channel_name;
351 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
352 sdi->channel_groups = g_slist_append(sdi->channel_groups,
353 devc->analog_groups[i]);
354 }
355
356 if (devc->model->has_digital) {
357 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
358
359 for (i = 0; i < 16; i++) {
360 if (!(channel_name = g_strdup_printf("D%d", i)))
361 return NULL;
362 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
363 g_free(channel_name);
364 if (!ch)
365 return NULL;
366 sdi->channels = g_slist_append(sdi->channels, ch);
367 devc->digital_group->channels = g_slist_append(
368 devc->digital_group->channels, ch);
369 }
370 devc->digital_group->name = g_strdup("LA");
371 sdi->channel_groups = g_slist_append(sdi->channel_groups,
372 devc->digital_group);
373 }
374
375 for (i = 0; i < NUM_TIMEBASE; i++) {
376 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
377 devc->timebases = &timebases[i];
378 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
379 devc->num_timebases = &timebases[i] - devc->timebases + 1;
380 }
381
382 for (i = 0; i < NUM_VDIV; i++)
383 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
384 devc->vdivs = &vdivs[i];
385
386 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
387 return NULL;
388 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
389 return NULL;
390
391 devc->data_source = DATA_SOURCE_LIVE;
392
393 sdi->priv = devc;
394
395 return sdi;
396}
397
398static GSList *scan(GSList *options)
399{
400 return sr_scpi_scan(di->priv, options, probe_device);
401}
402
403static GSList *dev_list(void)
404{
405 return ((struct drv_context *)(di->priv))->instances;
406}
407
408static int dev_open(struct sr_dev_inst *sdi)
409{
410 struct sr_scpi_dev_inst *scpi = sdi->conn;
411
412 if (sr_scpi_open(scpi) < 0)
413 return SR_ERR;
414
415 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
416 return SR_ERR;
417
418 sdi->status = SR_ST_ACTIVE;
419
420 return SR_OK;
421}
422
423static int dev_close(struct sr_dev_inst *sdi)
424{
425 struct sr_scpi_dev_inst *scpi;
426 struct dev_context *devc;
427
428 if (sdi->status != SR_ST_ACTIVE)
429 return SR_ERR_DEV_CLOSED;
430
431 scpi = sdi->conn;
432 devc = sdi->priv;
433
434 if (devc->model->series->protocol == PROTOCOL_V2)
435 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
436
437 if (scpi) {
438 if (sr_scpi_close(scpi) < 0)
439 return SR_ERR;
440 sdi->status = SR_ST_INACTIVE;
441 }
442
443 return SR_OK;
444}
445
446static int cleanup(void)
447{
448 return dev_clear();
449}
450
451static int analog_frame_size(const struct sr_dev_inst *sdi)
452{
453 struct dev_context *devc = sdi->priv;
454 struct sr_channel *ch;
455 int analog_channels = 0;
456 GSList *l;
457
458 for (l = sdi->channels; l; l = l->next) {
459 ch = l->data;
460 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
461 analog_channels++;
462 }
463
464 if (analog_channels == 0)
465 return 0;
466
467 switch (devc->data_source) {
468 case DATA_SOURCE_LIVE:
469 return devc->model->series->live_samples;
470 case DATA_SOURCE_MEMORY:
471 return devc->model->series->buffer_samples / analog_channels;
472 default:
473 return 0;
474 }
475}
476
477static int digital_frame_size(const struct sr_dev_inst *sdi)
478{
479 struct dev_context *devc = sdi->priv;
480
481 switch (devc->data_source) {
482 case DATA_SOURCE_LIVE:
483 return devc->model->series->live_samples * 2;
484 case DATA_SOURCE_MEMORY:
485 return devc->model->series->buffer_samples * 2;
486 default:
487 return 0;
488 }
489}
490
491static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
492 const struct sr_channel_group *cg)
493{
494 struct dev_context *devc;
495 struct sr_channel *ch;
496 const char *tmp_str;
497 uint64_t samplerate;
498 int analog_channel = -1;
499 float smallest_diff = 0.0000000001;
500 int idx = -1;
501 unsigned i;
502
503 if (!sdi || !(devc = sdi->priv))
504 return SR_ERR_ARG;
505
506 /* If a channel group is specified, it must be a valid one. */
507 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
508 sr_err("Invalid channel group specified.");
509 return SR_ERR;
510 }
511
512 if (cg) {
513 ch = g_slist_nth_data(cg->channels, 0);
514 if (!ch)
515 return SR_ERR;
516 if (ch->type == SR_CHANNEL_ANALOG) {
517 if (ch->name[2] < '1' || ch->name[2] > '4')
518 return SR_ERR;
519 analog_channel = ch->name[2] - '1';
520 }
521 }
522
523 switch (id) {
524 case SR_CONF_NUM_TIMEBASE:
525 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
526 break;
527 case SR_CONF_NUM_VDIV:
528 *data = g_variant_new_int32(NUM_VDIV);
529 case SR_CONF_DATA_SOURCE:
530 if (devc->data_source == DATA_SOURCE_LIVE)
531 *data = g_variant_new_string("Live");
532 else if (devc->data_source == DATA_SOURCE_MEMORY)
533 *data = g_variant_new_string("Memory");
534 else
535 *data = g_variant_new_string("Segmented");
536 break;
537 case SR_CONF_SAMPLERATE:
538 if (devc->data_source == DATA_SOURCE_LIVE) {
539 samplerate = analog_frame_size(sdi) /
540 (devc->timebase * devc->model->series->num_horizontal_divs);
541 *data = g_variant_new_uint64(samplerate);
542 } else {
543 return SR_ERR_NA;
544 }
545 break;
546 case SR_CONF_TRIGGER_SOURCE:
547 if (!strcmp(devc->trigger_source, "ACL"))
548 tmp_str = "AC Line";
549 else if (!strcmp(devc->trigger_source, "CHAN1"))
550 tmp_str = "CH1";
551 else if (!strcmp(devc->trigger_source, "CHAN2"))
552 tmp_str = "CH2";
553 else if (!strcmp(devc->trigger_source, "CHAN3"))
554 tmp_str = "CH3";
555 else if (!strcmp(devc->trigger_source, "CHAN4"))
556 tmp_str = "CH4";
557 else
558 tmp_str = devc->trigger_source;
559 *data = g_variant_new_string(tmp_str);
560 break;
561 case SR_CONF_TRIGGER_SLOPE:
562 if (!strcmp(devc->trigger_slope, "POS"))
563 tmp_str = "r";
564 else if (!strcmp(devc->trigger_slope, "NEG"))
565 tmp_str = "f";
566 else
567 return SR_ERR_NA;
568 *data = g_variant_new_string(tmp_str);
569 break;
570 case SR_CONF_TIMEBASE:
571 for (i = 0; i < devc->num_timebases; i++) {
572 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
573 float diff = fabs(devc->timebase - tb);
574 if (diff < smallest_diff) {
575 smallest_diff = diff;
576 idx = i;
577 }
578 }
579 if (idx < 0)
580 return SR_ERR_NA;
581 *data = g_variant_new("(tt)", devc->timebases[idx][0],
582 devc->timebases[idx][1]);
583 break;
584 case SR_CONF_VDIV:
585 if (analog_channel < 0)
586 return SR_ERR_NA;
587 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
588 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
589 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
590 if (diff < smallest_diff) {
591 smallest_diff = diff;
592 idx = i;
593 }
594 }
595 if (idx < 0)
596 return SR_ERR_NA;
597 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
598 break;
599 case SR_CONF_COUPLING:
600 if (analog_channel < 0)
601 return SR_ERR_NA;
602 *data = g_variant_new_string(devc->coupling[analog_channel]);
603 break;
604 default:
605 return SR_ERR_NA;
606 }
607
608 return SR_OK;
609}
610
611static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
612 const struct sr_channel_group *cg)
613{
614 struct dev_context *devc;
615 uint64_t p, q;
616 double t_dbl;
617 unsigned int i, j;
618 int ret;
619 const char *tmp_str;
620 char buffer[16];
621
622 if (!(devc = sdi->priv))
623 return SR_ERR_ARG;
624
625 if (sdi->status != SR_ST_ACTIVE)
626 return SR_ERR_DEV_CLOSED;
627
628 /* If a channel group is specified, it must be a valid one. */
629 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
630 sr_err("Invalid channel group specified.");
631 return SR_ERR;
632 }
633
634 ret = SR_OK;
635 switch (id) {
636 case SR_CONF_LIMIT_FRAMES:
637 devc->limit_frames = g_variant_get_uint64(data);
638 break;
639 case SR_CONF_TRIGGER_SLOPE:
640 tmp_str = g_variant_get_string(data, NULL);
641
642 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
643 return SR_ERR_ARG;
644
645 g_free(devc->trigger_slope);
646 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
647 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
648 break;
649 case SR_CONF_HORIZ_TRIGGERPOS:
650 t_dbl = g_variant_get_double(data);
651 if (t_dbl < 0.0 || t_dbl > 1.0)
652 return SR_ERR;
653 devc->horiz_triggerpos = t_dbl;
654 /* We have the trigger offset as a percentage of the frame, but
655 * need to express this in seconds. */
656 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
657 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
658 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
659 break;
660 case SR_CONF_TIMEBASE:
661 g_variant_get(data, "(tt)", &p, &q);
662 for (i = 0; i < devc->num_timebases; i++) {
663 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
664 devc->timebase = (float)p / q;
665 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
666 devc->timebase);
667 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
668 break;
669 }
670 }
671 if (i == devc->num_timebases)
672 ret = SR_ERR_ARG;
673 break;
674 case SR_CONF_TRIGGER_SOURCE:
675 tmp_str = g_variant_get_string(data, NULL);
676 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
677 if (!strcmp(trigger_sources[i], tmp_str)) {
678 g_free(devc->trigger_source);
679 devc->trigger_source = g_strdup(trigger_sources[i]);
680 if (!strcmp(devc->trigger_source, "AC Line"))
681 tmp_str = "ACL";
682 else if (!strcmp(devc->trigger_source, "CH1"))
683 tmp_str = "CHAN1";
684 else if (!strcmp(devc->trigger_source, "CH2"))
685 tmp_str = "CHAN2";
686 else if (!strcmp(devc->trigger_source, "CH3"))
687 tmp_str = "CHAN3";
688 else if (!strcmp(devc->trigger_source, "CH4"))
689 tmp_str = "CHAN4";
690 else
691 tmp_str = (char *)devc->trigger_source;
692 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
693 break;
694 }
695 }
696 if (i == ARRAY_SIZE(trigger_sources))
697 ret = SR_ERR_ARG;
698 break;
699 case SR_CONF_VDIV:
700 if (!cg) {
701 sr_err("No channel group specified.");
702 return SR_ERR_CHANNEL_GROUP;
703 }
704 g_variant_get(data, "(tt)", &p, &q);
705 for (i = 0; i < 2; i++) {
706 if (cg == devc->analog_groups[i]) {
707 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
708 if (vdivs[j][0] != p || vdivs[j][1] != q)
709 continue;
710 devc->vdiv[i] = (float)p / q;
711 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
712 devc->vdiv[i]);
713 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
714 buffer);
715 }
716 return SR_ERR_ARG;
717 }
718 }
719 return SR_ERR_NA;
720 case SR_CONF_COUPLING:
721 if (!cg) {
722 sr_err("No channel group specified.");
723 return SR_ERR_CHANNEL_GROUP;
724 }
725 tmp_str = g_variant_get_string(data, NULL);
726 for (i = 0; i < 2; i++) {
727 if (cg == devc->analog_groups[i]) {
728 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
729 if (!strcmp(tmp_str, coupling[j])) {
730 g_free(devc->coupling[i]);
731 devc->coupling[i] = g_strdup(coupling[j]);
732 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
733 devc->coupling[i]);
734 }
735 }
736 return SR_ERR_ARG;
737 }
738 }
739 return SR_ERR_NA;
740 case SR_CONF_DATA_SOURCE:
741 tmp_str = g_variant_get_string(data, NULL);
742 if (!strcmp(tmp_str, "Live"))
743 devc->data_source = DATA_SOURCE_LIVE;
744 else if (devc->model->series->protocol >= PROTOCOL_V2
745 && !strcmp(tmp_str, "Memory"))
746 devc->data_source = DATA_SOURCE_MEMORY;
747 else if (devc->model->series->protocol >= PROTOCOL_V3
748 && !strcmp(tmp_str, "Segmented"))
749 devc->data_source = DATA_SOURCE_SEGMENTED;
750 else
751 return SR_ERR;
752 break;
753 default:
754 ret = SR_ERR_NA;
755 break;
756 }
757
758 return ret;
759}
760
761static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
762 const struct sr_channel_group *cg)
763{
764 GVariant *tuple, *rational[2];
765 GVariantBuilder gvb;
766 unsigned int i;
767 struct dev_context *devc = NULL;
768
769 if (sdi)
770 devc = sdi->priv;
771
772 if (key == SR_CONF_SCAN_OPTIONS) {
773 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
774 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
775 return SR_OK;
776 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
777 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
778 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
779 return SR_OK;
780 }
781
782 /* Every other option requires a valid device instance. */
783 if (!sdi || !(devc = sdi->priv))
784 return SR_ERR_ARG;
785
786 /* If a channel group is specified, it must be a valid one. */
787 if (cg) {
788 if (cg != devc->analog_groups[0]
789 && cg != devc->analog_groups[1]) {
790 sr_err("Invalid channel group specified.");
791 return SR_ERR;
792 }
793 }
794
795 switch (key) {
796 case SR_CONF_DEVICE_OPTIONS:
797 if (!cg) {
798 sr_err("No channel group specified.");
799 return SR_ERR_CHANNEL_GROUP;
800 }
801 if (cg == devc->digital_group) {
802 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
803 NULL, 0, sizeof(int32_t));
804 return SR_OK;
805 } else {
806 for (i = 0; i < 2; i++) {
807 if (cg == devc->analog_groups[i]) {
808 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
809 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
810 return SR_OK;
811 }
812 }
813 return SR_ERR_NA;
814 }
815 break;
816 case SR_CONF_COUPLING:
817 if (!cg) {
818 sr_err("No channel group specified.");
819 return SR_ERR_CHANNEL_GROUP;
820 }
821 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
822 break;
823 case SR_CONF_VDIV:
824 if (!devc)
825 /* Can't know this until we have the exact model. */
826 return SR_ERR_ARG;
827 if (!cg) {
828 sr_err("No channel group specified.");
829 return SR_ERR_CHANNEL_GROUP;
830 }
831 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
832 for (i = 0; i < NUM_VDIV; i++) {
833 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
834 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
835 tuple = g_variant_new_tuple(rational, 2);
836 g_variant_builder_add_value(&gvb, tuple);
837 }
838 *data = g_variant_builder_end(&gvb);
839 break;
840 case SR_CONF_TIMEBASE:
841 if (!devc)
842 /* Can't know this until we have the exact model. */
843 return SR_ERR_ARG;
844 if (devc->num_timebases <= 0)
845 return SR_ERR_NA;
846 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
847 for (i = 0; i < devc->num_timebases; i++) {
848 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
849 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
850 tuple = g_variant_new_tuple(rational, 2);
851 g_variant_builder_add_value(&gvb, tuple);
852 }
853 *data = g_variant_builder_end(&gvb);
854 break;
855 case SR_CONF_TRIGGER_SOURCE:
856 if (!devc)
857 /* Can't know this until we have the exact model. */
858 return SR_ERR_ARG;
859 *data = g_variant_new_strv(trigger_sources,
860 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
861 break;
862 case SR_CONF_TRIGGER_SLOPE:
863 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
864 break;
865 case SR_CONF_DATA_SOURCE:
866 if (!devc)
867 /* Can't know this until we have the exact model. */
868 return SR_ERR_ARG;
869 switch (devc->model->series->protocol) {
870 case PROTOCOL_V1:
871 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
872 break;
873 case PROTOCOL_V2:
874 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
875 break;
876 default:
877 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
878 break;
879 }
880 break;
881 default:
882 return SR_ERR_NA;
883 }
884
885 return SR_OK;
886}
887
888static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
889{
890 struct sr_scpi_dev_inst *scpi;
891 struct dev_context *devc;
892 struct sr_channel *ch;
893 struct sr_datafeed_packet packet;
894 GSList *l;
895
896 if (sdi->status != SR_ST_ACTIVE)
897 return SR_ERR_DEV_CLOSED;
898
899 scpi = sdi->conn;
900 devc = sdi->priv;
901
902 devc->num_frames = 0;
903
904 for (l = sdi->channels; l; l = l->next) {
905 ch = l->data;
906 sr_dbg("handling channel %s", ch->name);
907 if (ch->type == SR_CHANNEL_ANALOG) {
908 if (ch->enabled)
909 devc->enabled_analog_channels = g_slist_append(
910 devc->enabled_analog_channels, ch);
911 if (ch->enabled != devc->analog_channels[ch->index]) {
912 /* Enabled channel is currently disabled, or vice versa. */
913 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
914 ch->enabled ? "ON" : "OFF") != SR_OK)
915 return SR_ERR;
916 devc->analog_channels[ch->index] = ch->enabled;
917 }
918 } else if (ch->type == SR_CHANNEL_LOGIC) {
919 if (ch->enabled) {
920 devc->enabled_digital_channels = g_slist_append(
921 devc->enabled_digital_channels, ch);
922 /* Turn on LA module if currently off. */
923 if (!devc->la_enabled) {
924 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
925 return SR_ERR;
926 devc->la_enabled = TRUE;
927 }
928 }
929 if (ch->enabled != devc->digital_channels[ch->index]) {
930 /* Enabled channel is currently disabled, or vice versa. */
931 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
932 ch->enabled ? "ON" : "OFF") != SR_OK)
933 return SR_ERR;
934 devc->digital_channels[ch->index] = ch->enabled;
935 }
936 }
937 }
938
939 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
940 return SR_ERR;
941
942 /* Turn off LA module if on and no digital channels selected. */
943 if (devc->la_enabled && !devc->enabled_digital_channels)
944 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
945 return SR_ERR;
946
947 /* Set memory mode. */
948 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
949 sr_err("Data source 'Segmented' not yet supported");
950 return SR_ERR;
951 }
952
953 devc->analog_frame_size = analog_frame_size(sdi);
954 devc->digital_frame_size = digital_frame_size(sdi);
955
956 switch (devc->model->series->protocol) {
957 case PROTOCOL_V2:
958 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
959 return SR_ERR;
960 break;
961 case PROTOCOL_V3:
962 /* Apparently for the DS2000 the memory
963 * depth can only be set in Running state -
964 * this matches the behaviour of the UI. */
965 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
966 return SR_ERR;
967 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
968 devc->analog_frame_size) != SR_OK)
969 return SR_ERR;
970 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
971 return SR_ERR;
972 break;
973 default:
974 break;
975 }
976
977 if (devc->data_source == DATA_SOURCE_LIVE)
978 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
979 return SR_ERR;
980
981 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
982 rigol_ds_receive, (void *)sdi);
983
984 /* Send header packet to the session bus. */
985 std_session_send_df_header(cb_data, LOG_PREFIX);
986
987 if (devc->enabled_analog_channels)
988 devc->channel_entry = devc->enabled_analog_channels;
989 else
990 devc->channel_entry = devc->enabled_digital_channels;
991
992 if (rigol_ds_capture_start(sdi) != SR_OK)
993 return SR_ERR;
994
995 /* Start of first frame. */
996 packet.type = SR_DF_FRAME_BEGIN;
997 sr_session_send(cb_data, &packet);
998
999 return SR_OK;
1000}
1001
1002static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1003{
1004 struct dev_context *devc;
1005 struct sr_scpi_dev_inst *scpi;
1006 struct sr_datafeed_packet packet;
1007
1008 (void)cb_data;
1009
1010 devc = sdi->priv;
1011
1012 if (sdi->status != SR_ST_ACTIVE) {
1013 sr_err("Device inactive, can't stop acquisition.");
1014 return SR_ERR;
1015 }
1016
1017 /* End of last frame. */
1018 packet.type = SR_DF_END;
1019 sr_session_send(sdi, &packet);
1020
1021 g_slist_free(devc->enabled_analog_channels);
1022 g_slist_free(devc->enabled_digital_channels);
1023 devc->enabled_analog_channels = NULL;
1024 devc->enabled_digital_channels = NULL;
1025 scpi = sdi->conn;
1026 sr_scpi_source_remove(sdi->session, scpi);
1027
1028 return SR_OK;
1029}
1030
1031SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1032 .name = "rigol-ds",
1033 .longname = "Rigol DS",
1034 .api_version = 1,
1035 .init = init,
1036 .cleanup = cleanup,
1037 .scan = scan,
1038 .dev_list = dev_list,
1039 .dev_clear = dev_clear,
1040 .config_get = config_get,
1041 .config_set = config_set,
1042 .config_list = config_list,
1043 .dev_open = dev_open,
1044 .dev_close = dev_close,
1045 .dev_acquisition_start = dev_acquisition_start,
1046 .dev_acquisition_stop = dev_acquisition_stop,
1047 .priv = NULL,
1048};
Hardware access and backend lib