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rigol-ds: SR_CONF_TRIGGER_SLOPE is actually listable.
[libsigrok.git] / src / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const uint32_t scanopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const uint32_t devopts[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_LIMIT_FRAMES | SR_CONF_SET,
40 SR_CONF_TIMEBASE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
41 SR_CONF_TRIGGER_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
42 SR_CONF_TRIGGER_SLOPE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
43 SR_CONF_HORIZ_TRIGGERPOS | SR_CONF_SET,
44 SR_CONF_NUM_TIMEBASE | SR_CONF_GET,
45 SR_CONF_SAMPLERATE | SR_CONF_GET,
46};
47
48static const uint32_t analog_devopts[] = {
49 SR_CONF_NUM_VDIV | SR_CONF_GET,
50 SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
51 SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
52 SR_CONF_DATA_SOURCE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116};
117
118#define NUM_TIMEBASE ARRAY_SIZE(timebases)
119#define NUM_VDIV ARRAY_SIZE(vdivs)
120
121static const char *trigger_sources[] = {
122 "CH1",
123 "CH2",
124 "CH3",
125 "CH4",
126 "EXT",
127 "AC Line",
128 "D0",
129 "D1",
130 "D2",
131 "D3",
132 "D4",
133 "D5",
134 "D6",
135 "D7",
136 "D8",
137 "D9",
138 "D10",
139 "D11",
140 "D12",
141 "D13",
142 "D14",
143 "D15",
144};
145
146static const char *trigger_slopes[] = {
147 "r",
148 "f",
149};
150
151static const char *coupling[] = {
152 "AC",
153 "DC",
154 "GND",
155};
156
157/* Do not change the order of entries */
158static const char *data_sources[] = {
159 "Live",
160 "Memory",
161 "Segmented",
162};
163
164enum vendor {
165 RIGOL,
166 AGILENT,
167};
168
169enum series {
170 VS5000,
171 DS1000,
172 DS2000,
173 DS2000A,
174 DSO1000,
175};
176
177/* short name, full name */
178static const struct rigol_ds_vendor supported_vendors[] = {
179 [RIGOL] = {"Rigol", "Rigol Technologies"},
180 [AGILENT] = {"Agilent", "Agilent Technologies"},
181};
182
183#define VENDOR(x) &supported_vendors[x]
184/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
185 * live waveform samples, memory buffer samples */
186static const struct rigol_ds_series supported_series[] = {
187 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
188 {50, 1}, {2, 1000}, 14, 2048, 0},
189 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
190 {50, 1}, {2, 1000}, 12, 600, 1048576},
191 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
192 {500, 1}, {2, 1000}, 14, 1400, 14000},
193 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
194 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
195 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
196 {50, 1}, {2, 1000}, 12, 600, 20480},
197};
198
199#define SERIES(x) &supported_series[x]
200/* series, model, min timebase, analog channels, digital */
201static const struct rigol_ds_model supported_models[] = {
202 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
203 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
204 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
205 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
208 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
209 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
210 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
212 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
213 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
214 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
215 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
216 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
217 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
218 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
219 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
220 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
221 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
222 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
223 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
224 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
226 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
227 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
228 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
230 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
231 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
232};
233
234SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
235static struct sr_dev_driver *di = &rigol_ds_driver_info;
236
237static void clear_helper(void *priv)
238{
239 struct dev_context *devc;
240 unsigned int i;
241
242 devc = priv;
243 g_free(devc->data);
244 g_free(devc->buffer);
245 for (i = 0; i < ARRAY_SIZE(devc->coupling); i++)
246 g_free(devc->coupling[i]);
247 g_free(devc->trigger_source);
248 g_free(devc->trigger_slope);
249 g_free(devc->analog_groups);
250 g_free(devc->digital_group);
251 g_free(devc);
252}
253
254static int dev_clear(void)
255{
256 return std_dev_clear(di, clear_helper);
257}
258
259static int init(struct sr_context *sr_ctx)
260{
261 return std_init(sr_ctx, di, LOG_PREFIX);
262}
263
264static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
265{
266 struct dev_context *devc;
267 struct sr_dev_inst *sdi;
268 struct sr_scpi_hw_info *hw_info;
269 struct sr_channel *ch;
270 long n[3];
271 unsigned int i;
272 const struct rigol_ds_model *model = NULL;
273 gchar *channel_name, **version;
274
275 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
276 sr_info("Couldn't get IDN response, retrying.");
277 sr_scpi_close(scpi);
278 sr_scpi_open(scpi);
279 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
280 sr_info("Couldn't get IDN response.");
281 return NULL;
282 }
283 }
284
285 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
286 if (!strcasecmp(hw_info->manufacturer,
287 supported_models[i].series->vendor->full_name) &&
288 !strcmp(hw_info->model, supported_models[i].name)) {
289 model = &supported_models[i];
290 break;
291 }
292 }
293
294 if (!model) {
295 sr_scpi_hw_info_free(hw_info);
296 return NULL;
297 }
298
299 sdi = g_malloc0(sizeof(struct sr_dev_inst));
300 sdi->status = SR_ST_ACTIVE;
301 sdi->vendor = g_strdup(model->series->vendor->name);
302 sdi->model = g_strdup(model->name);
303 sdi->version = g_strdup(hw_info->firmware_version);
304 sdi->conn = scpi;
305 sdi->driver = di;
306 sdi->inst_type = SR_INST_SCPI;
307 sdi->serial_num = g_strdup(hw_info->serial_number);
308 devc = g_malloc0(sizeof(struct dev_context));
309 devc->limit_frames = 0;
310 devc->model = model;
311 devc->format = model->series->format;
312
313 /* DS1000 models with firmware before 0.2.4 used the old data format. */
314 if (model->series == SERIES(DS1000)) {
315 version = g_strsplit(hw_info->firmware_version, ".", 0);
316 do {
317 if (!version[0] || !version[1] || !version[2])
318 break;
319 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
320 break;
321 for (i = 0; i < 3; i++) {
322 if (sr_atol(version[i], &n[i]) != SR_OK)
323 break;
324 }
325 if (i != 3)
326 break;
327 if (n[0] != 0 || n[1] > 2)
328 break;
329 if (n[1] == 2 && n[2] > 3)
330 break;
331 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
332 devc->format = FORMAT_RAW;
333 } while(0);
334 g_strfreev(version);
335 }
336
337 sr_scpi_hw_info_free(hw_info);
338
339 devc->analog_groups = g_malloc0(sizeof(struct sr_channel_group*) *
340 model->analog_channels);
341
342 for (i = 0; i < model->analog_channels; i++) {
343 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
344 return NULL;
345 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
346 sdi->channels = g_slist_append(sdi->channels, ch);
347
348 devc->analog_groups[i] = g_malloc0(sizeof(struct sr_channel_group));
349
350 devc->analog_groups[i]->name = channel_name;
351 devc->analog_groups[i]->channels = g_slist_append(NULL, ch);
352 sdi->channel_groups = g_slist_append(sdi->channel_groups,
353 devc->analog_groups[i]);
354 }
355
356 if (devc->model->has_digital) {
357 devc->digital_group = g_malloc0(sizeof(struct sr_channel_group*));
358
359 for (i = 0; i < ARRAY_SIZE(devc->digital_channels); i++) {
360 if (!(channel_name = g_strdup_printf("D%d", i)))
361 return NULL;
362 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
363 g_free(channel_name);
364 sdi->channels = g_slist_append(sdi->channels, ch);
365 devc->digital_group->channels = g_slist_append(
366 devc->digital_group->channels, ch);
367 }
368 devc->digital_group->name = g_strdup("LA");
369 sdi->channel_groups = g_slist_append(sdi->channel_groups,
370 devc->digital_group);
371 }
372
373 for (i = 0; i < NUM_TIMEBASE; i++) {
374 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
375 devc->timebases = &timebases[i];
376 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
377 devc->num_timebases = &timebases[i] - devc->timebases + 1;
378 }
379
380 for (i = 0; i < NUM_VDIV; i++)
381 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
382 devc->vdivs = &vdivs[i];
383
384 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
385 return NULL;
386 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
387 return NULL;
388
389 devc->data_source = DATA_SOURCE_LIVE;
390
391 sdi->priv = devc;
392
393 return sdi;
394}
395
396static GSList *scan(GSList *options)
397{
398 return sr_scpi_scan(di->priv, options, probe_device);
399}
400
401static GSList *dev_list(void)
402{
403 return ((struct drv_context *)(di->priv))->instances;
404}
405
406static int dev_open(struct sr_dev_inst *sdi)
407{
408 struct sr_scpi_dev_inst *scpi = sdi->conn;
409
410 if (sr_scpi_open(scpi) < 0)
411 return SR_ERR;
412
413 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
414 return SR_ERR;
415
416 sdi->status = SR_ST_ACTIVE;
417
418 return SR_OK;
419}
420
421static int dev_close(struct sr_dev_inst *sdi)
422{
423 struct sr_scpi_dev_inst *scpi;
424 struct dev_context *devc;
425
426 if (sdi->status != SR_ST_ACTIVE)
427 return SR_ERR_DEV_CLOSED;
428
429 scpi = sdi->conn;
430 devc = sdi->priv;
431
432 if (devc->model->series->protocol == PROTOCOL_V2)
433 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
434
435 if (scpi) {
436 if (sr_scpi_close(scpi) < 0)
437 return SR_ERR;
438 sdi->status = SR_ST_INACTIVE;
439 }
440
441 return SR_OK;
442}
443
444static int cleanup(void)
445{
446 return dev_clear();
447}
448
449static int analog_frame_size(const struct sr_dev_inst *sdi)
450{
451 struct dev_context *devc = sdi->priv;
452 struct sr_channel *ch;
453 int analog_channels = 0;
454 GSList *l;
455
456 for (l = sdi->channels; l; l = l->next) {
457 ch = l->data;
458 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
459 analog_channels++;
460 }
461
462 if (analog_channels == 0)
463 return 0;
464
465 switch (devc->data_source) {
466 case DATA_SOURCE_LIVE:
467 return devc->model->series->live_samples;
468 case DATA_SOURCE_MEMORY:
469 return devc->model->series->buffer_samples / analog_channels;
470 default:
471 return 0;
472 }
473}
474
475static int digital_frame_size(const struct sr_dev_inst *sdi)
476{
477 struct dev_context *devc = sdi->priv;
478
479 switch (devc->data_source) {
480 case DATA_SOURCE_LIVE:
481 return devc->model->series->live_samples * 2;
482 case DATA_SOURCE_MEMORY:
483 return devc->model->series->buffer_samples * 2;
484 default:
485 return 0;
486 }
487}
488
489static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
490 const struct sr_channel_group *cg)
491{
492 struct dev_context *devc;
493 struct sr_channel *ch;
494 const char *tmp_str;
495 uint64_t samplerate;
496 int analog_channel = -1;
497 float smallest_diff = 0.0000000001;
498 int idx = -1;
499 unsigned i;
500
501 if (!sdi || !(devc = sdi->priv))
502 return SR_ERR_ARG;
503
504 /* If a channel group is specified, it must be a valid one. */
505 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
506 sr_err("Invalid channel group specified.");
507 return SR_ERR;
508 }
509
510 if (cg) {
511 ch = g_slist_nth_data(cg->channels, 0);
512 if (!ch)
513 return SR_ERR;
514 if (ch->type == SR_CHANNEL_ANALOG) {
515 if (ch->name[2] < '1' || ch->name[2] > '4')
516 return SR_ERR;
517 analog_channel = ch->name[2] - '1';
518 }
519 }
520
521 switch (key) {
522 case SR_CONF_NUM_TIMEBASE:
523 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
524 break;
525 case SR_CONF_NUM_VDIV:
526 *data = g_variant_new_int32(NUM_VDIV);
527 case SR_CONF_DATA_SOURCE:
528 if (devc->data_source == DATA_SOURCE_LIVE)
529 *data = g_variant_new_string("Live");
530 else if (devc->data_source == DATA_SOURCE_MEMORY)
531 *data = g_variant_new_string("Memory");
532 else
533 *data = g_variant_new_string("Segmented");
534 break;
535 case SR_CONF_SAMPLERATE:
536 if (devc->data_source == DATA_SOURCE_LIVE) {
537 samplerate = analog_frame_size(sdi) /
538 (devc->timebase * devc->model->series->num_horizontal_divs);
539 *data = g_variant_new_uint64(samplerate);
540 } else {
541 return SR_ERR_NA;
542 }
543 break;
544 case SR_CONF_TRIGGER_SOURCE:
545 if (!strcmp(devc->trigger_source, "ACL"))
546 tmp_str = "AC Line";
547 else if (!strcmp(devc->trigger_source, "CHAN1"))
548 tmp_str = "CH1";
549 else if (!strcmp(devc->trigger_source, "CHAN2"))
550 tmp_str = "CH2";
551 else if (!strcmp(devc->trigger_source, "CHAN3"))
552 tmp_str = "CH3";
553 else if (!strcmp(devc->trigger_source, "CHAN4"))
554 tmp_str = "CH4";
555 else
556 tmp_str = devc->trigger_source;
557 *data = g_variant_new_string(tmp_str);
558 break;
559 case SR_CONF_TRIGGER_SLOPE:
560 if (!strcmp(devc->trigger_slope, "POS"))
561 tmp_str = "r";
562 else if (!strcmp(devc->trigger_slope, "NEG"))
563 tmp_str = "f";
564 else
565 return SR_ERR_NA;
566 *data = g_variant_new_string(tmp_str);
567 break;
568 case SR_CONF_TIMEBASE:
569 for (i = 0; i < devc->num_timebases; i++) {
570 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
571 float diff = fabs(devc->timebase - tb);
572 if (diff < smallest_diff) {
573 smallest_diff = diff;
574 idx = i;
575 }
576 }
577 if (idx < 0)
578 return SR_ERR_NA;
579 *data = g_variant_new("(tt)", devc->timebases[idx][0],
580 devc->timebases[idx][1]);
581 break;
582 case SR_CONF_VDIV:
583 if (analog_channel < 0)
584 return SR_ERR_NA;
585 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
586 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
587 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
588 if (diff < smallest_diff) {
589 smallest_diff = diff;
590 idx = i;
591 }
592 }
593 if (idx < 0)
594 return SR_ERR_NA;
595 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
596 break;
597 case SR_CONF_COUPLING:
598 if (analog_channel < 0)
599 return SR_ERR_NA;
600 *data = g_variant_new_string(devc->coupling[analog_channel]);
601 break;
602 default:
603 return SR_ERR_NA;
604 }
605
606 return SR_OK;
607}
608
609static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
610 const struct sr_channel_group *cg)
611{
612 struct dev_context *devc;
613 uint64_t p, q;
614 double t_dbl;
615 unsigned int i, j;
616 int ret;
617 const char *tmp_str;
618 char buffer[16];
619
620 if (!(devc = sdi->priv))
621 return SR_ERR_ARG;
622
623 if (sdi->status != SR_ST_ACTIVE)
624 return SR_ERR_DEV_CLOSED;
625
626 /* If a channel group is specified, it must be a valid one. */
627 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
628 sr_err("Invalid channel group specified.");
629 return SR_ERR;
630 }
631
632 ret = SR_OK;
633 switch (key) {
634 case SR_CONF_LIMIT_FRAMES:
635 devc->limit_frames = g_variant_get_uint64(data);
636 break;
637 case SR_CONF_TRIGGER_SLOPE:
638 tmp_str = g_variant_get_string(data, NULL);
639
640 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
641 return SR_ERR_ARG;
642
643 g_free(devc->trigger_slope);
644 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
645 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
646 break;
647 case SR_CONF_HORIZ_TRIGGERPOS:
648 t_dbl = g_variant_get_double(data);
649 if (t_dbl < 0.0 || t_dbl > 1.0)
650 return SR_ERR;
651 devc->horiz_triggerpos = t_dbl;
652 /* We have the trigger offset as a percentage of the frame, but
653 * need to express this in seconds. */
654 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
655 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
656 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
657 break;
658 case SR_CONF_TIMEBASE:
659 g_variant_get(data, "(tt)", &p, &q);
660 for (i = 0; i < devc->num_timebases; i++) {
661 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
662 devc->timebase = (float)p / q;
663 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
664 devc->timebase);
665 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
666 break;
667 }
668 }
669 if (i == devc->num_timebases)
670 ret = SR_ERR_ARG;
671 break;
672 case SR_CONF_TRIGGER_SOURCE:
673 tmp_str = g_variant_get_string(data, NULL);
674 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
675 if (!strcmp(trigger_sources[i], tmp_str)) {
676 g_free(devc->trigger_source);
677 devc->trigger_source = g_strdup(trigger_sources[i]);
678 if (!strcmp(devc->trigger_source, "AC Line"))
679 tmp_str = "ACL";
680 else if (!strcmp(devc->trigger_source, "CH1"))
681 tmp_str = "CHAN1";
682 else if (!strcmp(devc->trigger_source, "CH2"))
683 tmp_str = "CHAN2";
684 else if (!strcmp(devc->trigger_source, "CH3"))
685 tmp_str = "CHAN3";
686 else if (!strcmp(devc->trigger_source, "CH4"))
687 tmp_str = "CHAN4";
688 else
689 tmp_str = (char *)devc->trigger_source;
690 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
691 break;
692 }
693 }
694 if (i == ARRAY_SIZE(trigger_sources))
695 ret = SR_ERR_ARG;
696 break;
697 case SR_CONF_VDIV:
698 if (!cg) {
699 sr_err("No channel group specified.");
700 return SR_ERR_CHANNEL_GROUP;
701 }
702 g_variant_get(data, "(tt)", &p, &q);
703 for (i = 0; i < devc->model->analog_channels; i++) {
704 if (cg == devc->analog_groups[i]) {
705 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
706 if (vdivs[j][0] != p || vdivs[j][1] != q)
707 continue;
708 devc->vdiv[i] = (float)p / q;
709 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
710 devc->vdiv[i]);
711 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
712 buffer);
713 }
714 return SR_ERR_ARG;
715 }
716 }
717 return SR_ERR_NA;
718 case SR_CONF_COUPLING:
719 if (!cg) {
720 sr_err("No channel group specified.");
721 return SR_ERR_CHANNEL_GROUP;
722 }
723 tmp_str = g_variant_get_string(data, NULL);
724 for (i = 0; i < devc->model->analog_channels; i++) {
725 if (cg == devc->analog_groups[i]) {
726 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
727 if (!strcmp(tmp_str, coupling[j])) {
728 g_free(devc->coupling[i]);
729 devc->coupling[i] = g_strdup(coupling[j]);
730 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
731 devc->coupling[i]);
732 }
733 }
734 return SR_ERR_ARG;
735 }
736 }
737 return SR_ERR_NA;
738 case SR_CONF_DATA_SOURCE:
739 tmp_str = g_variant_get_string(data, NULL);
740 if (!strcmp(tmp_str, "Live"))
741 devc->data_source = DATA_SOURCE_LIVE;
742 else if (devc->model->series->protocol >= PROTOCOL_V2
743 && !strcmp(tmp_str, "Memory"))
744 devc->data_source = DATA_SOURCE_MEMORY;
745 else if (devc->model->series->protocol >= PROTOCOL_V3
746 && !strcmp(tmp_str, "Segmented"))
747 devc->data_source = DATA_SOURCE_SEGMENTED;
748 else
749 return SR_ERR;
750 break;
751 default:
752 ret = SR_ERR_NA;
753 break;
754 }
755
756 return ret;
757}
758
759static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
760 const struct sr_channel_group *cg)
761{
762 GVariant *tuple, *rational[2];
763 GVariantBuilder gvb;
764 unsigned int i;
765 struct dev_context *devc = NULL;
766
767 if (sdi)
768 devc = sdi->priv;
769
770 if (key == SR_CONF_SCAN_OPTIONS) {
771 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
772 scanopts, ARRAY_SIZE(scanopts), sizeof(uint32_t));
773 return SR_OK;
774 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
775 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
776 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
777 return SR_OK;
778 }
779
780 /* Every other option requires a valid device instance. */
781 if (!sdi || !(devc = sdi->priv))
782 return SR_ERR_ARG;
783
784 /* If a channel group is specified, it must be a valid one. */
785 if (cg) {
786 for (i = 0; i < devc->model->analog_channels; i++)
787 if (cg == devc->analog_groups[i])
788 break;
789 if (i >= devc->model->analog_channels) {
790 sr_err("Invalid channel group specified.");
791 return SR_ERR;
792 }
793 }
794
795 switch (key) {
796 case SR_CONF_DEVICE_OPTIONS:
797 if (!cg) {
798 sr_err("No channel group specified.");
799 return SR_ERR_CHANNEL_GROUP;
800 }
801 if (cg == devc->digital_group) {
802 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
803 NULL, 0, sizeof(uint32_t));
804 return SR_OK;
805 } else {
806 for (i = 0; i < devc->model->analog_channels; i++) {
807 if (cg == devc->analog_groups[i]) {
808 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
809 analog_devopts, ARRAY_SIZE(analog_devopts), sizeof(uint32_t));
810 return SR_OK;
811 }
812 }
813 return SR_ERR_NA;
814 }
815 break;
816 case SR_CONF_COUPLING:
817 if (!cg) {
818 sr_err("No channel group specified.");
819 return SR_ERR_CHANNEL_GROUP;
820 }
821 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
822 break;
823 case SR_CONF_VDIV:
824 if (!devc)
825 /* Can't know this until we have the exact model. */
826 return SR_ERR_ARG;
827 if (!cg) {
828 sr_err("No channel group specified.");
829 return SR_ERR_CHANNEL_GROUP;
830 }
831 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
832 for (i = 0; i < NUM_VDIV; i++) {
833 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
834 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
835 tuple = g_variant_new_tuple(rational, 2);
836 g_variant_builder_add_value(&gvb, tuple);
837 }
838 *data = g_variant_builder_end(&gvb);
839 break;
840 case SR_CONF_TIMEBASE:
841 if (!devc)
842 /* Can't know this until we have the exact model. */
843 return SR_ERR_ARG;
844 if (devc->num_timebases <= 0)
845 return SR_ERR_NA;
846 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
847 for (i = 0; i < devc->num_timebases; i++) {
848 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
849 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
850 tuple = g_variant_new_tuple(rational, 2);
851 g_variant_builder_add_value(&gvb, tuple);
852 }
853 *data = g_variant_builder_end(&gvb);
854 break;
855 case SR_CONF_TRIGGER_SOURCE:
856 if (!devc)
857 /* Can't know this until we have the exact model. */
858 return SR_ERR_ARG;
859 *data = g_variant_new_strv(trigger_sources,
860 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
861 break;
862 case SR_CONF_TRIGGER_SLOPE:
863 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
864 break;
865 case SR_CONF_DATA_SOURCE:
866 if (!devc)
867 /* Can't know this until we have the exact model. */
868 return SR_ERR_ARG;
869 switch (devc->model->series->protocol) {
870 case PROTOCOL_V1:
871 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
872 break;
873 case PROTOCOL_V2:
874 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
875 break;
876 default:
877 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
878 break;
879 }
880 break;
881 default:
882 return SR_ERR_NA;
883 }
884
885 return SR_OK;
886}
887
888static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
889{
890 struct sr_scpi_dev_inst *scpi;
891 struct dev_context *devc;
892 struct sr_channel *ch;
893 struct sr_datafeed_packet packet;
894 GSList *l;
895
896 if (sdi->status != SR_ST_ACTIVE)
897 return SR_ERR_DEV_CLOSED;
898
899 scpi = sdi->conn;
900 devc = sdi->priv;
901
902 devc->num_frames = 0;
903
904 for (l = sdi->channels; l; l = l->next) {
905 ch = l->data;
906 sr_dbg("handling channel %s", ch->name);
907 if (ch->type == SR_CHANNEL_ANALOG) {
908 if (ch->enabled)
909 devc->enabled_analog_channels = g_slist_append(
910 devc->enabled_analog_channels, ch);
911 if (ch->enabled != devc->analog_channels[ch->index]) {
912 /* Enabled channel is currently disabled, or vice versa. */
913 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
914 ch->enabled ? "ON" : "OFF") != SR_OK)
915 return SR_ERR;
916 devc->analog_channels[ch->index] = ch->enabled;
917 }
918 } else if (ch->type == SR_CHANNEL_LOGIC) {
919 if (ch->enabled) {
920 devc->enabled_digital_channels = g_slist_append(
921 devc->enabled_digital_channels, ch);
922 /* Turn on LA module if currently off. */
923 if (!devc->la_enabled) {
924 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
925 return SR_ERR;
926 devc->la_enabled = TRUE;
927 }
928 }
929 if (ch->enabled != devc->digital_channels[ch->index]) {
930 /* Enabled channel is currently disabled, or vice versa. */
931 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
932 ch->enabled ? "ON" : "OFF") != SR_OK)
933 return SR_ERR;
934 devc->digital_channels[ch->index] = ch->enabled;
935 }
936 }
937 }
938
939 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
940 return SR_ERR;
941
942 /* Turn off LA module if on and no digital channels selected. */
943 if (devc->la_enabled && !devc->enabled_digital_channels)
944 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
945 return SR_ERR;
946
947 /* Set memory mode. */
948 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
949 sr_err("Data source 'Segmented' not yet supported");
950 return SR_ERR;
951 }
952
953 devc->analog_frame_size = analog_frame_size(sdi);
954 devc->digital_frame_size = digital_frame_size(sdi);
955
956 switch (devc->model->series->protocol) {
957 case PROTOCOL_V2:
958 if (rigol_ds_config_set(sdi, ":ACQ:MEMD LONG") != SR_OK)
959 return SR_ERR;
960 break;
961 case PROTOCOL_V3:
962 /* Apparently for the DS2000 the memory
963 * depth can only be set in Running state -
964 * this matches the behaviour of the UI. */
965 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
966 return SR_ERR;
967 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
968 devc->analog_frame_size) != SR_OK)
969 return SR_ERR;
970 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
971 return SR_ERR;
972 break;
973 default:
974 break;
975 }
976
977 if (devc->data_source == DATA_SOURCE_LIVE)
978 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
979 return SR_ERR;
980
981 sr_scpi_source_add(sdi->session, scpi, G_IO_IN, 50,
982 rigol_ds_receive, (void *)sdi);
983
984 /* Send header packet to the session bus. */
985 std_session_send_df_header(cb_data, LOG_PREFIX);
986
987 if (devc->enabled_analog_channels)
988 devc->channel_entry = devc->enabled_analog_channels;
989 else
990 devc->channel_entry = devc->enabled_digital_channels;
991
992 if (rigol_ds_capture_start(sdi) != SR_OK)
993 return SR_ERR;
994
995 /* Start of first frame. */
996 packet.type = SR_DF_FRAME_BEGIN;
997 sr_session_send(cb_data, &packet);
998
999 return SR_OK;
1000}
1001
1002static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
1003{
1004 struct dev_context *devc;
1005 struct sr_scpi_dev_inst *scpi;
1006 struct sr_datafeed_packet packet;
1007
1008 (void)cb_data;
1009
1010 devc = sdi->priv;
1011
1012 if (sdi->status != SR_ST_ACTIVE) {
1013 sr_err("Device inactive, can't stop acquisition.");
1014 return SR_ERR;
1015 }
1016
1017 /* End of last frame. */
1018 packet.type = SR_DF_END;
1019 sr_session_send(sdi, &packet);
1020
1021 g_slist_free(devc->enabled_analog_channels);
1022 g_slist_free(devc->enabled_digital_channels);
1023 devc->enabled_analog_channels = NULL;
1024 devc->enabled_digital_channels = NULL;
1025 scpi = sdi->conn;
1026 sr_scpi_source_remove(sdi->session, scpi);
1027
1028 return SR_OK;
1029}
1030
1031SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1032 .name = "rigol-ds",
1033 .longname = "Rigol DS",
1034 .api_version = 1,
1035 .init = init,
1036 .cleanup = cleanup,
1037 .scan = scan,
1038 .dev_list = dev_list,
1039 .dev_clear = dev_clear,
1040 .config_get = config_get,
1041 .config_set = config_set,
1042 .config_list = config_list,
1043 .dev_open = dev_open,
1044 .dev_close = dev_close,
1045 .dev_acquisition_start = dev_acquisition_start,
1046 .dev_acquisition_stop = dev_acquisition_stop,
1047 .priv = NULL,
1048};
Hardware access and backend lib