[libsigrok.git] / src / hardware / asix-sigma / protocol.h

/*
 * This file is part of the libsigrok project.
 *
 * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
 *
 * This program is free software: you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation, either version 3 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */

#ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H
#define LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H

#include <stdint.h>
#include <stdlib.h>
#include <glib.h>
#include <ftdi.h>
#include <string.h>
#include <libsigrok/libsigrok.h>
#include "libsigrok-internal.h"

#define LOG_PREFIX "asix-sigma"

#define USB_VENDOR			0xa600
#define USB_PRODUCT			0xa000
#define USB_DESCRIPTION			"ASIX SIGMA"
#define USB_VENDOR_NAME			"ASIX"
#define USB_MODEL_NAME			"SIGMA"

enum sigma_write_register {
	WRITE_CLOCK_SELECT	= 0,
	WRITE_TRIGGER_SELECT0	= 1,
	WRITE_TRIGGER_SELECT1	= 2,
	WRITE_MODE		= 3,
	WRITE_MEMROW		= 4,
	WRITE_POST_TRIGGER	= 5,
	WRITE_TRIGGER_OPTION	= 6,
	WRITE_PIN_VIEW		= 7,

	WRITE_TEST		= 15,
};

enum sigma_read_register {
	READ_ID			= 0,
	READ_TRIGGER_POS_LOW	= 1,
	READ_TRIGGER_POS_HIGH	= 2,
	READ_TRIGGER_POS_UP	= 3,
	READ_STOP_POS_LOW	= 4,
	READ_STOP_POS_HIGH	= 5,
	READ_STOP_POS_UP	= 6,
	READ_MODE		= 7,
	READ_PIN_CHANGE_LOW	= 8,
	READ_PIN_CHANGE_HIGH	= 9,
	READ_BLOCK_LAST_TS_LOW	= 10,
	READ_BLOCK_LAST_TS_HIGH	= 11,
	READ_PIN_VIEW		= 12,

	READ_TEST		= 15,
};

#define REG_ADDR_LOW		(0x0 << 4)
#define REG_ADDR_HIGH		(0x1 << 4)
#define REG_DATA_LOW		(0x2 << 4)
#define REG_DATA_HIGH_WRITE	(0x3 << 4)
#define REG_READ_ADDR		(0x4 << 4)
#define REG_DRAM_WAIT_ACK	(0x5 << 4)

/* Bit (1 << 4) can be low or high (double buffer / cache) */
#define REG_DRAM_BLOCK		(0x6 << 4)
#define REG_DRAM_BLOCK_BEGIN	(0x8 << 4)
#define REG_DRAM_BLOCK_DATA	(0xa << 4)

#define LEDSEL0			6
#define LEDSEL1			7

#define NEXT_REG		1

#define EVENTS_PER_CLUSTER	7

#define CHUNK_SIZE		1024

/*
 * The entire ASIX Sigma DRAM is an array of struct sigma_dram_line[1024];
 */

/* One "DRAM cluster" contains a timestamp and 7 samples, 16b total. */
struct sigma_dram_cluster {
	uint8_t		timestamp_lo;
	uint8_t		timestamp_hi;
	struct {
		uint8_t	sample_hi;
		uint8_t	sample_lo;
	}		samples[7];
};

/* One "DRAM line" contains 64 "DRAM clusters", 1024b total. */
struct sigma_dram_line {
	struct sigma_dram_cluster	cluster[64];
};

struct clockselect_50 {
	uint8_t async;
	uint8_t fraction;
	uint16_t disabled_channels;
};

/* The effect of all these are still a bit unclear. */
struct triggerinout {
	uint8_t trgout_resistor_enable : 1;
	uint8_t trgout_resistor_pullup : 1;
	uint8_t reserved1 : 1;
	uint8_t trgout_bytrigger : 1;
	uint8_t trgout_byevent : 1;
	uint8_t trgout_bytriggerin : 1;
	uint8_t reserved2 : 2;

	/* Should be set same as the first two */
	uint8_t trgout_resistor_enable2 : 1;
	uint8_t trgout_resistor_pullup2 : 1;

	uint8_t reserved3 : 1;
	uint8_t trgout_long : 1;
	uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */
	uint8_t trgin_negate : 1;
	uint8_t trgout_enable : 1;
	uint8_t trgin_enable : 1;
};

struct triggerlut {
	/* The actual LUTs. */
	uint16_t m0d[4], m1d[4], m2d[4];
	uint16_t m3, m3s, m4;

	/* Parameters should be sent as a single register write. */
	struct {
		uint8_t selc : 2;
		uint8_t selpresc : 6;

		uint8_t selinc : 2;
		uint8_t selres : 2;
		uint8_t sela : 2;
		uint8_t selb : 2;

		uint16_t cmpb;
		uint16_t cmpa;
	} params;
};

/* Trigger configuration */
struct sigma_trigger {
	/* Only two channels can be used in mask. */
	uint16_t risingmask;
	uint16_t fallingmask;

	/* Simple trigger support (<= 50 MHz). */
	uint16_t simplemask;
	uint16_t simplevalue;

	/* TODO: Advanced trigger support (boolean expressions). */
};

/* Events for trigger operation. */
enum triggerop {
	OP_LEVEL = 1,
	OP_NOT,
	OP_RISE,
	OP_FALL,
	OP_RISEFALL,
	OP_NOTRISE,
	OP_NOTFALL,
	OP_NOTRISEFALL,
};

/* Logical functions for trigger operation. */
enum triggerfunc {
	FUNC_AND = 1,
	FUNC_NAND,
	FUNC_OR,
	FUNC_NOR,
	FUNC_XOR,
	FUNC_NXOR,
};

struct sigma_state {
	enum {
		SIGMA_UNINITIALIZED = 0,
		SIGMA_IDLE,
		SIGMA_CAPTURE,
		SIGMA_DOWNLOAD,
	} state;

	uint16_t lastts;
	uint16_t lastsample;
};

/* Private, per-device-instance driver context. */
struct dev_context {
	struct ftdi_context ftdic;
	uint64_t cur_samplerate;
	uint64_t period_ps;
	uint64_t limit_msec;
	uint64_t limit_samples;
	struct timeval start_tv;
	int cur_firmware;
	int num_channels;
	int cur_channels;
	int samples_per_event;
	int capture_ratio;
	struct sigma_trigger trigger;
	int use_triggers;
	struct sigma_state state;
};

extern SR_PRIV const uint64_t samplerates[];
extern SR_PRIV const size_t samplerates_count;

SR_PRIV int sigma_write_register(uint8_t reg, uint8_t *data, size_t len, 
				 struct dev_context *devc);
SR_PRIV int sigma_set_register(uint8_t reg, uint8_t value, struct dev_context *devc);
SR_PRIV int sigma_write_trigger_lut(struct triggerlut *lut, struct dev_context *devc);
SR_PRIV void sigma_clear_helper(void *priv);
SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate);
SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi);
SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data);
SR_PRIV int sigma_build_basic_trigger(struct triggerlut *lut, struct dev_context *devc);

#endif
Commit	Line	Data
	1	/*
	2	* This file is part of the libsigrok project.
	3	*
	4	* Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>,
	5	* Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
	6	* Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
	7	*
	8	* This program is free software: you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation, either version 3 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program. If not, see <http://www.gnu.org/licenses/>.
	20	*/
	21
	22	#ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H
	23	#define LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H
	24
	25	#include <stdint.h>
	26	#include <stdlib.h>
	27	#include <glib.h>
	28	#include <ftdi.h>
	29	#include <string.h>
	30	#include <libsigrok/libsigrok.h>
	31	#include "libsigrok-internal.h"
	32
	33	#define LOG_PREFIX "asix-sigma"
	34
	35	#define USB_VENDOR 0xa600
	36	#define USB_PRODUCT 0xa000
	37	#define USB_DESCRIPTION "ASIX SIGMA"
	38	#define USB_VENDOR_NAME "ASIX"
	39	#define USB_MODEL_NAME "SIGMA"
	40
	41	enum sigma_write_register {
	42	WRITE_CLOCK_SELECT = 0,
	43	WRITE_TRIGGER_SELECT0 = 1,
	44	WRITE_TRIGGER_SELECT1 = 2,
	45	WRITE_MODE = 3,
	46	WRITE_MEMROW = 4,
	47	WRITE_POST_TRIGGER = 5,
	48	WRITE_TRIGGER_OPTION = 6,
	49	WRITE_PIN_VIEW = 7,
	50
	51	WRITE_TEST = 15,
	52	};
	53
	54	enum sigma_read_register {
	55	READ_ID = 0,
	56	READ_TRIGGER_POS_LOW = 1,
	57	READ_TRIGGER_POS_HIGH = 2,
	58	READ_TRIGGER_POS_UP = 3,
	59	READ_STOP_POS_LOW = 4,
	60	READ_STOP_POS_HIGH = 5,
	61	READ_STOP_POS_UP = 6,
	62	READ_MODE = 7,
	63	READ_PIN_CHANGE_LOW = 8,
	64	READ_PIN_CHANGE_HIGH = 9,
	65	READ_BLOCK_LAST_TS_LOW = 10,
	66	READ_BLOCK_LAST_TS_HIGH = 11,
	67	READ_PIN_VIEW = 12,
	68
	69	READ_TEST = 15,
	70	};
	71
	72	#define REG_ADDR_LOW (0x0 << 4)
	73	#define REG_ADDR_HIGH (0x1 << 4)
	74	#define REG_DATA_LOW (0x2 << 4)
	75	#define REG_DATA_HIGH_WRITE (0x3 << 4)
	76	#define REG_READ_ADDR (0x4 << 4)
	77	#define REG_DRAM_WAIT_ACK (0x5 << 4)
	78
	79	/* Bit (1 << 4) can be low or high (double buffer / cache) */
	80	#define REG_DRAM_BLOCK (0x6 << 4)
	81	#define REG_DRAM_BLOCK_BEGIN (0x8 << 4)
	82	#define REG_DRAM_BLOCK_DATA (0xa << 4)
	83
	84	#define LEDSEL0 6
	85	#define LEDSEL1 7
	86
	87	#define NEXT_REG 1
	88
	89	#define EVENTS_PER_CLUSTER 7
	90
	91	#define CHUNK_SIZE 1024
	92
	93	/*
	94	* The entire ASIX Sigma DRAM is an array of struct sigma_dram_line[1024];
	95	*/
	96
	97	/* One "DRAM cluster" contains a timestamp and 7 samples, 16b total. */
	98	struct sigma_dram_cluster {
	99	uint8_t timestamp_lo;
	100	uint8_t timestamp_hi;
	101	struct {
	102	uint8_t sample_hi;
	103	uint8_t sample_lo;
	104	} samples[7];
	105	};
	106
	107	/* One "DRAM line" contains 64 "DRAM clusters", 1024b total. */
	108	struct sigma_dram_line {
	109	struct sigma_dram_cluster cluster[64];
	110	};
	111
	112	struct clockselect_50 {
	113	uint8_t async;
	114	uint8_t fraction;
	115	uint16_t disabled_channels;
	116	};
	117
	118	/* The effect of all these are still a bit unclear. */
	119	struct triggerinout {
	120	uint8_t trgout_resistor_enable : 1;
	121	uint8_t trgout_resistor_pullup : 1;
	122	uint8_t reserved1 : 1;
	123	uint8_t trgout_bytrigger : 1;
	124	uint8_t trgout_byevent : 1;
	125	uint8_t trgout_bytriggerin : 1;
	126	uint8_t reserved2 : 2;
	127
	128	/* Should be set same as the first two */
	129	uint8_t trgout_resistor_enable2 : 1;
	130	uint8_t trgout_resistor_pullup2 : 1;
	131
	132	uint8_t reserved3 : 1;
	133	uint8_t trgout_long : 1;
	134	uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */
	135	uint8_t trgin_negate : 1;
	136	uint8_t trgout_enable : 1;
	137	uint8_t trgin_enable : 1;
	138	};
	139
	140	struct triggerlut {
	141	/* The actual LUTs. */
	142	uint16_t m0d[4], m1d[4], m2d[4];
	143	uint16_t m3, m3s, m4;
	144
	145	/* Parameters should be sent as a single register write. */
	146	struct {
	147	uint8_t selc : 2;
	148	uint8_t selpresc : 6;
	149
	150	uint8_t selinc : 2;
	151	uint8_t selres : 2;
	152	uint8_t sela : 2;
	153	uint8_t selb : 2;
	154
	155	uint16_t cmpb;
	156	uint16_t cmpa;
	157	} params;
	158	};
	159
	160	/* Trigger configuration */
	161	struct sigma_trigger {
	162	/* Only two channels can be used in mask. */
	163	uint16_t risingmask;
	164	uint16_t fallingmask;
	165
	166	/* Simple trigger support (<= 50 MHz). */
	167	uint16_t simplemask;
	168	uint16_t simplevalue;
	169
	170	/* TODO: Advanced trigger support (boolean expressions). */
	171	};
	172
	173	/* Events for trigger operation. */
	174	enum triggerop {
	175	OP_LEVEL = 1,
	176	OP_NOT,
	177	OP_RISE,
	178	OP_FALL,
	179	OP_RISEFALL,
	180	OP_NOTRISE,
	181	OP_NOTFALL,
	182	OP_NOTRISEFALL,
	183	};
	184
	185	/* Logical functions for trigger operation. */
	186	enum triggerfunc {
	187	FUNC_AND = 1,
	188	FUNC_NAND,
	189	FUNC_OR,
	190	FUNC_NOR,
	191	FUNC_XOR,
	192	FUNC_NXOR,
	193	};
	194
	195	struct sigma_state {
	196	enum {
	197	SIGMA_UNINITIALIZED = 0,
	198	SIGMA_IDLE,
	199	SIGMA_CAPTURE,
	200	SIGMA_DOWNLOAD,
	201	} state;
	202
	203	uint16_t lastts;
	204	uint16_t lastsample;
	205	};
	206
	207	/* Private, per-device-instance driver context. */
	208	struct dev_context {
	209	struct ftdi_context ftdic;
	210	uint64_t cur_samplerate;
	211	uint64_t period_ps;
	212	uint64_t limit_msec;
	213	uint64_t limit_samples;
	214	struct timeval start_tv;
	215	int cur_firmware;
	216	int num_channels;
	217	int cur_channels;
	218	int samples_per_event;
	219	int capture_ratio;
	220	struct sigma_trigger trigger;
	221	int use_triggers;
	222	struct sigma_state state;
	223	};
	224
	225	extern SR_PRIV const uint64_t samplerates[];
	226	extern SR_PRIV const size_t samplerates_count;
	227
	228	SR_PRIV int sigma_write_register(uint8_t reg, uint8_t *data, size_t len,
	229	struct dev_context *devc);
	230	SR_PRIV int sigma_set_register(uint8_t reg, uint8_t value, struct dev_context *devc);
	231	SR_PRIV int sigma_write_trigger_lut(struct triggerlut lut, struct dev_context devc);
	232	SR_PRIV void sigma_clear_helper(void *priv);
	233	SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate);
	234	SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi);
	235	SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data);
	236	SR_PRIV int sigma_build_basic_trigger(struct triggerlut lut, struct dev_context devc);
	237
	238	#endif