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1 | /* | |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2010-2012 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | #ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H | |
23 | #define LIBSIGROK_HARDWARE_ASIX_SIGMA_PROTOCOL_H | |
24 | ||
25 | #include <stdint.h> | |
26 | #include <stdlib.h> | |
27 | #include <glib.h> | |
28 | #include <ftdi.h> | |
29 | #include <string.h> | |
30 | #include <libsigrok/libsigrok.h> | |
31 | #include "libsigrok-internal.h" | |
32 | ||
33 | /* | |
34 | * Triggers are not working in this implementation. Stop claiming | |
35 | * support for the feature which effectively is not available, until | |
36 | * the implementation got fixed. Yet keep the code in place and allow | |
37 | * developers to turn on this switch during development. | |
38 | */ | |
39 | #define ASIX_SIGMA_WITH_TRIGGER 0 | |
40 | ||
41 | #define LOG_PREFIX "asix-sigma" | |
42 | ||
43 | #define USB_VENDOR 0xa600 | |
44 | #define USB_PRODUCT 0xa000 | |
45 | #define USB_DESCRIPTION "ASIX SIGMA" | |
46 | #define USB_VENDOR_NAME "ASIX" | |
47 | #define USB_MODEL_NAME "SIGMA" | |
48 | ||
49 | enum sigma_write_register { | |
50 | WRITE_CLOCK_SELECT = 0, | |
51 | WRITE_TRIGGER_SELECT0 = 1, | |
52 | WRITE_TRIGGER_SELECT1 = 2, | |
53 | WRITE_MODE = 3, | |
54 | WRITE_MEMROW = 4, | |
55 | WRITE_POST_TRIGGER = 5, | |
56 | WRITE_TRIGGER_OPTION = 6, | |
57 | WRITE_PIN_VIEW = 7, | |
58 | ||
59 | WRITE_TEST = 15, | |
60 | }; | |
61 | ||
62 | enum sigma_read_register { | |
63 | READ_ID = 0, | |
64 | READ_TRIGGER_POS_LOW = 1, | |
65 | READ_TRIGGER_POS_HIGH = 2, | |
66 | READ_TRIGGER_POS_UP = 3, | |
67 | READ_STOP_POS_LOW = 4, | |
68 | READ_STOP_POS_HIGH = 5, | |
69 | READ_STOP_POS_UP = 6, | |
70 | READ_MODE = 7, | |
71 | READ_PIN_CHANGE_LOW = 8, | |
72 | READ_PIN_CHANGE_HIGH = 9, | |
73 | READ_BLOCK_LAST_TS_LOW = 10, | |
74 | READ_BLOCK_LAST_TS_HIGH = 11, | |
75 | READ_PIN_VIEW = 12, | |
76 | ||
77 | READ_TEST = 15, | |
78 | }; | |
79 | ||
80 | #define REG_ADDR_LOW (0x0 << 4) | |
81 | #define REG_ADDR_HIGH (0x1 << 4) | |
82 | #define REG_DATA_LOW (0x2 << 4) | |
83 | #define REG_DATA_HIGH_WRITE (0x3 << 4) | |
84 | #define REG_READ_ADDR (0x4 << 4) | |
85 | #define REG_DRAM_WAIT_ACK (0x5 << 4) | |
86 | ||
87 | /* Bit (1 << 4) can be low or high (double buffer / cache) */ | |
88 | #define REG_DRAM_BLOCK (0x6 << 4) | |
89 | #define REG_DRAM_BLOCK_BEGIN (0x8 << 4) | |
90 | #define REG_DRAM_BLOCK_DATA (0xa << 4) | |
91 | ||
92 | #define LEDSEL0 6 | |
93 | #define LEDSEL1 7 | |
94 | ||
95 | #define NEXT_REG 1 | |
96 | ||
97 | #define EVENTS_PER_CLUSTER 7 | |
98 | ||
99 | #define CHUNK_SIZE 1024 | |
100 | ||
101 | /* WRITE_MODE register fields. */ | |
102 | #define WMR_SDRAMWRITEEN (1 << 0) | |
103 | #define WMR_SDRAMREADEN (1 << 1) | |
104 | #define WMR_TRGRES (1 << 2) | |
105 | #define WMR_TRGEN (1 << 3) | |
106 | #define WMR_FORCESTOP (1 << 4) | |
107 | #define WMR_TRGSW (1 << 5) | |
108 | /* not used: bit position 6 */ | |
109 | #define WMR_SDRAMINIT (1 << 7) | |
110 | ||
111 | /* READ_MODE register fields. */ | |
112 | #define RMR_SDRAMWRITEEN (1 << 0) | |
113 | #define RMR_SDRAMREADEN (1 << 1) | |
114 | /* not used: bit position 2 */ | |
115 | #define RMR_TRGEN (1 << 3) | |
116 | #define RMR_ROUND (1 << 4) | |
117 | #define RMR_TRIGGERED (1 << 5) | |
118 | #define RMR_POSTTRIGGERED (1 << 6) | |
119 | /* not used: bit position 7 */ | |
120 | ||
121 | /* | |
122 | * The entire ASIX Sigma DRAM is an array of struct sigma_dram_line[1024]; | |
123 | */ | |
124 | ||
125 | /* One "DRAM cluster" contains a timestamp and 7 samples, 16b total. */ | |
126 | struct sigma_dram_cluster { | |
127 | uint8_t timestamp_lo; | |
128 | uint8_t timestamp_hi; | |
129 | struct { | |
130 | uint8_t sample_hi; | |
131 | uint8_t sample_lo; | |
132 | } samples[7]; | |
133 | }; | |
134 | ||
135 | /* One "DRAM line" contains 64 "DRAM clusters", 1024b total. */ | |
136 | struct sigma_dram_line { | |
137 | struct sigma_dram_cluster cluster[64]; | |
138 | }; | |
139 | ||
140 | struct clockselect_50 { | |
141 | uint8_t async; | |
142 | uint8_t fraction; | |
143 | uint16_t disabled_channels; | |
144 | }; | |
145 | ||
146 | /* The effect of all these are still a bit unclear. */ | |
147 | struct triggerinout { | |
148 | uint8_t trgout_resistor_enable : 1; | |
149 | uint8_t trgout_resistor_pullup : 1; | |
150 | uint8_t reserved1 : 1; | |
151 | uint8_t trgout_bytrigger : 1; | |
152 | uint8_t trgout_byevent : 1; | |
153 | uint8_t trgout_bytriggerin : 1; | |
154 | uint8_t reserved2 : 2; | |
155 | ||
156 | /* Should be set same as the first two */ | |
157 | uint8_t trgout_resistor_enable2 : 1; | |
158 | uint8_t trgout_resistor_pullup2 : 1; | |
159 | ||
160 | uint8_t reserved3 : 1; | |
161 | uint8_t trgout_long : 1; | |
162 | uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */ | |
163 | uint8_t trgin_negate : 1; | |
164 | uint8_t trgout_enable : 1; | |
165 | uint8_t trgin_enable : 1; | |
166 | }; | |
167 | ||
168 | struct triggerlut { | |
169 | /* The actual LUTs. */ | |
170 | uint16_t m0d[4], m1d[4], m2d[4]; | |
171 | uint16_t m3, m3s, m4; | |
172 | ||
173 | /* Parameters should be sent as a single register write. */ | |
174 | struct { | |
175 | uint8_t selc : 2; | |
176 | uint8_t selpresc : 6; | |
177 | ||
178 | uint8_t selinc : 2; | |
179 | uint8_t selres : 2; | |
180 | uint8_t sela : 2; | |
181 | uint8_t selb : 2; | |
182 | ||
183 | uint16_t cmpb; | |
184 | uint16_t cmpa; | |
185 | } params; | |
186 | }; | |
187 | ||
188 | /* Trigger configuration */ | |
189 | struct sigma_trigger { | |
190 | /* Only two channels can be used in mask. */ | |
191 | uint16_t risingmask; | |
192 | uint16_t fallingmask; | |
193 | ||
194 | /* Simple trigger support (<= 50 MHz). */ | |
195 | uint16_t simplemask; | |
196 | uint16_t simplevalue; | |
197 | ||
198 | /* TODO: Advanced trigger support (boolean expressions). */ | |
199 | }; | |
200 | ||
201 | /* Events for trigger operation. */ | |
202 | enum triggerop { | |
203 | OP_LEVEL = 1, | |
204 | OP_NOT, | |
205 | OP_RISE, | |
206 | OP_FALL, | |
207 | OP_RISEFALL, | |
208 | OP_NOTRISE, | |
209 | OP_NOTFALL, | |
210 | OP_NOTRISEFALL, | |
211 | }; | |
212 | ||
213 | /* Logical functions for trigger operation. */ | |
214 | enum triggerfunc { | |
215 | FUNC_AND = 1, | |
216 | FUNC_NAND, | |
217 | FUNC_OR, | |
218 | FUNC_NOR, | |
219 | FUNC_XOR, | |
220 | FUNC_NXOR, | |
221 | }; | |
222 | ||
223 | struct sigma_state { | |
224 | enum { | |
225 | SIGMA_UNINITIALIZED = 0, | |
226 | SIGMA_IDLE, | |
227 | SIGMA_CAPTURE, | |
228 | SIGMA_DOWNLOAD, | |
229 | } state; | |
230 | ||
231 | uint16_t lastts; | |
232 | uint16_t lastsample; | |
233 | }; | |
234 | ||
235 | /* Private, per-device-instance driver context. */ | |
236 | struct dev_context { | |
237 | struct ftdi_context ftdic; | |
238 | uint64_t cur_samplerate; | |
239 | uint64_t period_ps; | |
240 | uint64_t limit_msec; | |
241 | uint64_t limit_samples; | |
242 | struct timeval start_tv; | |
243 | int cur_firmware; | |
244 | int num_channels; | |
245 | int cur_channels; | |
246 | int samples_per_event; | |
247 | int capture_ratio; | |
248 | struct sigma_trigger trigger; | |
249 | int use_triggers; | |
250 | struct sigma_state state; | |
251 | }; | |
252 | ||
253 | extern SR_PRIV const uint64_t samplerates[]; | |
254 | extern SR_PRIV const size_t samplerates_count; | |
255 | ||
256 | SR_PRIV int sigma_write_register(uint8_t reg, uint8_t *data, size_t len, | |
257 | struct dev_context *devc); | |
258 | SR_PRIV int sigma_set_register(uint8_t reg, uint8_t value, struct dev_context *devc); | |
259 | SR_PRIV int sigma_write_trigger_lut(struct triggerlut *lut, struct dev_context *devc); | |
260 | SR_PRIV void sigma_clear_helper(void *priv); | |
261 | SR_PRIV uint64_t sigma_limit_samples_to_msec(const struct dev_context *devc, | |
262 | uint64_t limit_samples); | |
263 | SR_PRIV int sigma_set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate); | |
264 | SR_PRIV int sigma_convert_trigger(const struct sr_dev_inst *sdi); | |
265 | SR_PRIV int sigma_receive_data(int fd, int revents, void *cb_data); | |
266 | SR_PRIV int sigma_build_basic_trigger(struct triggerlut *lut, struct dev_context *devc); | |
267 | ||
268 | #endif |