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Commit | Line | Data |
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1 | ------------------------------------------------------------------------------- | |
2 | Avago ADNS-5020 | |
3 | ------------------------------------------------------------------------------- | |
4 | ||
5 | This directory contains a capture of the communication between a Cypress | |
6 | CY7C63813 and an Avago ADNS-5020 optical mouse sensor. | |
7 | ||
8 | This is the internals of a fairly generic Dell optical mouse. | |
9 | ||
10 | It is not nearly a complete sample of what types of traffic are possible, | |
11 | specifically, it doesn't include a capture of "Burst Mode" traffic, which the | |
12 | mouse firmware doesn't appear to use, even though Avago "highly recommends" | |
13 | that burst mode be used for all devices. | |
14 | ||
15 | ||
16 | adns5020-cy7c63813_init.sr | |
17 | -------------------------- | |
18 | ||
19 | Captures the traffic from power on of the device (USB plug in) for 1 second. | |
20 | Traces the initialization and reset pins as well as some general traffic. | |
21 | ||
22 | ||
23 | Logic analyzer setup | |
24 | -------------------- | |
25 | ||
26 | The logic analyzer used was a generic Saleae Logic clone (at 6MHz). | |
27 | ||
28 | Avago documents max speed as 1MHz. 6MHz is used to try and avoid catching | |
29 | any glitches on CS. | |
30 | ||
31 | Probe Pin Description | |
32 | -------------------------- | |
33 | 0 VDD Used to trigger sampling | |
34 | 3 SDIO Bidir, but we use the MOSI stack from SPI | |
35 | 4 SCK SPI clock | |
36 | 5 NCS Chip select | |
37 | 6 NRESET Chip reset | |
38 | 7 XY_LED Chip LED control, not used by this configuration | |
39 | ||
40 | ||
41 | Data | |
42 | ---- | |
43 | ||
44 | The sigrok command line used was: | |
45 | ||
46 | sigrok-cli -d fx2lafw --config samplerate=6M --time 1s \ | |
47 | -o adns5020-cy7c63813_init.sr -t VDD=r \ | |
48 | --channels 3=SDIO,5=NCS,4=SCK,6=NRESET,7=XY_LED,0=VDD | |
49 |