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1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2011 Daniel Ribeiro <drwyrm@gmail.com>
5 * Copyright (C) 2012 Renato Caldas <rmsc@fe.up.pt>
6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdio.h>
22#include <stdlib.h>
23#include <string.h>
24#include <unistd.h>
25#include <fcntl.h>
26#include <sys/time.h>
27#include <inttypes.h>
28#include <glib.h>
29#include <libudev.h>
30#include <arpa/inet.h>
31#include "libsigrok.h"
32#include "libsigrok-internal.h"
33#include "link-mso19.h"
34
35#define USB_VENDOR "3195"
36#define USB_PRODUCT "f190"
37
38#define NUM_PROBES 8
39
40static const int hwcaps[] = {
41 SR_HWCAP_LOGIC_ANALYZER,
42// SR_HWCAP_OSCILLOSCOPE,
43// SR_HWCAP_PAT_GENERATOR,
44
45 SR_HWCAP_SAMPLERATE,
46// SR_HWCAP_CAPTURE_RATIO,
47 SR_HWCAP_LIMIT_SAMPLES,
48 0,
49};
50
51/*
52 * Probes are numbered 0 to 7.
53 *
54 * See also: http://www.linkinstruments.com/images/mso19_1113.gif
55 */
56static const char *probe_names[NUM_PROBES + 1] = {
57 "0",
58 "1",
59 "2",
60 "3",
61 "4",
62 "5",
63 "6",
64 "7",
65 NULL,
66};
67
68static const uint64_t supported_samplerates[] = {
69 SR_HZ(100),
70 SR_HZ(200),
71 SR_HZ(500),
72 SR_KHZ(1),
73 SR_KHZ(2),
74 SR_KHZ(5),
75 SR_KHZ(10),
76 SR_KHZ(20),
77 SR_KHZ(50),
78 SR_KHZ(100),
79 SR_KHZ(200),
80 SR_KHZ(500),
81 SR_MHZ(1),
82 SR_MHZ(2),
83 SR_MHZ(5),
84 SR_MHZ(10),
85 SR_MHZ(20),
86 SR_MHZ(50),
87 SR_MHZ(100),
88 SR_MHZ(200),
89 0,
90};
91
92static const struct sr_samplerates samplerates = {
93 0,
94 0,
95 0,
96 supported_samplerates,
97};
98
99static GSList *dev_insts = NULL;
100
101static int mso_send_control_message(struct sr_dev_inst *sdi,
102 uint16_t payload[], int n)
103{
104 int fd = sdi->serial->fd;
105 int i, w, ret, s = n * 2 + sizeof(mso_head) + sizeof(mso_foot);
106 char *p, *buf;
107
108 ret = SR_ERR;
109
110 if (fd < 0)
111 goto ret;
112
113 if (!(buf = g_try_malloc(s))) {
114 sr_err("mso19: %s: buf malloc failed", __func__);
115 ret = SR_ERR_MALLOC;
116 goto ret;
117 }
118
119 p = buf;
120 memcpy(p, mso_head, sizeof(mso_head));
121 p += sizeof(mso_head);
122
123 for (i = 0; i < n; i++) {
124 *(uint16_t *) p = htons(payload[i]);
125 p += 2;
126 }
127 memcpy(p, mso_foot, sizeof(mso_foot));
128
129 w = 0;
130 while (w < s) {
131 ret = serial_write(fd, buf + w, s - w);
132 if (ret < 0) {
133 ret = SR_ERR;
134 goto free;
135 }
136 w += ret;
137 }
138 ret = SR_OK;
139free:
140 g_free(buf);
141ret:
142 return ret;
143}
144
145static int mso_reset_adc(struct sr_dev_inst *sdi)
146{
147 struct context *ctx = sdi->priv;
148 uint16_t ops[2];
149
150 ops[0] = mso_trans(REG_CTL1, (ctx->ctlbase1 | BIT_CTL1_RESETADC));
151 ops[1] = mso_trans(REG_CTL1, ctx->ctlbase1);
152 ctx->ctlbase1 |= BIT_CTL1_ADC_UNKNOWN4;
153
154 sr_dbg("mso19: Requesting ADC reset");
155 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
156}
157
158static int mso_reset_fsm(struct sr_dev_inst *sdi)
159{
160 struct context *ctx = sdi->priv;
161 uint16_t ops[1];
162
163 ctx->ctlbase1 |= BIT_CTL1_RESETFSM;
164 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
165
166 sr_dbg("mso19: Requesting ADC reset");
167 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
168}
169
170static int mso_toggle_led(struct sr_dev_inst *sdi, int state)
171{
172 struct context *ctx = sdi->priv;
173 uint16_t ops[1];
174
175 ctx->ctlbase1 &= ~BIT_CTL1_LED;
176 if (state)
177 ctx->ctlbase1 |= BIT_CTL1_LED;
178 ops[0] = mso_trans(REG_CTL1, ctx->ctlbase1);
179
180 sr_dbg("mso19: Requesting LED toggle");
181 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
182}
183
184static int mso_check_trigger(struct sr_dev_inst *sdi, uint8_t *info)
185{
186 uint16_t ops[] = { mso_trans(REG_TRIGGER, 0) };
187 char buf[1];
188 int ret;
189
190 sr_dbg("mso19: Requesting trigger state");
191 ret = mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
192 if (info == NULL || ret != SR_OK)
193 return ret;
194
195 buf[0] = 0;
196 if (serial_read(sdi->serial->fd, buf, 1) != 1) /* FIXME: Need timeout */
197 ret = SR_ERR;
198 *info = buf[0];
199
200 sr_dbg("mso19: Trigger state is: 0x%x", *info);
201 return ret;
202}
203
204static int mso_read_buffer(struct sr_dev_inst *sdi)
205{
206 uint16_t ops[] = { mso_trans(REG_BUFFER, 0) };
207
208 sr_dbg("mso19: Requesting buffer dump");
209 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
210}
211
212static int mso_arm(struct sr_dev_inst *sdi)
213{
214 struct context *ctx = sdi->priv;
215 uint16_t ops[] = {
216 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETFSM),
217 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_ARM),
218 mso_trans(REG_CTL1, ctx->ctlbase1),
219 };
220
221 sr_dbg("mso19: Requesting trigger arm");
222 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
223}
224
225static int mso_force_capture(struct sr_dev_inst *sdi)
226{
227 struct context *ctx = sdi->priv;
228 uint16_t ops[] = {
229 mso_trans(REG_CTL1, ctx->ctlbase1 | 8),
230 mso_trans(REG_CTL1, ctx->ctlbase1),
231 };
232
233 sr_dbg("mso19: Requesting forced capture");
234 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
235}
236
237static int mso_dac_out(struct sr_dev_inst *sdi, uint16_t val)
238{
239 struct context *ctx = sdi->priv;
240 uint16_t ops[] = {
241 mso_trans(REG_DAC1, (val >> 8) & 0xff),
242 mso_trans(REG_DAC2, val & 0xff),
243 mso_trans(REG_CTL1, ctx->ctlbase1 | BIT_CTL1_RESETADC),
244 };
245
246 sr_dbg("mso19: Setting dac word to 0x%x", val);
247 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
248}
249
250static int mso_clkrate_out(struct sr_dev_inst *sdi, uint16_t val)
251{
252 uint16_t ops[] = {
253 mso_trans(REG_CLKRATE1, (val >> 8) & 0xff),
254 mso_trans(REG_CLKRATE2, val & 0xff),
255 };
256
257 sr_dbg("mso19: Setting clkrate word to 0x%x", val);
258 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
259}
260
261static int mso_configure_rate(struct sr_dev_inst *sdi, uint32_t rate)
262{
263 struct context *ctx = sdi->priv;
264 unsigned int i;
265 int ret = SR_ERR;
266
267 for (i = 0; i < ARRAY_SIZE(rate_map); i++) {
268 if (rate_map[i].rate == rate) {
269 ctx->ctlbase2 = rate_map[i].slowmode;
270 ret = mso_clkrate_out(sdi, rate_map[i].val);
271 if (ret == SR_OK)
272 ctx->cur_rate = rate;
273 return ret;
274 }
275 }
276 return ret;
277}
278
279static inline uint16_t mso_calc_raw_from_mv(struct context *ctx)
280{
281 return (uint16_t) (0x200 -
282 ((ctx->dso_trigger_voltage / ctx->dso_probe_attn) /
283 ctx->vbit));
284}
285
286static int mso_configure_trigger(struct sr_dev_inst *sdi)
287{
288 struct context *ctx = sdi->priv;
289 uint16_t ops[16];
290 uint16_t dso_trigger = mso_calc_raw_from_mv(ctx);
291
292 dso_trigger &= 0x3ff;
293 if ((!ctx->trigger_slope && ctx->trigger_chan == 1) ||
294 (ctx->trigger_slope &&
295 (ctx->trigger_chan == 0 ||
296 ctx->trigger_chan == 2 ||
297 ctx->trigger_chan == 3)))
298 dso_trigger |= 0x400;
299
300 switch (ctx->trigger_chan) {
301 case 1:
302 dso_trigger |= 0xe000;
303 case 2:
304 dso_trigger |= 0x4000;
305 break;
306 case 3:
307 dso_trigger |= 0x2000;
308 break;
309 case 4:
310 dso_trigger |= 0xa000;
311 break;
312 case 5:
313 dso_trigger |= 0x8000;
314 break;
315 default:
316 case 0:
317 break;
318 }
319
320 switch (ctx->trigger_outsrc) {
321 case 1:
322 dso_trigger |= 0x800;
323 break;
324 case 2:
325 dso_trigger |= 0x1000;
326 break;
327 case 3:
328 dso_trigger |= 0x1800;
329 break;
330
331 }
332
333 ops[0] = mso_trans(5, ctx->la_trigger);
334 ops[1] = mso_trans(6, ctx->la_trigger_mask);
335 ops[2] = mso_trans(3, dso_trigger & 0xff);
336 ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
337 ops[4] = mso_trans(11,
338 ctx->dso_trigger_width / SR_HZ_TO_NS(ctx->cur_rate));
339
340 /* Select the SPI/I2C trigger config bank */
341 ops[5] = mso_trans(REG_CTL2, (ctx->ctlbase2 | BITS_CTL2_BANK(2)));
342 /* Configure the SPI/I2C protocol trigger */
343 ops[6] = mso_trans(REG_PT_WORD(0), ctx->protocol_trigger.word[0]);
344 ops[7] = mso_trans(REG_PT_WORD(1), ctx->protocol_trigger.word[1]);
345 ops[8] = mso_trans(REG_PT_WORD(2), ctx->protocol_trigger.word[2]);
346 ops[9] = mso_trans(REG_PT_WORD(3), ctx->protocol_trigger.word[3]);
347 ops[10] = mso_trans(REG_PT_MASK(0), ctx->protocol_trigger.mask[0]);
348 ops[11] = mso_trans(REG_PT_MASK(1), ctx->protocol_trigger.mask[1]);
349 ops[12] = mso_trans(REG_PT_MASK(2), ctx->protocol_trigger.mask[2]);
350 ops[13] = mso_trans(REG_PT_MASK(3), ctx->protocol_trigger.mask[3]);
351 ops[14] = mso_trans(REG_PT_SPIMODE, ctx->protocol_trigger.spimode);
352 /* Select the default config bank */
353 ops[15] = mso_trans(REG_CTL2, ctx->ctlbase2);
354
355 return mso_send_control_message(sdi, ARRAY_AND_SIZE(ops));
356}
357
358static int mso_configure_threshold_level(struct sr_dev_inst *sdi)
359{
360 struct context *ctx = sdi->priv;
361
362 return mso_dac_out(sdi, la_threshold_map[ctx->la_threshold]);
363}
364
365static int mso_parse_serial(const char *iSerial, const char *iProduct,
366 struct context *ctx)
367{
368 unsigned int u1, u2, u3, u4, u5, u6;
369
370 iProduct = iProduct;
371 /* FIXME: This code is in the original app, but I think its
372 * used only for the GUI */
373/* if (strstr(iProduct, "REV_02") || strstr(iProduct, "REV_03"))
374 ctx->num_sample_rates = 0x16;
375 else
376 ctx->num_sample_rates = 0x10; */
377
378 /* parse iSerial */
379 if (iSerial[0] != '4' || sscanf(iSerial, "%5u%3u%3u%1u%1u%6u",
380 &u1, &u2, &u3, &u4, &u5, &u6) != 6)
381 return SR_ERR;
382 ctx->hwmodel = u4;
383 ctx->hwrev = u5;
384 ctx->serial = u6;
385 ctx->vbit = u1 / 10000;
386 if (ctx->vbit == 0)
387 ctx->vbit = 4.19195;
388 ctx->dac_offset = u2;
389 if (ctx->dac_offset == 0)
390 ctx->dac_offset = 0x1ff;
391 ctx->offset_range = u3;
392 if (ctx->offset_range == 0)
393 ctx->offset_range = 0x17d;
394
395 /*
396 * FIXME: There is more code on the original software to handle
397 * bigger iSerial strings, but as I can't test on my device
398 * I will not implement it yet
399 */
400
401 return SR_OK;
402}
403
404static int hw_init(void)
405{
406 struct sr_dev_inst *sdi;
407 int devcnt = 0;
408 struct udev *udev;
409 struct udev_enumerate *enumerate;
410 struct udev_list_entry *devs, *dev_list_entry;
411 struct context *ctx;
412
413 /* It's easier to map usb<->serial using udev */
414 /*
415 * FIXME: On windows we can get the same information from the
416 * registry, add an #ifdef here later
417 */
418 udev = udev_new();
419 if (!udev) {
420 sr_err("mso19: Failed to initialize udev.");
421 goto ret;
422 }
423 enumerate = udev_enumerate_new(udev);
424 udev_enumerate_add_match_subsystem(enumerate, "usb-serial");
425 udev_enumerate_scan_devices(enumerate);
426 devs = udev_enumerate_get_list_entry(enumerate);
427 udev_list_entry_foreach(dev_list_entry, devs) {
428 const char *syspath, *sysname, *idVendor, *idProduct,
429 *iSerial, *iProduct;
430 char path[32], manufacturer[32], product[32], hwrev[32];
431 struct udev_device *dev, *parent;
432 size_t s;
433
434 syspath = udev_list_entry_get_name(dev_list_entry);
435 dev = udev_device_new_from_syspath(udev, syspath);
436 sysname = udev_device_get_sysname(dev);
437 parent = udev_device_get_parent_with_subsystem_devtype(
438 dev, "usb", "usb_device");
439 if (!parent) {
440 sr_err("mso19: Unable to find parent usb device for %s",
441 sysname);
442 continue;
443 }
444
445 idVendor = udev_device_get_sysattr_value(parent, "idVendor");
446 idProduct = udev_device_get_sysattr_value(parent, "idProduct");
447 if (strcmp(USB_VENDOR, idVendor)
448 || strcmp(USB_PRODUCT, idProduct))
449 continue;
450
451 iSerial = udev_device_get_sysattr_value(parent, "serial");
452 iProduct = udev_device_get_sysattr_value(parent, "product");
453
454 snprintf(path, sizeof(path), "/dev/%s", sysname);
455
456 s = strcspn(iProduct, " ");
457 if (s > sizeof(product) ||
458 strlen(iProduct) - s > sizeof(manufacturer)) {
459 sr_err("mso19: Could not parse iProduct: %s", iProduct);
460 continue;
461 }
462 strncpy(product, iProduct, s);
463 product[s] = 0;
464 strcpy(manufacturer, iProduct + s);
465
466 if (!(ctx = g_try_malloc0(sizeof(struct context)))) {
467 sr_err("mso19: %s: ctx malloc failed", __func__);
468 continue; /* TODO: Errors handled correctly? */
469 }
470
471 if (mso_parse_serial(iSerial, iProduct, ctx) != SR_OK) {
472 sr_err("mso19: Invalid iSerial: %s", iSerial);
473 goto err_free_ctx;
474 }
475 sprintf(hwrev, "r%d", ctx->hwrev);
476
477 /* hardware initial state */
478 ctx->ctlbase1 = 0;
479 {
480 /* Initialize the protocol trigger configuration */
481 int i;
482 for (i = 0; i < 4; i++) {
483 ctx->protocol_trigger.word[i] = 0;
484 ctx->protocol_trigger.mask[i] = 0xff;
485 }
486 ctx->protocol_trigger.spimode = 0;
487 }
488
489 sdi = sr_dev_inst_new(devcnt, SR_ST_INITIALIZING,
490 manufacturer, product, hwrev);
491 if (!sdi) {
492 sr_err("mso19: Unable to create device instance for %s",
493 sysname);
494 goto err_free_ctx;
495 }
496
497 /* save a pointer to our private instance data */
498 sdi->priv = ctx;
499
500 sdi->serial = sr_serial_dev_inst_new(path, -1);
501 if (!sdi->serial)
502 goto err_dev_inst_free;
503
504 dev_insts = g_slist_append(dev_insts, sdi);
505 devcnt++;
506 continue;
507
508err_dev_inst_free:
509 sr_dev_inst_free(sdi);
510err_free_ctx:
511 g_free(ctx);
512 }
513
514 udev_enumerate_unref(enumerate);
515 udev_unref(udev);
516
517ret:
518 return devcnt;
519}
520
521static int hw_cleanup(void)
522{
523 GSList *l;
524 struct sr_dev_inst *sdi;
525 int ret;
526
527 ret = SR_OK;
528 /* Properly close all devices. */
529 for (l = dev_insts; l; l = l->next) {
530 if (!(sdi = l->data)) {
531 /* Log error, but continue cleaning up the rest. */
532 sr_err("mso19: %s: sdi was NULL, continuing", __func__);
533 ret = SR_ERR_BUG;
534 continue;
535 }
536 if (sdi->serial->fd != -1)
537 serial_close(sdi->serial->fd);
538 sr_dev_inst_free(sdi);
539 }
540 g_slist_free(dev_insts);
541 dev_insts = NULL;
542
543 return ret;
544}
545
546static int hw_dev_open(int dev_index)
547{
548 struct sr_dev_inst *sdi;
549 struct context *ctx;
550 int ret = SR_ERR;
551
552 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
553 return ret;
554
555 ctx = sdi->priv;
556 sdi->serial->fd = serial_open(sdi->serial->port, O_RDWR);
557 if (sdi->serial->fd == -1)
558 return ret;
559
560 ret = serial_set_params(sdi->serial->fd, 460800, 8, 0, 1, 2);
561 if (ret != SR_OK)
562 return ret;
563
564 sdi->status = SR_ST_ACTIVE;
565
566 /* FIXME: discard serial buffer */
567
568 mso_check_trigger(sdi, &ctx->trigger_state);
569 sr_dbg("mso19: trigger state: 0x%x", ctx->trigger_state);
570
571 ret = mso_reset_adc(sdi);
572 if (ret != SR_OK)
573 return ret;
574
575 mso_check_trigger(sdi, &ctx->trigger_state);
576 sr_dbg("mso19: trigger state: 0x%x", ctx->trigger_state);
577
578// ret = mso_reset_fsm(sdi);
579// if (ret != SR_OK)
580// return ret;
581
582 sr_dbg("mso19: Finished %s", __func__);
583
584// return SR_ERR;
585 return SR_OK;
586}
587
588static int hw_dev_close(int dev_index)
589{
590 struct sr_dev_inst *sdi;
591
592 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index))) {
593 sr_err("mso19: %s: sdi was NULL", __func__);
594 return SR_ERR_BUG;
595 }
596
597 /* TODO */
598 if (sdi->serial->fd != -1) {
599 serial_close(sdi->serial->fd);
600 sdi->serial->fd = -1;
601 sdi->status = SR_ST_INACTIVE;
602 }
603
604 sr_dbg("mso19: finished %s", __func__);
605 return SR_OK;
606}
607
608static const void *hw_dev_info_get(int dev_index, int dev_info_id)
609{
610 struct sr_dev_inst *sdi;
611 struct context *ctx;
612 const void *info = NULL;
613
614 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
615 return NULL;
616 ctx = sdi->priv;
617
618 switch (dev_info_id) {
619 case SR_DI_INST:
620 info = sdi;
621 break;
622 case SR_DI_NUM_PROBES: /* FIXME: How to report analog probe? */
623 info = GINT_TO_POINTER(NUM_PROBES);
624 break;
625 case SR_DI_PROBE_NAMES:
626 info = probe_names;
627 break;
628 case SR_DI_SAMPLERATES:
629 info = &samplerates;
630 break;
631 case SR_DI_TRIGGER_TYPES:
632 info = "01"; /* FIXME */
633 break;
634 case SR_DI_CUR_SAMPLERATE:
635 info = &ctx->cur_rate;
636 break;
637 }
638 return info;
639}
640
641static int hw_dev_status_get(int dev_index)
642{
643 struct sr_dev_inst *sdi;
644
645 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
646 return SR_ST_NOT_FOUND;
647
648 return sdi->status;
649}
650
651static const int *hw_hwcap_get_all(void)
652{
653 return hwcaps;
654}
655
656static int hw_dev_config_set(int dev_index, int hwcap, const void *value)
657{
658 struct sr_dev_inst *sdi;
659
660 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
661 return SR_ERR;
662
663 switch (hwcap) {
664 case SR_HWCAP_SAMPLERATE:
665 return mso_configure_rate(sdi, *(const uint64_t *) value);
666 case SR_HWCAP_PROBECONFIG:
667 case SR_HWCAP_LIMIT_SAMPLES:
668 default:
669 return SR_OK; /* FIXME */
670 }
671}
672
673#define MSO_TRIGGER_UNKNOWN '!'
674#define MSO_TRIGGER_UNKNOWN1 '1'
675#define MSO_TRIGGER_UNKNOWN2 '2'
676#define MSO_TRIGGER_UNKNOWN3 '3'
677#define MSO_TRIGGER_WAIT '4'
678#define MSO_TRIGGER_FIRED '5'
679#define MSO_TRIGGER_DATAREADY '6'
680
681/* FIXME: Pass errors? */
682static int receive_data(int fd, int revents, void *cb_data)
683{
684 struct sr_dev_inst *sdi = cb_data;
685 struct context *ctx = sdi->priv;
686 struct sr_datafeed_packet packet;
687 struct sr_datafeed_logic logic;
688 uint8_t in[1024], logic_out[1024];
689 double analog_out[1024];
690 size_t i, s;
691
692 /* Avoid compiler warnings. */
693 (void)revents;
694
695 s = serial_read(fd, in, sizeof(in));
696 if (s <= 0)
697 return FALSE;
698
699 /* No samples */
700 if (ctx->trigger_state != MSO_TRIGGER_DATAREADY) {
701 ctx->trigger_state = in[0];
702 if (ctx->trigger_state == MSO_TRIGGER_DATAREADY) {
703 mso_read_buffer(sdi);
704 ctx->buffer_n = 0;
705 } else {
706 mso_check_trigger(sdi, NULL);
707 }
708 return FALSE;
709 }
710
711 /* the hardware always dumps 1024 samples, 24bits each */
712 if (ctx->buffer_n < 3072) {
713 memcpy(ctx->buffer + ctx->buffer_n, in, s);
714 ctx->buffer_n += s;
715 }
716 if (ctx->buffer_n < 3072)
717 return FALSE;
718
719 /* do the conversion */
720 for (i = 0; i < 1024; i++) {
721 /* FIXME: Need to do conversion to mV */
722 analog_out[i] = (ctx->buffer[i * 3] & 0x3f) |
723 ((ctx->buffer[i * 3 + 1] & 0xf) << 6);
724 logic_out[i] = ((ctx->buffer[i * 3 + 1] & 0x30) >> 4) |
725 ((ctx->buffer[i * 3 + 2] & 0x3f) << 2);
726 }
727
728 packet.type = SR_DF_LOGIC;
729 packet.payload = &logic;
730 logic.length = 1024;
731 logic.unitsize = 1;
732 logic.data = logic_out;
733 sr_session_send(ctx->session_dev_id, &packet);
734
735 // Dont bother fixing this yet, keep it "old style"
736 /*
737 packet.type = SR_DF_ANALOG;
738 packet.length = 1024;
739 packet.unitsize = sizeof(double);
740 packet.payload = analog_out;
741 sr_session_send(ctx->session_dev_id, &packet);
742 */
743
744 packet.type = SR_DF_END;
745 sr_session_send(ctx->session_dev_id, &packet);
746
747 return TRUE;
748}
749
750static int hw_dev_acquisition_start(int dev_index, void *cb_data)
751{
752 struct sr_dev_inst *sdi;
753 struct context *ctx;
754 struct sr_datafeed_packet packet;
755 struct sr_datafeed_header header;
756 int ret = SR_ERR;
757
758 if (!(sdi = sr_dev_inst_get(dev_insts, dev_index)))
759 return ret;
760 ctx = sdi->priv;
761
762 /* FIXME: No need to do full reconfigure every time */
763// ret = mso_reset_fsm(sdi);
764// if (ret != SR_OK)
765// return ret;
766
767 /* FIXME: ACDC Mode */
768 ctx->ctlbase1 &= 0x7f;
769// ctx->ctlbase1 |= ctx->acdcmode;
770
771 ret = mso_configure_rate(sdi, ctx->cur_rate);
772 if (ret != SR_OK)
773 return ret;
774
775 /* set dac offset */
776 ret = mso_dac_out(sdi, ctx->dac_offset);
777 if (ret != SR_OK)
778 return ret;
779
780 ret = mso_configure_threshold_level(sdi);
781 if (ret != SR_OK)
782 return ret;
783
784 ret = mso_configure_trigger(sdi);
785 if (ret != SR_OK)
786 return ret;
787
788 /* FIXME: trigger_position */
789
790
791 /* END of config hardware part */
792
793 /* with trigger */
794 ret = mso_arm(sdi);
795 if (ret != SR_OK)
796 return ret;
797
798 /* without trigger */
799// ret = mso_force_capture(sdi);
800// if (ret != SR_OK)
801// return ret;
802
803 mso_check_trigger(sdi, &ctx->trigger_state);
804 ret = mso_check_trigger(sdi, NULL);
805 if (ret != SR_OK)
806 return ret;
807
808 ctx->session_dev_id = cb_data;
809 sr_source_add(sdi->serial->fd, G_IO_IN, -1, receive_data, sdi);
810
811 packet.type = SR_DF_HEADER;
812 packet.payload = (unsigned char *) &header;
813 header.feed_version = 1;
814 gettimeofday(&header.starttime, NULL);
815 header.samplerate = ctx->cur_rate;
816 // header.num_analog_probes = 1;
817 header.num_logic_probes = 8;
818 sr_session_send(ctx->session_dev_id, &packet);
819
820 return ret;
821}
822
823/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
824static int hw_dev_acquisition_stop(int dev_index, void *cb_data)
825{
826 struct sr_datafeed_packet packet;
827
828 /* Avoid compiler warnings. */
829 (void)dev_index;
830
831 packet.type = SR_DF_END;
832 sr_session_send(cb_data, &packet);
833
834 return SR_OK;
835}
836
837SR_PRIV struct sr_dev_driver link_mso19_driver_info = {
838 .name = "link-mso19",
839 .longname = "Link Instruments MSO-19",
840 .api_version = 1,
841 .init = hw_init,
842 .cleanup = hw_cleanup,
843 .dev_open = hw_dev_open,
844 .dev_close = hw_dev_close,
845 .dev_info_get = hw_dev_info_get,
846 .dev_status_get = hw_dev_status_get,
847 .hwcap_get_all = hw_hwcap_get_all,
848 .dev_config_set = hw_dev_config_set,
849 .dev_acquisition_start = hw_dev_acquisition_start,
850 .dev_acquisition_stop = hw_dev_acquisition_stop,
851};
Hardware access and backend lib