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scpi_usbtmc_libusb: disable all clear_halt for Rigol DS1000
[libsigrok.git] / hardware / rigol-ds / api.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2012 Martin Ling <martin-git@earth.li>
5 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
6 * Copyright (C) 2013 Mathias Grimmberger <mgri@zaphod.sax.de>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
22#include <fcntl.h>
23#include <unistd.h>
24#include <stdlib.h>
25#include <string.h>
26#include <math.h>
27#include <glib.h>
28#include "libsigrok.h"
29#include "libsigrok-internal.h"
30#include "protocol.h"
31
32static const int32_t hwopts[] = {
33 SR_CONF_CONN,
34 SR_CONF_SERIALCOMM
35};
36
37static const int32_t hwcaps[] = {
38 SR_CONF_OSCILLOSCOPE,
39 SR_CONF_TIMEBASE,
40 SR_CONF_TRIGGER_SOURCE,
41 SR_CONF_TRIGGER_SLOPE,
42 SR_CONF_HORIZ_TRIGGERPOS,
43 SR_CONF_NUM_TIMEBASE,
44 SR_CONF_LIMIT_FRAMES,
45 SR_CONF_SAMPLERATE,
46};
47
48static const int32_t analog_hwcaps[] = {
49 SR_CONF_NUM_VDIV,
50 SR_CONF_VDIV,
51 SR_CONF_COUPLING,
52 SR_CONF_DATA_SOURCE,
53};
54
55static const uint64_t timebases[][2] = {
56 /* nanoseconds */
57 { 1, 1000000000 },
58 { 2, 1000000000 },
59 { 5, 1000000000 },
60 { 10, 1000000000 },
61 { 20, 1000000000 },
62 { 50, 1000000000 },
63 { 100, 1000000000 },
64 { 500, 1000000000 },
65 /* microseconds */
66 { 1, 1000000 },
67 { 2, 1000000 },
68 { 5, 1000000 },
69 { 10, 1000000 },
70 { 20, 1000000 },
71 { 50, 1000000 },
72 { 100, 1000000 },
73 { 200, 1000000 },
74 { 500, 1000000 },
75 /* milliseconds */
76 { 1, 1000 },
77 { 2, 1000 },
78 { 5, 1000 },
79 { 10, 1000 },
80 { 20, 1000 },
81 { 50, 1000 },
82 { 100, 1000 },
83 { 200, 1000 },
84 { 500, 1000 },
85 /* seconds */
86 { 1, 1 },
87 { 2, 1 },
88 { 5, 1 },
89 { 10, 1 },
90 { 20, 1 },
91 { 50, 1 },
92 { 100, 1 },
93 { 200, 1 },
94 { 500, 1 },
95 { 1000, 1 },
96};
97
98static const uint64_t vdivs[][2] = {
99 /* microvolts */
100 { 500, 1000000 },
101 /* millivolts */
102 { 1, 1000 },
103 { 2, 1000 },
104 { 5, 1000 },
105 { 10, 1000 },
106 { 20, 1000 },
107 { 50, 1000 },
108 { 100, 1000 },
109 { 200, 1000 },
110 { 500, 1000 },
111 /* volts */
112 { 1, 1 },
113 { 2, 1 },
114 { 5, 1 },
115 { 10, 1 },
116};
117
118#define NUM_TIMEBASE ARRAY_SIZE(timebases)
119#define NUM_VDIV ARRAY_SIZE(vdivs)
120
121static const char *trigger_sources[] = {
122 "CH1",
123 "CH2",
124 "CH3",
125 "CH4",
126 "EXT",
127 "AC Line",
128 "D0",
129 "D1",
130 "D2",
131 "D3",
132 "D4",
133 "D5",
134 "D6",
135 "D7",
136 "D8",
137 "D9",
138 "D10",
139 "D11",
140 "D12",
141 "D13",
142 "D14",
143 "D15",
144};
145
146static const char *trigger_slopes[] = {
147 "r",
148 "f",
149};
150
151static const char *coupling[] = {
152 "AC",
153 "DC",
154 "GND",
155};
156
157/* Do not change the order of entries */
158static const char *data_sources[] = {
159 "Live",
160 "Memory",
161 "Segmented",
162};
163
164enum vendor {
165 RIGOL,
166 AGILENT,
167};
168
169enum series {
170 VS5000,
171 DS1000,
172 DS2000,
173 DS2000A,
174 DSO1000,
175};
176
177/* short name, full name */
178static const struct rigol_ds_vendor supported_vendors[] = {
179 [RIGOL] = {"Rigol", "Rigol Technologies"},
180 [AGILENT] = {"Agilent", "Rigol Technologies"},
181};
182
183#define VENDOR(x) &supported_vendors[x]
184/* vendor, series, protocol, max timebase, min vdiv, number of horizontal divs,
185 * live waveform samples, memory buffer samples */
186static const struct rigol_ds_series supported_series[] = {
187 [VS5000] = {VENDOR(RIGOL), "VS5000", PROTOCOL_V1, FORMAT_RAW,
188 {50, 1}, {2, 1000}, 14, 2048, 0},
189 [DS1000] = {VENDOR(RIGOL), "DS1000", PROTOCOL_V2, FORMAT_IEEE488_2,
190 {50, 1}, {2, 1000}, 12, 600, 1048576},
191 [DS2000] = {VENDOR(RIGOL), "DS2000", PROTOCOL_V3, FORMAT_IEEE488_2,
192 {500, 1}, {2, 1000}, 14, 1400, 14000},
193 [DS2000A] = {VENDOR(RIGOL), "DS2000A", PROTOCOL_V3, FORMAT_IEEE488_2,
194 {1000, 1}, {500, 1000000}, 14, 1400, 14000},
195 [DSO1000] = {VENDOR(AGILENT), "DSO1000", PROTOCOL_V3, FORMAT_IEEE488_2,
196 {50, 1}, {2, 1000}, 12, 600, 20480},
197};
198
199#define SERIES(x) &supported_series[x]
200/* series, model, min timebase, analog channels, digital */
201static const struct rigol_ds_model supported_models[] = {
202 {SERIES(VS5000), "VS5022", {20, 1000000000}, 2, false},
203 {SERIES(VS5000), "VS5042", {10, 1000000000}, 2, false},
204 {SERIES(VS5000), "VS5062", {5, 1000000000}, 2, false},
205 {SERIES(VS5000), "VS5102", {2, 1000000000}, 2, false},
206 {SERIES(VS5000), "VS5202", {2, 1000000000}, 2, false},
207 {SERIES(VS5000), "VS5022D", {20, 1000000000}, 2, true},
208 {SERIES(VS5000), "VS5042D", {10, 1000000000}, 2, true},
209 {SERIES(VS5000), "VS5062D", {5, 1000000000}, 2, true},
210 {SERIES(VS5000), "VS5102D", {2, 1000000000}, 2, true},
211 {SERIES(VS5000), "VS5202D", {2, 1000000000}, 2, true},
212 {SERIES(DS1000), "DS1052E", {5, 1000000000}, 2, false},
213 {SERIES(DS1000), "DS1102E", {2, 1000000000}, 2, false},
214 {SERIES(DS1000), "DS1152E", {2, 1000000000}, 2, false},
215 {SERIES(DS1000), "DS1052D", {5, 1000000000}, 2, true},
216 {SERIES(DS1000), "DS1102D", {2, 1000000000}, 2, true},
217 {SERIES(DS1000), "DS1152D", {2, 1000000000}, 2, true},
218 {SERIES(DS2000), "DS2072", {5, 1000000000}, 2, false},
219 {SERIES(DS2000), "DS2102", {5, 1000000000}, 2, false},
220 {SERIES(DS2000), "DS2202", {2, 1000000000}, 2, false},
221 {SERIES(DS2000), "DS2302", {1, 1000000000}, 2, false},
222 {SERIES(DS2000A), "DS2072A", {5, 1000000000}, 2, false},
223 {SERIES(DS2000A), "DS2102A", {5, 1000000000}, 2, false},
224 {SERIES(DS2000A), "DS2202A", {2, 1000000000}, 2, false},
225 {SERIES(DS2000A), "DS2302A", {1, 1000000000}, 2, false},
226 {SERIES(DSO1000), "DSO1002A", {5, 1000000000}, 2, false},
227 {SERIES(DSO1000), "DSO1004A", {5, 1000000000}, 4, false},
228 {SERIES(DSO1000), "DSO1012A", {2, 1000000000}, 2, false},
229 {SERIES(DSO1000), "DSO1014A", {2, 1000000000}, 4, false},
230 {SERIES(DSO1000), "DSO1022A", {2, 1000000000}, 2, false},
231 {SERIES(DSO1000), "DSO1024A", {2, 1000000000}, 4, false},
232};
233
234SR_PRIV struct sr_dev_driver rigol_ds_driver_info;
235static struct sr_dev_driver *di = &rigol_ds_driver_info;
236
237static void clear_helper(void *priv)
238{
239 struct dev_context *devc;
240
241 devc = priv;
242 g_free(devc->data);
243 g_free(devc->buffer);
244 g_free(devc->coupling[0]);
245 g_free(devc->coupling[1]);
246 g_free(devc->trigger_source);
247 g_free(devc->trigger_slope);
248 g_slist_free(devc->analog_groups[0].channels);
249 g_slist_free(devc->analog_groups[1].channels);
250 g_slist_free(devc->digital_group.channels);
251}
252
253static int dev_clear(void)
254{
255 return std_dev_clear(di, clear_helper);
256}
257
258static int init(struct sr_context *sr_ctx)
259{
260 return std_init(sr_ctx, di, LOG_PREFIX);
261}
262
263static struct sr_dev_inst *probe_device(struct sr_scpi_dev_inst *scpi)
264{
265 struct dev_context *devc;
266 struct sr_dev_inst *sdi;
267 struct sr_scpi_hw_info *hw_info;
268 struct sr_channel *ch;
269 long n[3];
270 unsigned int i;
271 const struct rigol_ds_model *model = NULL;
272 gchar *channel_name, **version;
273
274 if (sr_scpi_get_hw_id(scpi, &hw_info) != SR_OK) {
275 sr_info("Couldn't get IDN response.");
276 return NULL;
277 }
278
279 for (i = 0; i < ARRAY_SIZE(supported_models); i++) {
280 if (!strcasecmp(hw_info->manufacturer,
281 supported_models[i].series->vendor->full_name) &&
282 !strcmp(hw_info->model, supported_models[i].name)) {
283 model = &supported_models[i];
284 break;
285 }
286 }
287
288 if (!model || !(sdi = sr_dev_inst_new(0, SR_ST_ACTIVE,
289 model->series->vendor->name,
290 model->name,
291 hw_info->firmware_version))) {
292 sr_scpi_hw_info_free(hw_info);
293 return NULL;
294 }
295
296 sdi->conn = scpi;
297
298 sdi->driver = di;
299 sdi->inst_type = SR_INST_SCPI;
300
301 if (!(devc = g_try_malloc0(sizeof(struct dev_context))))
302 return NULL;
303
304 devc->limit_frames = 0;
305 devc->model = model;
306 devc->format = model->series->format;
307
308 /* DS1000 models with firmware before 0.2.4 used the old data format. */
309 if (model->series == SERIES(DS1000)) {
310 version = g_strsplit(hw_info->firmware_version, ".", 0);
311 do {
312 if (!version[0] || !version[1] || !version[2])
313 break;
314 if (version[0][0] == 0 || version[1][0] == 0 || version[2][0] == 0)
315 break;
316 for (i = 0; i < 3; i++) {
317 if (sr_atol(version[i], &n[i]) != SR_OK)
318 break;
319 }
320 if (i != 3)
321 break;
322 if (n[0] != 0 || n[1] > 2)
323 break;
324 if (n[1] == 2 && n[2] > 3)
325 break;
326 sr_dbg("Found DS1000 firmware < 0.2.4, using raw data format.");
327 devc->format = FORMAT_RAW;
328 } while(0);
329 g_strfreev(version);
330 }
331
332 sr_scpi_hw_info_free(hw_info);
333
334 for (i = 0; i < model->analog_channels; i++) {
335 if (!(channel_name = g_strdup_printf("CH%d", i + 1)))
336 return NULL;
337 ch = sr_channel_new(i, SR_CHANNEL_ANALOG, TRUE, channel_name);
338 sdi->channels = g_slist_append(sdi->channels, ch);
339 devc->analog_groups[i].name = channel_name;
340 devc->analog_groups[i].channels = g_slist_append(NULL, ch);
341 sdi->channel_groups = g_slist_append(sdi->channel_groups,
342 &devc->analog_groups[i]);
343 }
344
345 if (devc->model->has_digital) {
346 for (i = 0; i < 16; i++) {
347 if (!(channel_name = g_strdup_printf("D%d", i)))
348 return NULL;
349 ch = sr_channel_new(i, SR_CHANNEL_LOGIC, TRUE, channel_name);
350 g_free(channel_name);
351 if (!ch)
352 return NULL;
353 sdi->channels = g_slist_append(sdi->channels, ch);
354 devc->digital_group.channels = g_slist_append(
355 devc->digital_group.channels, ch);
356 }
357 devc->digital_group.name = "LA";
358 sdi->channel_groups = g_slist_append(sdi->channel_groups,
359 &devc->digital_group);
360 }
361
362 for (i = 0; i < NUM_TIMEBASE; i++) {
363 if (!memcmp(&devc->model->min_timebase, &timebases[i], sizeof(uint64_t[2])))
364 devc->timebases = &timebases[i];
365 if (!memcmp(&devc->model->series->max_timebase, &timebases[i], sizeof(uint64_t[2])))
366 devc->num_timebases = &timebases[i] - devc->timebases + 1;
367 }
368
369 for (i = 0; i < NUM_VDIV; i++)
370 if (!memcmp(&devc->model->series->min_vdiv, &vdivs[i], sizeof(uint64_t[2])))
371 devc->vdivs = &vdivs[i];
372
373 if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE)))
374 return NULL;
375 if (!(devc->data = g_try_malloc(ACQ_BUFFER_SIZE * sizeof(float))))
376 return NULL;
377
378 devc->data_source = DATA_SOURCE_LIVE;
379
380 sdi->priv = devc;
381
382 return sdi;
383}
384
385static GSList *scan(GSList *options)
386{
387 return sr_scpi_scan(di->priv, options, probe_device);
388}
389
390static GSList *dev_list(void)
391{
392 return ((struct drv_context *)(di->priv))->instances;
393}
394
395static int dev_open(struct sr_dev_inst *sdi)
396{
397 struct sr_scpi_dev_inst *scpi = sdi->conn;
398
399 if (sr_scpi_open(scpi) < 0)
400 return SR_ERR;
401
402 if (rigol_ds_get_dev_cfg(sdi) != SR_OK)
403 return SR_ERR;
404
405 sdi->status = SR_ST_ACTIVE;
406
407 return SR_OK;
408}
409
410static int dev_close(struct sr_dev_inst *sdi)
411{
412 struct sr_scpi_dev_inst *scpi;
413 struct dev_context *devc;
414
415 if (sdi->status != SR_ST_ACTIVE)
416 return SR_ERR_DEV_CLOSED;
417
418 scpi = sdi->conn;
419 devc = sdi->priv;
420
421 if (devc->model->series->protocol == PROTOCOL_V2)
422 rigol_ds_config_set(sdi, ":KEY:LOCK DISABLE");
423
424 if (scpi) {
425 if (sr_scpi_close(scpi) < 0)
426 return SR_ERR;
427 sdi->status = SR_ST_INACTIVE;
428 }
429
430 return SR_OK;
431}
432
433static int cleanup(void)
434{
435 return dev_clear();
436}
437
438static int analog_frame_size(const struct sr_dev_inst *sdi)
439{
440 struct dev_context *devc = sdi->priv;
441 struct sr_channel *ch;
442 int analog_channels = 0;
443 GSList *l;
444
445 for (l = sdi->channels; l; l = l->next) {
446 ch = l->data;
447 if (ch->type == SR_CHANNEL_ANALOG && ch->enabled)
448 analog_channels++;
449 }
450
451 if (analog_channels == 0)
452 return 0;
453
454 switch (devc->data_source) {
455 case DATA_SOURCE_LIVE:
456 return devc->model->series->live_samples;
457 case DATA_SOURCE_MEMORY:
458 return devc->model->series->buffer_samples / analog_channels;
459 default:
460 return 0;
461 }
462}
463
464static int digital_frame_size(const struct sr_dev_inst *sdi)
465{
466 struct dev_context *devc = sdi->priv;
467
468 switch (devc->data_source) {
469 case DATA_SOURCE_LIVE:
470 return devc->model->series->live_samples * 2;
471 case DATA_SOURCE_MEMORY:
472 return devc->model->series->buffer_samples * 2;
473 default:
474 return 0;
475 }
476}
477
478static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi,
479 const struct sr_channel_group *cg)
480{
481 struct dev_context *devc;
482 struct sr_channel *ch;
483 const char *tmp_str;
484 uint64_t samplerate;
485 int analog_channel = -1;
486 float smallest_diff = 0.0000000001;
487 int idx = -1;
488 unsigned i;
489
490 if (!sdi || !(devc = sdi->priv))
491 return SR_ERR_ARG;
492
493 /* If a channel group is specified, it must be a valid one. */
494 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
495 sr_err("Invalid channel group specified.");
496 return SR_ERR;
497 }
498
499 if (cg) {
500 ch = g_slist_nth_data(cg->channels, 0);
501 if (!ch)
502 return SR_ERR;
503 if (ch->type == SR_CHANNEL_ANALOG) {
504 if (ch->name[2] < '1' || ch->name[2] > '4')
505 return SR_ERR;
506 analog_channel = ch->name[2] - '1';
507 }
508 }
509
510 switch (id) {
511 case SR_CONF_NUM_TIMEBASE:
512 *data = g_variant_new_int32(devc->model->series->num_horizontal_divs);
513 break;
514 case SR_CONF_NUM_VDIV:
515 *data = g_variant_new_int32(NUM_VDIV);
516 case SR_CONF_DATA_SOURCE:
517 if (devc->data_source == DATA_SOURCE_LIVE)
518 *data = g_variant_new_string("Live");
519 else if (devc->data_source == DATA_SOURCE_MEMORY)
520 *data = g_variant_new_string("Memory");
521 else
522 *data = g_variant_new_string("Segmented");
523 break;
524 case SR_CONF_SAMPLERATE:
525 if (devc->data_source == DATA_SOURCE_LIVE) {
526 samplerate = analog_frame_size(sdi) /
527 (devc->timebase * devc->model->series->num_horizontal_divs);
528 *data = g_variant_new_uint64(samplerate);
529 } else {
530 return SR_ERR_NA;
531 }
532 break;
533 case SR_CONF_TRIGGER_SOURCE:
534 if (!strcmp(devc->trigger_source, "ACL"))
535 tmp_str = "AC Line";
536 else if (!strcmp(devc->trigger_source, "CHAN1"))
537 tmp_str = "CH1";
538 else if (!strcmp(devc->trigger_source, "CHAN2"))
539 tmp_str = "CH2";
540 else if (!strcmp(devc->trigger_source, "CHAN3"))
541 tmp_str = "CH3";
542 else if (!strcmp(devc->trigger_source, "CHAN4"))
543 tmp_str = "CH4";
544 else
545 tmp_str = devc->trigger_source;
546 *data = g_variant_new_string(tmp_str);
547 break;
548 case SR_CONF_TRIGGER_SLOPE:
549 if (!strcmp(devc->trigger_slope, "POS"))
550 tmp_str = "r";
551 else if (!strcmp(devc->trigger_slope, "NEG"))
552 tmp_str = "f";
553 else
554 return SR_ERR_NA;
555 *data = g_variant_new_string(tmp_str);
556 break;
557 case SR_CONF_TIMEBASE:
558 for (i = 0; i < devc->num_timebases; i++) {
559 float tb = (float)devc->timebases[i][0] / devc->timebases[i][1];
560 float diff = fabs(devc->timebase - tb);
561 if (diff < smallest_diff) {
562 smallest_diff = diff;
563 idx = i;
564 }
565 }
566 if (idx < 0)
567 return SR_ERR_NA;
568 *data = g_variant_new("(tt)", devc->timebases[idx][0],
569 devc->timebases[idx][1]);
570 break;
571 case SR_CONF_VDIV:
572 if (analog_channel < 0)
573 return SR_ERR_NA;
574 for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
575 float vdiv = (float)vdivs[i][0] / vdivs[i][1];
576 float diff = fabs(devc->vdiv[analog_channel] - vdiv);
577 if (diff < smallest_diff) {
578 smallest_diff = diff;
579 idx = i;
580 }
581 }
582 if (idx < 0)
583 return SR_ERR_NA;
584 *data = g_variant_new("(tt)", vdivs[idx][0], vdivs[idx][1]);
585 break;
586 case SR_CONF_COUPLING:
587 if (analog_channel < 0)
588 return SR_ERR_NA;
589 *data = g_variant_new_string(devc->coupling[analog_channel]);
590 break;
591 default:
592 return SR_ERR_NA;
593 }
594
595 return SR_OK;
596}
597
598static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
599 const struct sr_channel_group *cg)
600{
601 struct dev_context *devc;
602 uint64_t p, q;
603 double t_dbl;
604 unsigned int i, j;
605 int ret;
606 const char *tmp_str;
607 char buffer[16];
608
609 if (!(devc = sdi->priv))
610 return SR_ERR_ARG;
611
612 if (sdi->status != SR_ST_ACTIVE)
613 return SR_ERR_DEV_CLOSED;
614
615 /* If a channel group is specified, it must be a valid one. */
616 if (cg && !g_slist_find(sdi->channel_groups, cg)) {
617 sr_err("Invalid channel group specified.");
618 return SR_ERR;
619 }
620
621 ret = SR_OK;
622 switch (id) {
623 case SR_CONF_LIMIT_FRAMES:
624 devc->limit_frames = g_variant_get_uint64(data);
625 break;
626 case SR_CONF_TRIGGER_SLOPE:
627 tmp_str = g_variant_get_string(data, NULL);
628
629 if (!tmp_str || !(tmp_str[0] == 'f' || tmp_str[0] == 'r'))
630 return SR_ERR_ARG;
631
632 g_free(devc->trigger_slope);
633 devc->trigger_slope = g_strdup((tmp_str[0] == 'r') ? "POS" : "NEG");
634 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SLOP %s", devc->trigger_slope);
635 break;
636 case SR_CONF_HORIZ_TRIGGERPOS:
637 t_dbl = g_variant_get_double(data);
638 if (t_dbl < 0.0 || t_dbl > 1.0)
639 return SR_ERR;
640 devc->horiz_triggerpos = t_dbl;
641 /* We have the trigger offset as a percentage of the frame, but
642 * need to express this in seconds. */
643 t_dbl = -(devc->horiz_triggerpos - 0.5) * devc->timebase * devc->num_timebases;
644 g_ascii_formatd(buffer, sizeof(buffer), "%.6f", t_dbl);
645 ret = rigol_ds_config_set(sdi, ":TIM:OFFS %s", buffer);
646 break;
647 case SR_CONF_TIMEBASE:
648 g_variant_get(data, "(tt)", &p, &q);
649 for (i = 0; i < devc->num_timebases; i++) {
650 if (devc->timebases[i][0] == p && devc->timebases[i][1] == q) {
651 devc->timebase = (float)p / q;
652 g_ascii_formatd(buffer, sizeof(buffer), "%.9f",
653 devc->timebase);
654 ret = rigol_ds_config_set(sdi, ":TIM:SCAL %s", buffer);
655 break;
656 }
657 }
658 if (i == devc->num_timebases)
659 ret = SR_ERR_ARG;
660 break;
661 case SR_CONF_TRIGGER_SOURCE:
662 tmp_str = g_variant_get_string(data, NULL);
663 for (i = 0; i < ARRAY_SIZE(trigger_sources); i++) {
664 if (!strcmp(trigger_sources[i], tmp_str)) {
665 g_free(devc->trigger_source);
666 devc->trigger_source = g_strdup(trigger_sources[i]);
667 if (!strcmp(devc->trigger_source, "AC Line"))
668 tmp_str = "ACL";
669 else if (!strcmp(devc->trigger_source, "CH1"))
670 tmp_str = "CHAN1";
671 else if (!strcmp(devc->trigger_source, "CH2"))
672 tmp_str = "CHAN2";
673 else if (!strcmp(devc->trigger_source, "CH3"))
674 tmp_str = "CHAN3";
675 else if (!strcmp(devc->trigger_source, "CH4"))
676 tmp_str = "CHAN4";
677 else
678 tmp_str = (char *)devc->trigger_source;
679 ret = rigol_ds_config_set(sdi, ":TRIG:EDGE:SOUR %s", tmp_str);
680 break;
681 }
682 }
683 if (i == ARRAY_SIZE(trigger_sources))
684 ret = SR_ERR_ARG;
685 break;
686 case SR_CONF_VDIV:
687 if (!cg) {
688 sr_err("No channel group specified.");
689 return SR_ERR_CHANNEL_GROUP;
690 }
691 g_variant_get(data, "(tt)", &p, &q);
692 for (i = 0; i < 2; i++) {
693 if (cg == &devc->analog_groups[i]) {
694 for (j = 0; j < ARRAY_SIZE(vdivs); j++) {
695 if (vdivs[j][0] != p || vdivs[j][1] != q)
696 continue;
697 devc->vdiv[i] = (float)p / q;
698 g_ascii_formatd(buffer, sizeof(buffer), "%.3f",
699 devc->vdiv[i]);
700 return rigol_ds_config_set(sdi, ":CHAN%d:SCAL %s", i + 1,
701 buffer);
702 }
703 return SR_ERR_ARG;
704 }
705 }
706 return SR_ERR_NA;
707 case SR_CONF_COUPLING:
708 if (!cg) {
709 sr_err("No channel group specified.");
710 return SR_ERR_CHANNEL_GROUP;
711 }
712 tmp_str = g_variant_get_string(data, NULL);
713 for (i = 0; i < 2; i++) {
714 if (cg == &devc->analog_groups[i]) {
715 for (j = 0; j < ARRAY_SIZE(coupling); j++) {
716 if (!strcmp(tmp_str, coupling[j])) {
717 g_free(devc->coupling[i]);
718 devc->coupling[i] = g_strdup(coupling[j]);
719 return rigol_ds_config_set(sdi, ":CHAN%d:COUP %s", i + 1,
720 devc->coupling[i]);
721 }
722 }
723 return SR_ERR_ARG;
724 }
725 }
726 return SR_ERR_NA;
727 case SR_CONF_DATA_SOURCE:
728 tmp_str = g_variant_get_string(data, NULL);
729 if (!strcmp(tmp_str, "Live"))
730 devc->data_source = DATA_SOURCE_LIVE;
731 else if (devc->model->series->protocol >= PROTOCOL_V2
732 && !strcmp(tmp_str, "Memory"))
733 devc->data_source = DATA_SOURCE_MEMORY;
734 else if (devc->model->series->protocol >= PROTOCOL_V3
735 && !strcmp(tmp_str, "Segmented"))
736 devc->data_source = DATA_SOURCE_SEGMENTED;
737 else
738 return SR_ERR;
739 break;
740 default:
741 ret = SR_ERR_NA;
742 break;
743 }
744
745 return ret;
746}
747
748static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi,
749 const struct sr_channel_group *cg)
750{
751 GVariant *tuple, *rational[2];
752 GVariantBuilder gvb;
753 unsigned int i;
754 struct dev_context *devc = NULL;
755
756 if (sdi)
757 devc = sdi->priv;
758
759 if (key == SR_CONF_SCAN_OPTIONS) {
760 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
761 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
762 return SR_OK;
763 } else if (key == SR_CONF_DEVICE_OPTIONS && cg == NULL) {
764 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
765 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
766 return SR_OK;
767 }
768
769 /* Every other option requires a valid device instance. */
770 if (!sdi || !(devc = sdi->priv))
771 return SR_ERR_ARG;
772
773 /* If a channel group is specified, it must be a valid one. */
774 if (cg) {
775 if (cg != &devc->analog_groups[0]
776 && cg != &devc->analog_groups[1]) {
777 sr_err("Invalid channel group specified.");
778 return SR_ERR;
779 }
780 }
781
782 switch (key) {
783 case SR_CONF_DEVICE_OPTIONS:
784 if (!cg) {
785 sr_err("No channel group specified.");
786 return SR_ERR_CHANNEL_GROUP;
787 }
788 if (cg == &devc->digital_group) {
789 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
790 NULL, 0, sizeof(int32_t));
791 return SR_OK;
792 } else {
793 for (i = 0; i < 2; i++) {
794 if (cg == &devc->analog_groups[i]) {
795 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
796 analog_hwcaps, ARRAY_SIZE(analog_hwcaps), sizeof(int32_t));
797 return SR_OK;
798 }
799 }
800 return SR_ERR_NA;
801 }
802 break;
803 case SR_CONF_COUPLING:
804 if (!cg) {
805 sr_err("No channel group specified.");
806 return SR_ERR_CHANNEL_GROUP;
807 }
808 *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
809 break;
810 case SR_CONF_VDIV:
811 if (!devc)
812 /* Can't know this until we have the exact model. */
813 return SR_ERR_ARG;
814 if (!cg) {
815 sr_err("No channel group specified.");
816 return SR_ERR_CHANNEL_GROUP;
817 }
818 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
819 for (i = 0; i < NUM_VDIV; i++) {
820 rational[0] = g_variant_new_uint64(devc->vdivs[i][0]);
821 rational[1] = g_variant_new_uint64(devc->vdivs[i][1]);
822 tuple = g_variant_new_tuple(rational, 2);
823 g_variant_builder_add_value(&gvb, tuple);
824 }
825 *data = g_variant_builder_end(&gvb);
826 break;
827 case SR_CONF_TIMEBASE:
828 if (!devc)
829 /* Can't know this until we have the exact model. */
830 return SR_ERR_ARG;
831 if (devc->num_timebases <= 0)
832 return SR_ERR_NA;
833 g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
834 for (i = 0; i < devc->num_timebases; i++) {
835 rational[0] = g_variant_new_uint64(devc->timebases[i][0]);
836 rational[1] = g_variant_new_uint64(devc->timebases[i][1]);
837 tuple = g_variant_new_tuple(rational, 2);
838 g_variant_builder_add_value(&gvb, tuple);
839 }
840 *data = g_variant_builder_end(&gvb);
841 break;
842 case SR_CONF_TRIGGER_SOURCE:
843 if (!devc)
844 /* Can't know this until we have the exact model. */
845 return SR_ERR_ARG;
846 *data = g_variant_new_strv(trigger_sources,
847 devc->model->has_digital ? ARRAY_SIZE(trigger_sources) : 4);
848 break;
849 case SR_CONF_TRIGGER_SLOPE:
850 *data = g_variant_new_strv(trigger_slopes, ARRAY_SIZE(trigger_slopes));
851 break;
852 case SR_CONF_DATA_SOURCE:
853 if (!devc)
854 /* Can't know this until we have the exact model. */
855 return SR_ERR_ARG;
856 switch (devc->model->series->protocol) {
857 case PROTOCOL_V1:
858 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 2);
859 break;
860 case PROTOCOL_V2:
861 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources) - 1);
862 break;
863 default:
864 *data = g_variant_new_strv(data_sources, ARRAY_SIZE(data_sources));
865 break;
866 }
867 break;
868 default:
869 return SR_ERR_NA;
870 }
871
872 return SR_OK;
873}
874
875static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
876{
877 struct sr_scpi_dev_inst *scpi;
878 struct dev_context *devc;
879 struct sr_channel *ch;
880 struct sr_datafeed_packet packet;
881 GSList *l;
882
883 if (sdi->status != SR_ST_ACTIVE)
884 return SR_ERR_DEV_CLOSED;
885
886 scpi = sdi->conn;
887 devc = sdi->priv;
888
889 devc->num_frames = 0;
890
891 for (l = sdi->channels; l; l = l->next) {
892 ch = l->data;
893 sr_dbg("handling channel %s", ch->name);
894 if (ch->type == SR_CHANNEL_ANALOG) {
895 if (ch->enabled)
896 devc->enabled_analog_channels = g_slist_append(
897 devc->enabled_analog_channels, ch);
898 if (ch->enabled != devc->analog_channels[ch->index]) {
899 /* Enabled channel is currently disabled, or vice versa. */
900 if (rigol_ds_config_set(sdi, ":CHAN%d:DISP %s", ch->index + 1,
901 ch->enabled ? "ON" : "OFF") != SR_OK)
902 return SR_ERR;
903 devc->analog_channels[ch->index] = ch->enabled;
904 }
905 } else if (ch->type == SR_CHANNEL_LOGIC) {
906 if (ch->enabled) {
907 devc->enabled_digital_channels = g_slist_append(
908 devc->enabled_digital_channels, ch);
909 /* Turn on LA module if currently off. */
910 if (!devc->la_enabled) {
911 if (rigol_ds_config_set(sdi, ":LA:DISP ON") != SR_OK)
912 return SR_ERR;
913 devc->la_enabled = TRUE;
914 }
915 }
916 if (ch->enabled != devc->digital_channels[ch->index]) {
917 /* Enabled channel is currently disabled, or vice versa. */
918 if (rigol_ds_config_set(sdi, ":DIG%d:TURN %s", ch->index,
919 ch->enabled ? "ON" : "OFF") != SR_OK)
920 return SR_ERR;
921 devc->digital_channels[ch->index] = ch->enabled;
922 }
923 }
924 }
925
926 if (!devc->enabled_analog_channels && !devc->enabled_digital_channels)
927 return SR_ERR;
928
929 /* Turn off LA module if on and no digital channels selected. */
930 if (devc->la_enabled && !devc->enabled_digital_channels)
931 if (rigol_ds_config_set(sdi, ":LA:DISP OFF") != SR_OK)
932 return SR_ERR;
933
934 /* Set memory mode. */
935 if (devc->data_source == DATA_SOURCE_SEGMENTED) {
936 sr_err("Data source 'Segmented' not yet supported");
937 return SR_ERR;
938 }
939
940 devc->analog_frame_size = analog_frame_size(sdi);
941 devc->digital_frame_size = digital_frame_size(sdi);
942
943 switch (devc->model->series->protocol) {
944 case PROTOCOL_V2:
945 if (rigol_ds_config_set(sdi, ":ACQ:MDEP LONG") != SR_OK)
946 return SR_ERR;
947 break;
948 case PROTOCOL_V3:
949 /* Apparently for the DS2000 the memory
950 * depth can only be set in Running state -
951 * this matches the behaviour of the UI. */
952 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
953 return SR_ERR;
954 if (rigol_ds_config_set(sdi, ":ACQ:MDEP %d",
955 devc->analog_frame_size) != SR_OK)
956 return SR_ERR;
957 if (rigol_ds_config_set(sdi, ":STOP") != SR_OK)
958 return SR_ERR;
959 break;
960 default:
961 break;
962 }
963
964 if (devc->data_source == DATA_SOURCE_LIVE)
965 if (rigol_ds_config_set(sdi, ":RUN") != SR_OK)
966 return SR_ERR;
967
968 sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi);
969
970 /* Send header packet to the session bus. */
971 std_session_send_df_header(cb_data, LOG_PREFIX);
972
973 if (devc->enabled_analog_channels)
974 devc->channel_entry = devc->enabled_analog_channels;
975 else
976 devc->channel_entry = devc->enabled_digital_channels;
977
978 if (rigol_ds_capture_start(sdi) != SR_OK)
979 return SR_ERR;
980
981 /* Start of first frame. */
982 packet.type = SR_DF_FRAME_BEGIN;
983 sr_session_send(cb_data, &packet);
984
985 return SR_OK;
986}
987
988static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
989{
990 struct dev_context *devc;
991 struct sr_scpi_dev_inst *scpi;
992 struct sr_datafeed_packet packet;
993
994 (void)cb_data;
995
996 devc = sdi->priv;
997
998 if (sdi->status != SR_ST_ACTIVE) {
999 sr_err("Device inactive, can't stop acquisition.");
1000 return SR_ERR;
1001 }
1002
1003 /* End of last frame. */
1004 packet.type = SR_DF_END;
1005 sr_session_send(sdi, &packet);
1006
1007 g_slist_free(devc->enabled_analog_channels);
1008 g_slist_free(devc->enabled_digital_channels);
1009 devc->enabled_analog_channels = NULL;
1010 devc->enabled_digital_channels = NULL;
1011 scpi = sdi->conn;
1012 sr_scpi_source_remove(scpi);
1013
1014 return SR_OK;
1015}
1016
1017SR_PRIV struct sr_dev_driver rigol_ds_driver_info = {
1018 .name = "rigol-ds",
1019 .longname = "Rigol DS",
1020 .api_version = 1,
1021 .init = init,
1022 .cleanup = cleanup,
1023 .scan = scan,
1024 .dev_list = dev_list,
1025 .dev_clear = dev_clear,
1026 .config_get = config_get,
1027 .config_set = config_set,
1028 .config_list = config_list,
1029 .dev_open = dev_open,
1030 .dev_close = dev_close,
1031 .dev_acquisition_start = dev_acquisition_start,
1032 .dev_acquisition_stop = dev_acquisition_stop,
1033 .priv = NULL,
1034};
Hardware access and backend lib