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ols: add swap channels feature
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "protocol.h"
21
22#define SERIALCOMM "115200/8n1"
23
24static const int32_t hwopts[] = {
25 SR_CONF_CONN,
26 SR_CONF_SERIALCOMM,
27};
28
29static const int32_t hwcaps[] = {
30 SR_CONF_LOGIC_ANALYZER,
31 SR_CONF_SAMPLERATE,
32 SR_CONF_TRIGGER_TYPE,
33 SR_CONF_CAPTURE_RATIO,
34 SR_CONF_LIMIT_SAMPLES,
35 SR_CONF_EXTERNAL_CLOCK,
36 SR_CONF_PATTERN_MODE,
37 SR_CONF_SWAP,
38 SR_CONF_RLE,
39};
40
41#define STR_PATTERN_EXTERNAL "external"
42#define STR_PATTERN_INTERNAL "internal"
43
44/* Supported methods of test pattern outputs */
45enum {
46 /**
47 * Capture pins 31:16 (unbuffered wing) output a test pattern
48 * that can captured on pins 0:15.
49 */
50 PATTERN_EXTERNAL,
51
52 /** Route test pattern internally to capture buffer. */
53 PATTERN_INTERNAL,
54};
55
56/* Probes are numbered 0-31 (on the PCB silkscreen). */
57SR_PRIV const char *ols_probe_names[NUM_PROBES + 1] = {
58 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
59 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
60 "24", "25", "26", "27", "28", "29", "30", "31",
61 NULL,
62};
63
64/* Default supported samplerates, can be overridden by device metadata. */
65static const uint64_t samplerates[] = {
66 SR_HZ(10),
67 SR_MHZ(200),
68 SR_HZ(1),
69};
70
71SR_PRIV struct sr_dev_driver ols_driver_info;
72static struct sr_dev_driver *di = &ols_driver_info;
73
74static int dev_clear(void)
75{
76 return std_dev_clear(di, NULL);
77}
78
79static int init(struct sr_context *sr_ctx)
80{
81 return std_init(sr_ctx, di, LOG_PREFIX);
82}
83
84static GSList *scan(GSList *options)
85{
86 struct sr_config *src;
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
90 struct sr_probe *probe;
91 struct sr_serial_dev_inst *serial;
92 GPollFD probefd;
93 GSList *l, *devices;
94 int ret, i;
95 const char *conn, *serialcomm;
96 char buf[8];
97
98 drvc = di->priv;
99
100 devices = NULL;
101
102 conn = serialcomm = NULL;
103 for (l = options; l; l = l->next) {
104 src = l->data;
105 switch (src->key) {
106 case SR_CONF_CONN:
107 conn = g_variant_get_string(src->data, NULL);
108 break;
109 case SR_CONF_SERIALCOMM:
110 serialcomm = g_variant_get_string(src->data, NULL);
111 break;
112 }
113 }
114 if (!conn)
115 return NULL;
116
117 if (serialcomm == NULL)
118 serialcomm = SERIALCOMM;
119
120 if (!(serial = sr_serial_dev_inst_new(conn, serialcomm)))
121 return NULL;
122
123 /* The discovery procedure is like this: first send the Reset
124 * command (0x00) 5 times, since the device could be anywhere
125 * in a 5-byte command. Then send the ID command (0x02).
126 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
127 * have a match.
128 */
129 sr_info("Probing %s.", conn);
130 if (serial_open(serial, SERIAL_RDWR | SERIAL_NONBLOCK) != SR_OK)
131 return NULL;
132
133 ret = SR_OK;
134 for (i = 0; i < 5; i++) {
135 if ((ret = send_shortcommand(serial, CMD_RESET)) != SR_OK) {
136 sr_err("Port %s is not writable.", conn);
137 break;
138 }
139 }
140 if (ret != SR_OK) {
141 serial_close(serial);
142 sr_err("Could not use port %s. Quitting.", conn);
143 return NULL;
144 }
145 send_shortcommand(serial, CMD_ID);
146
147 /* Wait 10ms for a response. */
148 g_usleep(10000);
149
150 probefd.fd = serial->fd;
151 probefd.events = G_IO_IN;
152 g_poll(&probefd, 1, 1);
153
154 if (probefd.revents != G_IO_IN)
155 return NULL;
156 if (serial_read(serial, buf, 4) != 4)
157 return NULL;
158 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
159 return NULL;
160
161 /* Definitely using the OLS protocol, check if it supports
162 * the metadata command.
163 */
164 send_shortcommand(serial, CMD_METADATA);
165 if (g_poll(&probefd, 1, 10) > 0) {
166 /* Got metadata. */
167 sdi = get_metadata(serial);
168 sdi->index = 0;
169 devc = sdi->priv;
170 } else {
171 /* Not an OLS -- some other board that uses the sump protocol. */
172 sr_info("Device does not support metadata.");
173 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE,
174 "Sump", "Logic Analyzer", "v1.0");
175 sdi->driver = di;
176 for (i = 0; i < 32; i++) {
177 if (!(probe = sr_probe_new(i, SR_PROBE_LOGIC, TRUE,
178 ols_probe_names[i])))
179 return 0;
180 sdi->probes = g_slist_append(sdi->probes, probe);
181 }
182 devc = ols_dev_new();
183 sdi->priv = devc;
184 }
185 /* Configure samplerate and divider. */
186 if (ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
187 sr_dbg("Failed to set default samplerate (%"PRIu64").",
188 DEFAULT_SAMPLERATE);
189 /* Clear trigger masks, values and stages. */
190 ols_configure_probes(sdi);
191 sdi->inst_type = SR_INST_SERIAL;
192 sdi->conn = serial;
193
194 drvc->instances = g_slist_append(drvc->instances, sdi);
195 devices = g_slist_append(devices, sdi);
196
197 serial_close(serial);
198
199 return devices;
200}
201
202static GSList *dev_list(void)
203{
204 return ((struct drv_context *)(di->priv))->instances;
205}
206
207static int dev_open(struct sr_dev_inst *sdi)
208{
209 struct sr_serial_dev_inst *serial;
210
211 serial = sdi->conn;
212 if (serial_open(serial, SERIAL_RDWR) != SR_OK)
213 return SR_ERR;
214
215 sdi->status = SR_ST_ACTIVE;
216
217 return SR_OK;
218}
219
220static int dev_close(struct sr_dev_inst *sdi)
221{
222 struct sr_serial_dev_inst *serial;
223
224 serial = sdi->conn;
225 if (serial && serial->fd != -1) {
226 serial_close(serial);
227 sdi->status = SR_ST_INACTIVE;
228 }
229
230 return SR_OK;
231}
232
233static int cleanup(void)
234{
235 return dev_clear();
236}
237
238static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi)
239{
240 struct dev_context *devc;
241
242 if (!sdi)
243 return SR_ERR_ARG;
244
245 devc = sdi->priv;
246 switch (id) {
247 case SR_CONF_SAMPLERATE:
248 *data = g_variant_new_uint64(devc->cur_samplerate);
249 break;
250 case SR_CONF_CAPTURE_RATIO:
251 *data = g_variant_new_uint64(devc->capture_ratio);
252 break;
253 case SR_CONF_LIMIT_SAMPLES:
254 *data = g_variant_new_uint64(devc->limit_samples);
255 break;
256 case SR_CONF_PATTERN_MODE:
257 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
258 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
259 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
260 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
261 break;
262 case SR_CONF_RLE:
263 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
264 break;
265 default:
266 return SR_ERR_NA;
267 }
268
269 return SR_OK;
270}
271
272static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi)
273{
274 struct dev_context *devc;
275 int ret;
276 uint64_t tmp_u64;
277 const char *stropt;
278
279 if (sdi->status != SR_ST_ACTIVE)
280 return SR_ERR_DEV_CLOSED;
281
282 devc = sdi->priv;
283
284 switch (id) {
285 case SR_CONF_SAMPLERATE:
286 tmp_u64 = g_variant_get_uint64(data);
287 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
288 return SR_ERR_SAMPLERATE;
289 ret = ols_set_samplerate(sdi, g_variant_get_uint64(data));
290 break;
291 case SR_CONF_LIMIT_SAMPLES:
292 tmp_u64 = g_variant_get_uint64(data);
293 if (tmp_u64 < MIN_NUM_SAMPLES)
294 return SR_ERR;
295 devc->limit_samples = tmp_u64;
296 ret = SR_OK;
297 break;
298 case SR_CONF_CAPTURE_RATIO:
299 devc->capture_ratio = g_variant_get_uint64(data);
300 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
301 devc->capture_ratio = 0;
302 ret = SR_ERR;
303 } else
304 ret = SR_OK;
305 break;
306 case SR_CONF_EXTERNAL_CLOCK:
307 if (g_variant_get_boolean(data)) {
308 sr_info("Enabling external clock.");
309 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
310 } else {
311 sr_info("Disabled external clock.");
312 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
313 }
314 ret = SR_OK;
315 break;
316 case SR_CONF_PATTERN_MODE:
317 stropt = g_variant_get_string(data, NULL);
318 ret = SR_OK;
319 if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
320 sr_info("Enabling internal test mode.");
321 devc->flag_reg |= FLAG_INTERNAL_TEST_MODE;
322 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
323 sr_info("Enabling external test mode.");
324 devc->flag_reg |= FLAG_EXTERNAL_TEST_MODE;
325 } else {
326 ret = SR_ERR;
327 }
328 break;
329 case SR_CONF_SWAP:
330 if (g_variant_get_boolean(data)) {
331 sr_info("Enabling channel swapping.");
332 devc->flag_reg |= FLAG_SWAP_PROBES;
333 } else {
334 sr_info("Disabling channel swapping.");
335 devc->flag_reg &= ~FLAG_SWAP_PROBES;
336 }
337 ret = SR_OK;
338 break;
339
340 case SR_CONF_RLE:
341 if (g_variant_get_boolean(data)) {
342 sr_info("Enabling RLE.");
343 devc->flag_reg |= FLAG_RLE;
344 } else {
345 sr_info("Disabling RLE.");
346 devc->flag_reg &= ~FLAG_RLE;
347 }
348 ret = SR_OK;
349 break;
350 default:
351 ret = SR_ERR_NA;
352 }
353
354 return ret;
355}
356
357static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi)
358{
359 GVariant *gvar;
360 GVariantBuilder gvb;
361
362 (void)sdi;
363
364 switch (key) {
365 case SR_CONF_SCAN_OPTIONS:
366 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
367 hwopts, ARRAY_SIZE(hwopts), sizeof(int32_t));
368 break;
369 case SR_CONF_DEVICE_OPTIONS:
370 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
371 hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t));
372 break;
373 case SR_CONF_SAMPLERATE:
374 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
375 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
376 ARRAY_SIZE(samplerates), sizeof(uint64_t));
377 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
378 *data = g_variant_builder_end(&gvb);
379 break;
380 case SR_CONF_TRIGGER_TYPE:
381 *data = g_variant_new_string(TRIGGER_TYPE);
382 break;
383 default:
384 return SR_ERR_NA;
385 }
386
387 return SR_OK;
388}
389
390static int dev_acquisition_start(const struct sr_dev_inst *sdi,
391 void *cb_data)
392{
393 struct dev_context *devc;
394 struct sr_serial_dev_inst *serial;
395 uint32_t trigger_config[4];
396 uint32_t data;
397 uint16_t readcount, delaycount;
398 uint8_t changrp_mask;
399 int num_channels;
400 int i;
401
402 if (sdi->status != SR_ST_ACTIVE)
403 return SR_ERR_DEV_CLOSED;
404
405 devc = sdi->priv;
406 serial = sdi->conn;
407
408 if (ols_configure_probes(sdi) != SR_OK) {
409 sr_err("Failed to configure probes.");
410 return SR_ERR;
411 }
412
413 /*
414 * Enable/disable channel groups in the flag register according to the
415 * probe mask. Calculate this here, because num_channels is needed
416 * to limit readcount.
417 */
418 changrp_mask = 0;
419 num_channels = 0;
420 for (i = 0; i < 4; i++) {
421 if (devc->probe_mask & (0xff << (i * 8))) {
422 changrp_mask |= (1 << i);
423 num_channels++;
424 }
425 }
426
427 /*
428 * Limit readcount to prevent reading past the end of the hardware
429 * buffer.
430 */
431 readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
432
433 memset(trigger_config, 0, 16);
434 trigger_config[devc->num_stages] |= 0x08;
435 if (devc->trigger_mask[0]) {
436 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
437 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
438
439 if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
440 reverse32(devc->trigger_mask[0])) != SR_OK)
441 return SR_ERR;
442 if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
443 reverse32(devc->trigger_value[0])) != SR_OK)
444 return SR_ERR;
445 if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
446 trigger_config[0]) != SR_OK)
447 return SR_ERR;
448
449 if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_1,
450 reverse32(devc->trigger_mask[1])) != SR_OK)
451 return SR_ERR;
452 if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_1,
453 reverse32(devc->trigger_value[1])) != SR_OK)
454 return SR_ERR;
455 if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_1,
456 trigger_config[1]) != SR_OK)
457 return SR_ERR;
458
459 if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_2,
460 reverse32(devc->trigger_mask[2])) != SR_OK)
461 return SR_ERR;
462 if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_2,
463 reverse32(devc->trigger_value[2])) != SR_OK)
464 return SR_ERR;
465 if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_2,
466 trigger_config[2]) != SR_OK)
467 return SR_ERR;
468
469 if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_3,
470 reverse32(devc->trigger_mask[3])) != SR_OK)
471 return SR_ERR;
472 if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_3,
473 reverse32(devc->trigger_value[3])) != SR_OK)
474 return SR_ERR;
475 if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_3,
476 trigger_config[3]) != SR_OK)
477 return SR_ERR;
478 } else {
479 if (send_longcommand(serial, CMD_SET_TRIGGER_MASK_0,
480 devc->trigger_mask[0]) != SR_OK)
481 return SR_ERR;
482 if (send_longcommand(serial, CMD_SET_TRIGGER_VALUE_0,
483 devc->trigger_value[0]) != SR_OK)
484 return SR_ERR;
485 if (send_longcommand(serial, CMD_SET_TRIGGER_CONFIG_0,
486 0x00000008) != SR_OK)
487 return SR_ERR;
488 delaycount = readcount;
489 }
490
491 sr_info("Setting samplerate to %" PRIu64 "Hz (divider %u, "
492 "demux %s, noise_filter %s)", devc->cur_samplerate,
493 devc->cur_samplerate_divider,
494 devc->flag_reg & FLAG_DEMUX ? "on" : "off",
495 devc->flag_reg & FLAG_FILTER ? "on": "off");
496 if (send_longcommand(serial, CMD_SET_DIVIDER,
497 reverse32(devc->cur_samplerate_divider)) != SR_OK)
498 return SR_ERR;
499
500 /* Send sample limit and pre/post-trigger capture ratio. */
501 data = ((readcount - 1) & 0xffff) << 16;
502 data |= (delaycount - 1) & 0xffff;
503 if (send_longcommand(serial, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
504 return SR_ERR;
505
506 /* The flag register wants them here, and 1 means "disable channel". */
507 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
508 devc->flag_reg |= FLAG_FILTER;
509 devc->rle_count = 0;
510 data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
511 if (send_longcommand(serial, CMD_SET_FLAGS, data) != SR_OK)
512 return SR_ERR;
513
514 /* Start acquisition on the device. */
515 if (send_shortcommand(serial, CMD_RUN) != SR_OK)
516 return SR_ERR;
517
518 /* Reset all operational states. */
519 devc->num_transfers = devc->num_samples = devc->num_bytes = 0;
520 memset(devc->sample, 0, 4);
521
522 /* Send header packet to the session bus. */
523 std_session_send_df_header(cb_data, LOG_PREFIX);
524
525 sr_source_add(serial->fd, G_IO_IN, -1, ols_receive_data, cb_data);
526
527 return SR_OK;
528}
529
530static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
531{
532 (void)cb_data;
533
534 abort_acquisition(sdi);
535
536 return SR_OK;
537}
538
539SR_PRIV struct sr_dev_driver ols_driver_info = {
540 .name = "ols",
541 .longname = "Openbench Logic Sniffer",
542 .api_version = 1,
543 .init = init,
544 .cleanup = cleanup,
545 .scan = scan,
546 .dev_list = dev_list,
547 .dev_clear = dev_clear,
548 .config_get = config_get,
549 .config_set = config_set,
550 .config_list = config_list,
551 .dev_open = dev_open,
552 .dev_close = dev_close,
553 .dev_acquisition_start = dev_acquisition_start,
554 .dev_acquisition_stop = dev_acquisition_stop,
555 .priv = NULL,
556};