]>
Commit | Line | Data |
---|---|---|
1 | /* | |
2 | * This file is part of the sigrok project. | |
3 | * | |
4 | * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>, | |
5 | * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no> | |
6 | * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no> | |
7 | * | |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22 | /* | |
23 | * ASIX Sigma Logic Analyzer Driver | |
24 | */ | |
25 | ||
26 | #include <ftdi.h> | |
27 | #include <string.h> | |
28 | #include <zlib.h> | |
29 | #include <sigrok.h> | |
30 | #include "asix-sigma.h" | |
31 | ||
32 | #define USB_VENDOR 0xa600 | |
33 | #define USB_PRODUCT 0xa000 | |
34 | #define USB_DESCRIPTION "ASIX SIGMA" | |
35 | #define USB_VENDOR_NAME "ASIX" | |
36 | #define USB_MODEL_NAME "SIGMA" | |
37 | #define USB_MODEL_VERSION "" | |
38 | #define TRIGGER_TYPES "rf10" | |
39 | ||
40 | static GSList *device_instances = NULL; | |
41 | ||
42 | static uint64_t supported_samplerates[] = { | |
43 | KHZ(200), | |
44 | KHZ(250), | |
45 | KHZ(500), | |
46 | MHZ(1), | |
47 | MHZ(5), | |
48 | MHZ(10), | |
49 | MHZ(25), | |
50 | MHZ(50), | |
51 | MHZ(100), | |
52 | MHZ(200), | |
53 | 0, | |
54 | }; | |
55 | ||
56 | static struct samplerates samplerates = { | |
57 | KHZ(200), | |
58 | MHZ(200), | |
59 | 0, | |
60 | supported_samplerates, | |
61 | }; | |
62 | ||
63 | static int capabilities[] = { | |
64 | HWCAP_LOGIC_ANALYZER, | |
65 | HWCAP_SAMPLERATE, | |
66 | HWCAP_CAPTURE_RATIO, | |
67 | HWCAP_PROBECONFIG, | |
68 | ||
69 | HWCAP_LIMIT_MSEC, | |
70 | 0, | |
71 | }; | |
72 | ||
73 | /* Force the FPGA to reboot. */ | |
74 | static uint8_t suicide[] = { | |
75 | 0x84, 0x84, 0x88, 0x84, 0x88, 0x84, 0x88, 0x84, | |
76 | }; | |
77 | ||
78 | /* Prepare to upload firmware (FPGA specific). */ | |
79 | static uint8_t init[] = { | |
80 | 0x03, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, | |
81 | }; | |
82 | ||
83 | /* Initialize the logic analyzer mode. */ | |
84 | static uint8_t logic_mode_start[] = { | |
85 | 0x00, 0x40, 0x0f, 0x25, 0x35, 0x40, | |
86 | 0x2a, 0x3a, 0x40, 0x03, 0x20, 0x38, | |
87 | }; | |
88 | ||
89 | static const char *firmware_files[] = { | |
90 | "asix-sigma-50.fw", /* 50 MHz, supports 8 bit fractions */ | |
91 | "asix-sigma-100.fw", /* 100 MHz */ | |
92 | "asix-sigma-200.fw", /* 200 MHz */ | |
93 | "asix-sigma-50sync.fw", /* Synchronous clock from pin */ | |
94 | "asix-sigma-phasor.fw", /* Frequency counter */ | |
95 | }; | |
96 | ||
97 | static void hw_stop_acquisition(int device_index, gpointer session_device_id); | |
98 | ||
99 | static int sigma_read(void *buf, size_t size, struct sigma *sigma) | |
100 | { | |
101 | int ret; | |
102 | ||
103 | ret = ftdi_read_data(&sigma->ftdic, (unsigned char *)buf, size); | |
104 | if (ret < 0) { | |
105 | g_warning("ftdi_read_data failed: %s", | |
106 | ftdi_get_error_string(&sigma->ftdic)); | |
107 | } | |
108 | ||
109 | return ret; | |
110 | } | |
111 | ||
112 | static int sigma_write(void *buf, size_t size, struct sigma *sigma) | |
113 | { | |
114 | int ret; | |
115 | ||
116 | ret = ftdi_write_data(&sigma->ftdic, (unsigned char *)buf, size); | |
117 | if (ret < 0) { | |
118 | g_warning("ftdi_write_data failed: %s", | |
119 | ftdi_get_error_string(&sigma->ftdic)); | |
120 | } else if ((size_t) ret != size) { | |
121 | g_warning("ftdi_write_data did not complete write\n"); | |
122 | } | |
123 | ||
124 | return ret; | |
125 | } | |
126 | ||
127 | static int sigma_write_register(uint8_t reg, uint8_t *data, size_t len, | |
128 | struct sigma *sigma) | |
129 | { | |
130 | size_t i; | |
131 | uint8_t buf[len + 2]; | |
132 | int idx = 0; | |
133 | ||
134 | buf[idx++] = REG_ADDR_LOW | (reg & 0xf); | |
135 | buf[idx++] = REG_ADDR_HIGH | (reg >> 4); | |
136 | ||
137 | for (i = 0; i < len; ++i) { | |
138 | buf[idx++] = REG_DATA_LOW | (data[i] & 0xf); | |
139 | buf[idx++] = REG_DATA_HIGH_WRITE | (data[i] >> 4); | |
140 | } | |
141 | ||
142 | return sigma_write(buf, idx, sigma); | |
143 | } | |
144 | ||
145 | static int sigma_set_register(uint8_t reg, uint8_t value, struct sigma *sigma) | |
146 | { | |
147 | return sigma_write_register(reg, &value, 1, sigma); | |
148 | } | |
149 | ||
150 | static int sigma_read_register(uint8_t reg, uint8_t *data, size_t len, | |
151 | struct sigma *sigma) | |
152 | { | |
153 | uint8_t buf[3]; | |
154 | ||
155 | buf[0] = REG_ADDR_LOW | (reg & 0xf); | |
156 | buf[1] = REG_ADDR_HIGH | (reg >> 4); | |
157 | buf[2] = REG_READ_ADDR; | |
158 | ||
159 | sigma_write(buf, sizeof(buf), sigma); | |
160 | ||
161 | return sigma_read(data, len, sigma); | |
162 | } | |
163 | ||
164 | static uint8_t sigma_get_register(uint8_t reg, struct sigma *sigma) | |
165 | { | |
166 | uint8_t value; | |
167 | ||
168 | if (1 != sigma_read_register(reg, &value, 1, sigma)) { | |
169 | g_warning("Sigma_get_register: 1 byte expected"); | |
170 | return 0; | |
171 | } | |
172 | ||
173 | return value; | |
174 | } | |
175 | ||
176 | static int sigma_read_pos(uint32_t *stoppos, uint32_t *triggerpos, | |
177 | struct sigma *sigma) | |
178 | { | |
179 | uint8_t buf[] = { | |
180 | REG_ADDR_LOW | READ_TRIGGER_POS_LOW, | |
181 | ||
182 | REG_READ_ADDR | NEXT_REG, | |
183 | REG_READ_ADDR | NEXT_REG, | |
184 | REG_READ_ADDR | NEXT_REG, | |
185 | REG_READ_ADDR | NEXT_REG, | |
186 | REG_READ_ADDR | NEXT_REG, | |
187 | REG_READ_ADDR | NEXT_REG, | |
188 | }; | |
189 | uint8_t result[6]; | |
190 | ||
191 | sigma_write(buf, sizeof(buf), sigma); | |
192 | ||
193 | sigma_read(result, sizeof(result), sigma); | |
194 | ||
195 | *triggerpos = result[0] | (result[1] << 8) | (result[2] << 16); | |
196 | *stoppos = result[3] | (result[4] << 8) | (result[5] << 16); | |
197 | ||
198 | /* Not really sure why this must be done, but according to spec. */ | |
199 | if ((--*stoppos & 0x1ff) == 0x1ff) | |
200 | stoppos -= 64; | |
201 | ||
202 | if ((*--triggerpos & 0x1ff) == 0x1ff) | |
203 | triggerpos -= 64; | |
204 | ||
205 | return 1; | |
206 | } | |
207 | ||
208 | static int sigma_read_dram(uint16_t startchunk, size_t numchunks, | |
209 | uint8_t *data, struct sigma *sigma) | |
210 | { | |
211 | size_t i; | |
212 | uint8_t buf[4096]; | |
213 | int idx = 0; | |
214 | ||
215 | /* Send the startchunk. Index start with 1. */ | |
216 | buf[0] = startchunk >> 8; | |
217 | buf[1] = startchunk & 0xff; | |
218 | sigma_write_register(WRITE_MEMROW, buf, 2, sigma); | |
219 | ||
220 | /* Read the DRAM. */ | |
221 | buf[idx++] = REG_DRAM_BLOCK; | |
222 | buf[idx++] = REG_DRAM_WAIT_ACK; | |
223 | ||
224 | for (i = 0; i < numchunks; ++i) { | |
225 | /* Alternate bit to copy from DRAM to cache. */ | |
226 | if (i != (numchunks - 1)) | |
227 | buf[idx++] = REG_DRAM_BLOCK | (((i + 1) % 2) << 4); | |
228 | ||
229 | buf[idx++] = REG_DRAM_BLOCK_DATA | ((i % 2) << 4); | |
230 | ||
231 | if (i != (numchunks - 1)) | |
232 | buf[idx++] = REG_DRAM_WAIT_ACK; | |
233 | } | |
234 | ||
235 | sigma_write(buf, idx, sigma); | |
236 | ||
237 | return sigma_read(data, numchunks * CHUNK_SIZE, sigma); | |
238 | } | |
239 | ||
240 | /* Upload trigger look-up tables to Sigma. */ | |
241 | static int sigma_write_trigger_lut(struct triggerlut *lut, struct sigma *sigma) | |
242 | { | |
243 | int i; | |
244 | uint8_t tmp[2]; | |
245 | uint16_t bit; | |
246 | ||
247 | /* Transpose the table and send to Sigma. */ | |
248 | for (i = 0; i < 16; ++i) { | |
249 | bit = 1 << i; | |
250 | ||
251 | tmp[0] = tmp[1] = 0; | |
252 | ||
253 | if (lut->m2d[0] & bit) | |
254 | tmp[0] |= 0x01; | |
255 | if (lut->m2d[1] & bit) | |
256 | tmp[0] |= 0x02; | |
257 | if (lut->m2d[2] & bit) | |
258 | tmp[0] |= 0x04; | |
259 | if (lut->m2d[3] & bit) | |
260 | tmp[0] |= 0x08; | |
261 | ||
262 | if (lut->m3 & bit) | |
263 | tmp[0] |= 0x10; | |
264 | if (lut->m3s & bit) | |
265 | tmp[0] |= 0x20; | |
266 | if (lut->m4 & bit) | |
267 | tmp[0] |= 0x40; | |
268 | ||
269 | if (lut->m0d[0] & bit) | |
270 | tmp[1] |= 0x01; | |
271 | if (lut->m0d[1] & bit) | |
272 | tmp[1] |= 0x02; | |
273 | if (lut->m0d[2] & bit) | |
274 | tmp[1] |= 0x04; | |
275 | if (lut->m0d[3] & bit) | |
276 | tmp[1] |= 0x08; | |
277 | ||
278 | if (lut->m1d[0] & bit) | |
279 | tmp[1] |= 0x10; | |
280 | if (lut->m1d[1] & bit) | |
281 | tmp[1] |= 0x20; | |
282 | if (lut->m1d[2] & bit) | |
283 | tmp[1] |= 0x40; | |
284 | if (lut->m1d[3] & bit) | |
285 | tmp[1] |= 0x80; | |
286 | ||
287 | sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp), | |
288 | sigma); | |
289 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, sigma); | |
290 | } | |
291 | ||
292 | /* Send the parameters */ | |
293 | sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params, | |
294 | sizeof(lut->params), sigma); | |
295 | ||
296 | return SIGROK_OK; | |
297 | } | |
298 | ||
299 | /* Generate the bitbang stream for programming the FPGA. */ | |
300 | static int bin2bitbang(const char *filename, | |
301 | unsigned char **buf, size_t *buf_size) | |
302 | { | |
303 | FILE *f; | |
304 | long file_size; | |
305 | unsigned long offset = 0; | |
306 | unsigned char *p; | |
307 | uint8_t *compressed_buf, *firmware; | |
308 | uLongf csize, fwsize; | |
309 | const int buffer_size = 65536; | |
310 | size_t i; | |
311 | int c, ret, bit, v; | |
312 | uint32_t imm = 0x3f6df2ab; | |
313 | ||
314 | f = fopen(filename, "r"); | |
315 | if (!f) { | |
316 | g_warning("fopen(\"%s\", \"r\")", filename); | |
317 | return -1; | |
318 | } | |
319 | ||
320 | if (-1 == fseek(f, 0, SEEK_END)) { | |
321 | g_warning("fseek on %s failed", filename); | |
322 | fclose(f); | |
323 | return -1; | |
324 | } | |
325 | ||
326 | file_size = ftell(f); | |
327 | ||
328 | fseek(f, 0, SEEK_SET); | |
329 | ||
330 | compressed_buf = g_malloc(file_size); | |
331 | firmware = g_malloc(buffer_size); | |
332 | ||
333 | if (!compressed_buf || !firmware) { | |
334 | g_warning("Error allocating buffers"); | |
335 | return -1; | |
336 | } | |
337 | ||
338 | csize = 0; | |
339 | while ((c = getc(f)) != EOF) { | |
340 | imm = (imm + 0xa853753) % 177 + (imm * 0x8034052); | |
341 | compressed_buf[csize++] = c ^ imm; | |
342 | } | |
343 | fclose(f); | |
344 | ||
345 | fwsize = buffer_size; | |
346 | ret = uncompress(firmware, &fwsize, compressed_buf, csize); | |
347 | if (ret < 0) { | |
348 | g_free(compressed_buf); | |
349 | g_free(firmware); | |
350 | g_warning("Could not unpack Sigma firmware. (Error %d)\n", ret); | |
351 | return -1; | |
352 | } | |
353 | ||
354 | g_free(compressed_buf); | |
355 | ||
356 | *buf_size = fwsize * 2 * 8; | |
357 | ||
358 | *buf = p = (unsigned char *)g_malloc(*buf_size); | |
359 | ||
360 | if (!p) { | |
361 | g_warning("Error allocating buffers"); | |
362 | return -1; | |
363 | } | |
364 | ||
365 | for (i = 0; i < fwsize; ++i) { | |
366 | for (bit = 7; bit >= 0; --bit) { | |
367 | v = firmware[i] & 1 << bit ? 0x40 : 0x00; | |
368 | p[offset++] = v | 0x01; | |
369 | p[offset++] = v; | |
370 | } | |
371 | } | |
372 | ||
373 | g_free(firmware); | |
374 | ||
375 | if (offset != *buf_size) { | |
376 | g_free(*buf); | |
377 | g_warning("Error reading firmware %s " | |
378 | "offset=%ld, file_size=%ld, buf_size=%zd\n", | |
379 | filename, offset, file_size, *buf_size); | |
380 | ||
381 | return -1; | |
382 | } | |
383 | ||
384 | return 0; | |
385 | } | |
386 | ||
387 | static int hw_init(char *deviceinfo) | |
388 | { | |
389 | struct sigrok_device_instance *sdi; | |
390 | struct sigma *sigma = g_malloc(sizeof(struct sigma)); | |
391 | ||
392 | deviceinfo = deviceinfo; | |
393 | ||
394 | if (!sigma) | |
395 | return 0; | |
396 | ||
397 | ftdi_init(&sigma->ftdic); | |
398 | ||
399 | /* Look for SIGMAs. */ | |
400 | if (ftdi_usb_open_desc(&sigma->ftdic, USB_VENDOR, USB_PRODUCT, | |
401 | USB_DESCRIPTION, NULL) < 0) | |
402 | goto free; | |
403 | ||
404 | sigma->cur_samplerate = 0; | |
405 | sigma->limit_msec = 0; | |
406 | sigma->cur_firmware = -1; | |
407 | sigma->num_probes = 0; | |
408 | sigma->samples_per_event = 0; | |
409 | sigma->capture_ratio = 50; | |
410 | ||
411 | /* Register SIGMA device. */ | |
412 | sdi = sigrok_device_instance_new(0, ST_INITIALIZING, | |
413 | USB_VENDOR_NAME, USB_MODEL_NAME, USB_MODEL_VERSION); | |
414 | if (!sdi) | |
415 | goto free; | |
416 | ||
417 | sdi->priv = sigma; | |
418 | ||
419 | device_instances = g_slist_append(device_instances, sdi); | |
420 | ||
421 | /* We will open the device again when we need it. */ | |
422 | ftdi_usb_close(&sigma->ftdic); | |
423 | ||
424 | return 1; | |
425 | free: | |
426 | free(sigma); | |
427 | return 0; | |
428 | } | |
429 | ||
430 | static int upload_firmware(int firmware_idx, struct sigma *sigma) | |
431 | { | |
432 | int ret; | |
433 | unsigned char *buf; | |
434 | unsigned char pins; | |
435 | size_t buf_size; | |
436 | unsigned char result[32]; | |
437 | char firmware_path[128]; | |
438 | ||
439 | /* Make sure it's an ASIX SIGMA. */ | |
440 | if ((ret = ftdi_usb_open_desc(&sigma->ftdic, | |
441 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
442 | g_warning("ftdi_usb_open failed: %s", | |
443 | ftdi_get_error_string(&sigma->ftdic)); | |
444 | return 0; | |
445 | } | |
446 | ||
447 | if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0xdf, BITMODE_BITBANG)) < 0) { | |
448 | g_warning("ftdi_set_bitmode failed: %s", | |
449 | ftdi_get_error_string(&sigma->ftdic)); | |
450 | return 0; | |
451 | } | |
452 | ||
453 | /* Four times the speed of sigmalogan - Works well. */ | |
454 | if ((ret = ftdi_set_baudrate(&sigma->ftdic, 750000)) < 0) { | |
455 | g_warning("ftdi_set_baudrate failed: %s", | |
456 | ftdi_get_error_string(&sigma->ftdic)); | |
457 | return 0; | |
458 | } | |
459 | ||
460 | /* Force the FPGA to reboot. */ | |
461 | sigma_write(suicide, sizeof(suicide), sigma); | |
462 | sigma_write(suicide, sizeof(suicide), sigma); | |
463 | sigma_write(suicide, sizeof(suicide), sigma); | |
464 | sigma_write(suicide, sizeof(suicide), sigma); | |
465 | ||
466 | /* Prepare to upload firmware (FPGA specific). */ | |
467 | sigma_write(init, sizeof(init), sigma); | |
468 | ||
469 | ftdi_usb_purge_buffers(&sigma->ftdic); | |
470 | ||
471 | /* Wait until the FPGA asserts INIT_B. */ | |
472 | while (1) { | |
473 | ret = sigma_read(result, 1, sigma); | |
474 | if (result[0] & 0x20) | |
475 | break; | |
476 | } | |
477 | ||
478 | /* Prepare firmware. */ | |
479 | snprintf(firmware_path, sizeof(firmware_path), "%s/%s", FIRMWARE_DIR, | |
480 | firmware_files[firmware_idx]); | |
481 | ||
482 | if (-1 == bin2bitbang(firmware_path, &buf, &buf_size)) { | |
483 | g_warning("An error occured while reading the firmware: %s", | |
484 | firmware_path); | |
485 | return SIGROK_ERR; | |
486 | } | |
487 | ||
488 | /* Upload firmare. */ | |
489 | sigma_write(buf, buf_size, sigma); | |
490 | ||
491 | g_free(buf); | |
492 | ||
493 | if ((ret = ftdi_set_bitmode(&sigma->ftdic, 0x00, BITMODE_RESET)) < 0) { | |
494 | g_warning("ftdi_set_bitmode failed: %s", | |
495 | ftdi_get_error_string(&sigma->ftdic)); | |
496 | return SIGROK_ERR; | |
497 | } | |
498 | ||
499 | ftdi_usb_purge_buffers(&sigma->ftdic); | |
500 | ||
501 | /* Discard garbage. */ | |
502 | while (1 == sigma_read(&pins, 1, sigma)) | |
503 | ; | |
504 | ||
505 | /* Initialize the logic analyzer mode. */ | |
506 | sigma_write(logic_mode_start, sizeof(logic_mode_start), sigma); | |
507 | ||
508 | /* Expect a 3 byte reply. */ | |
509 | ret = sigma_read(result, 3, sigma); | |
510 | if (ret != 3 || | |
511 | result[0] != 0xa6 || result[1] != 0x55 || result[2] != 0xaa) { | |
512 | g_warning("Configuration failed. Invalid reply received."); | |
513 | return SIGROK_ERR; | |
514 | } | |
515 | ||
516 | sigma->cur_firmware = firmware_idx; | |
517 | ||
518 | return SIGROK_OK; | |
519 | } | |
520 | ||
521 | static int hw_opendev(int device_index) | |
522 | { | |
523 | struct sigrok_device_instance *sdi; | |
524 | struct sigma *sigma; | |
525 | int ret; | |
526 | ||
527 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) | |
528 | return SIGROK_ERR; | |
529 | ||
530 | sigma = sdi->priv; | |
531 | ||
532 | /* Make sure it's an ASIX SIGMA. */ | |
533 | if ((ret = ftdi_usb_open_desc(&sigma->ftdic, | |
534 | USB_VENDOR, USB_PRODUCT, USB_DESCRIPTION, NULL)) < 0) { | |
535 | ||
536 | g_warning("ftdi_usb_open failed: %s", | |
537 | ftdi_get_error_string(&sigma->ftdic)); | |
538 | ||
539 | return 0; | |
540 | } | |
541 | ||
542 | sdi->status = ST_ACTIVE; | |
543 | ||
544 | return SIGROK_OK; | |
545 | } | |
546 | ||
547 | static int set_samplerate(struct sigrok_device_instance *sdi, | |
548 | uint64_t samplerate) | |
549 | { | |
550 | int i, ret; | |
551 | struct sigma *sigma = sdi->priv; | |
552 | ||
553 | for (i = 0; supported_samplerates[i]; i++) { | |
554 | if (supported_samplerates[i] == samplerate) | |
555 | break; | |
556 | } | |
557 | if (supported_samplerates[i] == 0) | |
558 | return SIGROK_ERR_SAMPLERATE; | |
559 | ||
560 | if (samplerate <= MHZ(50)) { | |
561 | ret = upload_firmware(0, sigma); | |
562 | sigma->num_probes = 16; | |
563 | } | |
564 | if (samplerate == MHZ(100)) { | |
565 | ret = upload_firmware(1, sigma); | |
566 | sigma->num_probes = 8; | |
567 | } | |
568 | else if (samplerate == MHZ(200)) { | |
569 | ret = upload_firmware(2, sigma); | |
570 | sigma->num_probes = 4; | |
571 | } | |
572 | ||
573 | sigma->cur_samplerate = samplerate; | |
574 | sigma->samples_per_event = 16 / sigma->num_probes; | |
575 | sigma->state.state = SIGMA_IDLE; | |
576 | ||
577 | g_message("Firmware uploaded"); | |
578 | ||
579 | return ret; | |
580 | } | |
581 | ||
582 | /* | |
583 | * In 100 and 200 MHz mode, only a single pin rising/falling can be | |
584 | * set as trigger. In other modes, two rising/falling triggers can be set, | |
585 | * in addition to value/mask trigger for any number of probes. | |
586 | * | |
587 | * The Sigma supports complex triggers using boolean expressions, but this | |
588 | * has not been implemented yet. | |
589 | */ | |
590 | static int configure_probes(struct sigrok_device_instance *sdi, GSList *probes) | |
591 | { | |
592 | struct sigma *sigma = sdi->priv; | |
593 | struct probe *probe; | |
594 | GSList *l; | |
595 | int trigger_set = 0; | |
596 | int probebit; | |
597 | ||
598 | memset(&sigma->trigger, 0, sizeof(struct sigma_trigger)); | |
599 | ||
600 | for (l = probes; l; l = l->next) { | |
601 | probe = (struct probe *)l->data; | |
602 | probebit = 1 << (probe->index - 1); | |
603 | ||
604 | if (!probe->enabled || !probe->trigger) | |
605 | continue; | |
606 | ||
607 | if (sigma->cur_samplerate >= MHZ(100)) { | |
608 | /* Fast trigger support. */ | |
609 | if (trigger_set) { | |
610 | g_warning("Asix Sigma only supports a single " | |
611 | "pin trigger in 100 and 200 " | |
612 | "MHz mode."); | |
613 | return SIGROK_ERR; | |
614 | } | |
615 | if (probe->trigger[0] == 'f') | |
616 | sigma->trigger.fallingmask |= probebit; | |
617 | else if (probe->trigger[0] == 'r') | |
618 | sigma->trigger.risingmask |= probebit; | |
619 | else { | |
620 | g_warning("Asix Sigma only supports " | |
621 | "rising/falling trigger in 100 " | |
622 | "and 200 MHz mode."); | |
623 | return SIGROK_ERR; | |
624 | } | |
625 | ||
626 | ++trigger_set; | |
627 | } else { | |
628 | /* Simple trigger support (event). */ | |
629 | if (probe->trigger[0] == '1') { | |
630 | sigma->trigger.simplevalue |= probebit; | |
631 | sigma->trigger.simplemask |= probebit; | |
632 | } | |
633 | else if (probe->trigger[0] == '0') { | |
634 | sigma->trigger.simplevalue &= ~probebit; | |
635 | sigma->trigger.simplemask |= probebit; | |
636 | } | |
637 | else if (probe->trigger[0] == 'f') { | |
638 | sigma->trigger.fallingmask |= probebit; | |
639 | ++trigger_set; | |
640 | } | |
641 | else if (probe->trigger[0] == 'r') { | |
642 | sigma->trigger.risingmask |= probebit; | |
643 | ++trigger_set; | |
644 | } | |
645 | ||
646 | /* | |
647 | * Actually, Sigma supports 2 rising/falling triggers, | |
648 | * but they are ORed and the current trigger syntax | |
649 | * does not permit ORed triggers. | |
650 | */ | |
651 | if (trigger_set > 1) { | |
652 | g_warning("Asix Sigma only supports 1 rising/" | |
653 | "falling triggers."); | |
654 | return SIGROK_ERR; | |
655 | } | |
656 | } | |
657 | } | |
658 | ||
659 | return SIGROK_OK; | |
660 | } | |
661 | ||
662 | static void hw_closedev(int device_index) | |
663 | { | |
664 | struct sigrok_device_instance *sdi; | |
665 | struct sigma *sigma; | |
666 | ||
667 | if ((sdi = get_sigrok_device_instance(device_instances, device_index))) | |
668 | { | |
669 | sigma = sdi->priv; | |
670 | if (sdi->status == ST_ACTIVE) | |
671 | ftdi_usb_close(&sigma->ftdic); | |
672 | ||
673 | sdi->status = ST_INACTIVE; | |
674 | } | |
675 | } | |
676 | ||
677 | static void hw_cleanup(void) | |
678 | { | |
679 | GSList *l; | |
680 | struct sigrok_device_instance *sdi; | |
681 | ||
682 | /* Properly close all devices. */ | |
683 | for (l = device_instances; l; l = l->next) { | |
684 | sdi = l->data; | |
685 | if (sdi->priv != NULL) | |
686 | free(sdi->priv); | |
687 | sigrok_device_instance_free(sdi); | |
688 | } | |
689 | g_slist_free(device_instances); | |
690 | device_instances = NULL; | |
691 | } | |
692 | ||
693 | static void *hw_get_device_info(int device_index, int device_info_id) | |
694 | { | |
695 | struct sigrok_device_instance *sdi; | |
696 | struct sigma *sigma; | |
697 | void *info = NULL; | |
698 | ||
699 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) { | |
700 | fprintf(stderr, "It's NULL.\n"); | |
701 | return NULL; | |
702 | } | |
703 | ||
704 | sigma = sdi->priv; | |
705 | ||
706 | switch (device_info_id) { | |
707 | case DI_INSTANCE: | |
708 | info = sdi; | |
709 | break; | |
710 | case DI_NUM_PROBES: | |
711 | info = GINT_TO_POINTER(16); | |
712 | break; | |
713 | case DI_SAMPLERATES: | |
714 | info = &samplerates; | |
715 | break; | |
716 | case DI_TRIGGER_TYPES: | |
717 | info = (char *)TRIGGER_TYPES; | |
718 | break; | |
719 | case DI_CUR_SAMPLERATE: | |
720 | info = &sigma->cur_samplerate; | |
721 | break; | |
722 | } | |
723 | ||
724 | return info; | |
725 | } | |
726 | ||
727 | static int hw_get_status(int device_index) | |
728 | { | |
729 | struct sigrok_device_instance *sdi; | |
730 | ||
731 | sdi = get_sigrok_device_instance(device_instances, device_index); | |
732 | if (sdi) | |
733 | return sdi->status; | |
734 | else | |
735 | return ST_NOT_FOUND; | |
736 | } | |
737 | ||
738 | static int *hw_get_capabilities(void) | |
739 | { | |
740 | return capabilities; | |
741 | } | |
742 | ||
743 | static int hw_set_configuration(int device_index, int capability, void *value) | |
744 | { | |
745 | struct sigrok_device_instance *sdi; | |
746 | struct sigma *sigma; | |
747 | int ret; | |
748 | ||
749 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) | |
750 | return SIGROK_ERR; | |
751 | ||
752 | sigma = sdi->priv; | |
753 | ||
754 | if (capability == HWCAP_SAMPLERATE) { | |
755 | ret = set_samplerate(sdi, *(uint64_t*) value); | |
756 | } else if (capability == HWCAP_PROBECONFIG) { | |
757 | ret = configure_probes(sdi, value); | |
758 | } else if (capability == HWCAP_LIMIT_MSEC) { | |
759 | sigma->limit_msec = strtoull(value, NULL, 10); | |
760 | ret = SIGROK_OK; | |
761 | } else if (capability == HWCAP_CAPTURE_RATIO) { | |
762 | sigma->capture_ratio = strtoull(value, NULL, 10); | |
763 | ret = SIGROK_OK; | |
764 | } else { | |
765 | ret = SIGROK_ERR; | |
766 | } | |
767 | ||
768 | return ret; | |
769 | } | |
770 | ||
771 | /* Software trigger to determine exact trigger position. */ | |
772 | static int get_trigger_offset(uint16_t *samples, uint16_t last_sample, | |
773 | struct sigma_trigger *t) | |
774 | { | |
775 | int i; | |
776 | ||
777 | for (i = 0; i < 8; ++i) { | |
778 | if (i > 0) | |
779 | last_sample = samples[i-1]; | |
780 | ||
781 | /* Simple triggers. */ | |
782 | if ((samples[i] & t->simplemask) != t->simplevalue) | |
783 | continue; | |
784 | ||
785 | /* Rising edge. */ | |
786 | if ((last_sample & t->risingmask) != 0 || (samples[i] & | |
787 | t->risingmask) != t->risingmask) | |
788 | continue; | |
789 | ||
790 | /* Falling edge. */ | |
791 | if ((last_sample & t->fallingmask) != t->fallingmask || | |
792 | (samples[i] & t->fallingmask) != 0) | |
793 | continue; | |
794 | ||
795 | break; | |
796 | } | |
797 | ||
798 | /* If we did not match, return original trigger pos. */ | |
799 | return i & 0x7; | |
800 | } | |
801 | ||
802 | /* | |
803 | * Decode chunk of 1024 bytes, 64 clusters, 7 events per cluster. | |
804 | * Each event is 20ns apart, and can contain multiple samples. | |
805 | * | |
806 | * For 200 MHz, events contain 4 samples for each channel, spread 5 ns apart. | |
807 | * For 100 MHz, events contain 2 samples for each channel, spread 10 ns apart. | |
808 | * For 50 MHz and below, events contain one sample for each channel, | |
809 | * spread 20 ns apart. | |
810 | */ | |
811 | static int decode_chunk_ts(uint8_t *buf, uint16_t *lastts, | |
812 | uint16_t *lastsample, int triggerpos, | |
813 | uint16_t limit_chunk, void *user_data) | |
814 | { | |
815 | struct sigrok_device_instance *sdi = user_data; | |
816 | struct sigma *sigma = sdi->priv; | |
817 | uint16_t tsdiff, ts; | |
818 | uint16_t samples[65536 * sigma->samples_per_event]; | |
819 | struct datafeed_packet packet; | |
820 | int i, j, k, l, numpad, tosend; | |
821 | size_t n = 0, sent = 0; | |
822 | int clustersize = EVENTS_PER_CLUSTER * sigma->samples_per_event; | |
823 | uint16_t *event; | |
824 | uint16_t cur_sample; | |
825 | int triggerts = -1; | |
826 | ||
827 | /* Check if trigger is in this chunk. */ | |
828 | if (triggerpos != -1) { | |
829 | if (sigma->cur_samplerate <= MHZ(50)) | |
830 | triggerpos -= EVENTS_PER_CLUSTER - 1; | |
831 | ||
832 | if (triggerpos < 0) | |
833 | triggerpos = 0; | |
834 | ||
835 | /* Find in which cluster the trigger occured. */ | |
836 | triggerts = triggerpos / 7; | |
837 | } | |
838 | ||
839 | /* For each ts. */ | |
840 | for (i = 0; i < 64; ++i) { | |
841 | ts = *(uint16_t *) &buf[i * 16]; | |
842 | tsdiff = ts - *lastts; | |
843 | *lastts = ts; | |
844 | ||
845 | /* Decode partial chunk. */ | |
846 | if (limit_chunk && ts > limit_chunk) | |
847 | return SIGROK_OK; | |
848 | ||
849 | /* Pad last sample up to current point. */ | |
850 | numpad = tsdiff * sigma->samples_per_event - clustersize; | |
851 | if (numpad > 0) { | |
852 | for (j = 0; j < numpad; ++j) | |
853 | samples[j] = *lastsample; | |
854 | ||
855 | n = numpad; | |
856 | } | |
857 | ||
858 | /* Send samples between previous and this timestamp to sigrok. */ | |
859 | sent = 0; | |
860 | while (sent < n) { | |
861 | tosend = MIN(2048, n - sent); | |
862 | ||
863 | packet.type = DF_LOGIC; | |
864 | packet.length = tosend * sizeof(uint16_t); | |
865 | packet.unitsize = 2; | |
866 | packet.payload = samples + sent; | |
867 | session_bus(sigma->session_id, &packet); | |
868 | ||
869 | sent += tosend; | |
870 | } | |
871 | n = 0; | |
872 | ||
873 | event = (uint16_t *) &buf[i * 16 + 2]; | |
874 | cur_sample = 0; | |
875 | ||
876 | /* For each event in cluster. */ | |
877 | for (j = 0; j < 7; ++j) { | |
878 | ||
879 | /* For each sample in event. */ | |
880 | for (k = 0; k < sigma->samples_per_event; ++k) { | |
881 | cur_sample = 0; | |
882 | ||
883 | /* For each probe. */ | |
884 | for (l = 0; l < sigma->num_probes; ++l) | |
885 | cur_sample |= (!!(event[j] & (1 << (l * | |
886 | sigma->samples_per_event | |
887 | + k)))) | |
888 | << l; | |
889 | ||
890 | samples[n++] = cur_sample; | |
891 | } | |
892 | } | |
893 | ||
894 | /* Send data up to trigger point (if triggered). */ | |
895 | sent = 0; | |
896 | if (i == triggerts) { | |
897 | /* | |
898 | * Trigger is not always accurate to sample because of | |
899 | * pipeline delay. However, it always triggers before | |
900 | * the actual event. We therefore look at the next | |
901 | * samples to pinpoint the exact position of the trigger. | |
902 | */ | |
903 | tosend = get_trigger_offset(samples, *lastsample, | |
904 | &sigma->trigger); | |
905 | ||
906 | if (tosend > 0) { | |
907 | packet.type = DF_LOGIC; | |
908 | packet.length = tosend * sizeof(uint16_t); | |
909 | packet.unitsize = 2; | |
910 | packet.payload = samples; | |
911 | session_bus(sigma->session_id, &packet); | |
912 | ||
913 | sent += tosend; | |
914 | } | |
915 | ||
916 | packet.type = DF_TRIGGER; | |
917 | packet.length = 0; | |
918 | packet.payload = 0; | |
919 | session_bus(sigma->session_id, &packet); | |
920 | } | |
921 | ||
922 | /* Send rest of the chunk to sigrok. */ | |
923 | tosend = n - sent; | |
924 | ||
925 | if (tosend > 0) { | |
926 | packet.type = DF_LOGIC; | |
927 | packet.length = tosend * sizeof(uint16_t); | |
928 | packet.unitsize = 2; | |
929 | packet.payload = samples + sent; | |
930 | session_bus(sigma->session_id, &packet); | |
931 | } | |
932 | ||
933 | *lastsample = samples[n - 1]; | |
934 | } | |
935 | ||
936 | return SIGROK_OK; | |
937 | } | |
938 | ||
939 | static int receive_data(int fd, int revents, void *user_data) | |
940 | { | |
941 | struct sigrok_device_instance *sdi = user_data; | |
942 | struct sigma *sigma = sdi->priv; | |
943 | struct datafeed_packet packet; | |
944 | const int chunks_per_read = 32; | |
945 | unsigned char buf[chunks_per_read * CHUNK_SIZE]; | |
946 | int bufsz, numchunks, i, newchunks; | |
947 | uint32_t running_msec; | |
948 | struct timeval tv; | |
949 | ||
950 | fd = fd; | |
951 | revents = revents; | |
952 | ||
953 | numchunks = (sigma->state.stoppos + 511) / 512; | |
954 | ||
955 | if (sigma->state.state == SIGMA_IDLE) | |
956 | return FALSE; | |
957 | ||
958 | if (sigma->state.state == SIGMA_CAPTURE) { | |
959 | ||
960 | /* Check if the timer has expired, or memory is full. */ | |
961 | gettimeofday(&tv, 0); | |
962 | running_msec = (tv.tv_sec - sigma->start_tv.tv_sec) * 1000 + | |
963 | (tv.tv_usec - sigma->start_tv.tv_usec) / 1000; | |
964 | ||
965 | if (running_msec < sigma->limit_msec && numchunks < 32767) | |
966 | return FALSE; | |
967 | ||
968 | hw_stop_acquisition(sdi->index, user_data); | |
969 | ||
970 | return FALSE; | |
971 | ||
972 | } else if (sigma->state.state == SIGMA_DOWNLOAD) { | |
973 | if (sigma->state.chunks_downloaded >= numchunks) { | |
974 | /* End of samples. */ | |
975 | packet.type = DF_END; | |
976 | packet.length = 0; | |
977 | session_bus(sigma->session_id, &packet); | |
978 | ||
979 | sigma->state.state = SIGMA_IDLE; | |
980 | ||
981 | return TRUE; | |
982 | } | |
983 | ||
984 | newchunks = MIN(chunks_per_read, | |
985 | numchunks - sigma->state.chunks_downloaded); | |
986 | ||
987 | g_message("Downloading sample data: %.0f %%", | |
988 | 100.0 * sigma->state.chunks_downloaded / numchunks); | |
989 | ||
990 | bufsz = sigma_read_dram(sigma->state.chunks_downloaded, | |
991 | newchunks, buf, sigma); | |
992 | ||
993 | /* Find first ts. */ | |
994 | if (sigma->state.chunks_downloaded == 0) { | |
995 | sigma->state.lastts = *(uint16_t *) buf - 1; | |
996 | sigma->state.lastsample = 0; | |
997 | } | |
998 | ||
999 | /* Decode chunks and send them to sigrok. */ | |
1000 | for (i = 0; i < newchunks; ++i) { | |
1001 | int limit_chunk = 0; | |
1002 | ||
1003 | /* The last chunk may potentially be only in part. */ | |
1004 | if (sigma->state.chunks_downloaded == numchunks - 1) | |
1005 | { | |
1006 | /* Find the last valid timestamp */ | |
1007 | limit_chunk = sigma->state.stoppos % 512 + sigma->state.lastts; | |
1008 | } | |
1009 | ||
1010 | if (sigma->state.chunks_downloaded + i == sigma->state.triggerchunk) | |
1011 | decode_chunk_ts(buf + (i * CHUNK_SIZE), | |
1012 | &sigma->state.lastts, | |
1013 | &sigma->state.lastsample, | |
1014 | sigma->state.triggerpos & 0x1ff, | |
1015 | limit_chunk, user_data); | |
1016 | else | |
1017 | decode_chunk_ts(buf + (i * CHUNK_SIZE), | |
1018 | &sigma->state.lastts, | |
1019 | &sigma->state.lastsample, | |
1020 | -1, limit_chunk, user_data); | |
1021 | ||
1022 | ++sigma->state.chunks_downloaded; | |
1023 | } | |
1024 | } | |
1025 | ||
1026 | return TRUE; | |
1027 | } | |
1028 | ||
1029 | /* Build a LUT entry used by the trigger functions. */ | |
1030 | static void build_lut_entry(uint16_t value, uint16_t mask, uint16_t *entry) | |
1031 | { | |
1032 | int i, j, k, bit; | |
1033 | ||
1034 | /* For each quad probe. */ | |
1035 | for (i = 0; i < 4; ++i) { | |
1036 | entry[i] = 0xffff; | |
1037 | ||
1038 | /* For each bit in LUT. */ | |
1039 | for (j = 0; j < 16; ++j) | |
1040 | ||
1041 | /* For each probe in quad. */ | |
1042 | for (k = 0; k < 4; ++k) { | |
1043 | bit = 1 << (i * 4 + k); | |
1044 | ||
1045 | /* Set bit in entry */ | |
1046 | if ((mask & bit) && | |
1047 | ((!(value & bit)) != | |
1048 | (!(j & (1 << k))))) | |
1049 | entry[i] &= ~(1 << j); | |
1050 | } | |
1051 | } | |
1052 | } | |
1053 | ||
1054 | /* Add a logical function to LUT mask. */ | |
1055 | static void add_trigger_function(enum triggerop oper, enum triggerfunc func, | |
1056 | int index, int neg, uint16_t *mask) | |
1057 | { | |
1058 | int i, j; | |
1059 | int x[2][2], tmp, a, b, aset, bset, rset; | |
1060 | ||
1061 | memset(x, 0, 4 * sizeof(int)); | |
1062 | ||
1063 | /* Trigger detect condition. */ | |
1064 | switch (oper) { | |
1065 | case OP_LEVEL: | |
1066 | x[0][1] = 1; | |
1067 | x[1][1] = 1; | |
1068 | break; | |
1069 | case OP_NOT: | |
1070 | x[0][0] = 1; | |
1071 | x[1][0] = 1; | |
1072 | break; | |
1073 | case OP_RISE: | |
1074 | x[0][1] = 1; | |
1075 | break; | |
1076 | case OP_FALL: | |
1077 | x[1][0] = 1; | |
1078 | break; | |
1079 | case OP_RISEFALL: | |
1080 | x[0][1] = 1; | |
1081 | x[1][0] = 1; | |
1082 | break; | |
1083 | case OP_NOTRISE: | |
1084 | x[1][1] = 1; | |
1085 | x[0][0] = 1; | |
1086 | x[1][0] = 1; | |
1087 | break; | |
1088 | case OP_NOTFALL: | |
1089 | x[1][1] = 1; | |
1090 | x[0][0] = 1; | |
1091 | x[0][1] = 1; | |
1092 | break; | |
1093 | case OP_NOTRISEFALL: | |
1094 | x[1][1] = 1; | |
1095 | x[0][0] = 1; | |
1096 | break; | |
1097 | } | |
1098 | ||
1099 | /* Transpose if neg is set. */ | |
1100 | if (neg) { | |
1101 | for (i = 0; i < 2; ++i) | |
1102 | for (j = 0; j < 2; ++j) { | |
1103 | tmp = x[i][j]; | |
1104 | x[i][j] = x[1-i][1-j]; | |
1105 | x[1-i][1-j] = tmp; | |
1106 | } | |
1107 | } | |
1108 | ||
1109 | /* Update mask with function. */ | |
1110 | for (i = 0; i < 16; ++i) { | |
1111 | a = (i >> (2 * index + 0)) & 1; | |
1112 | b = (i >> (2 * index + 1)) & 1; | |
1113 | ||
1114 | aset = (*mask >> i) & 1; | |
1115 | bset = x[b][a]; | |
1116 | ||
1117 | if (func == FUNC_AND || func == FUNC_NAND) | |
1118 | rset = aset & bset; | |
1119 | else if (func == FUNC_OR || func == FUNC_NOR) | |
1120 | rset = aset | bset; | |
1121 | else if (func == FUNC_XOR || func == FUNC_NXOR) | |
1122 | rset = aset ^ bset; | |
1123 | ||
1124 | if (func == FUNC_NAND || func == FUNC_NOR || func == FUNC_NXOR) | |
1125 | rset = !rset; | |
1126 | ||
1127 | *mask &= ~(1 << i); | |
1128 | ||
1129 | if (rset) | |
1130 | *mask |= 1 << i; | |
1131 | } | |
1132 | } | |
1133 | ||
1134 | /* | |
1135 | * Build trigger LUTs used by 50 MHz and lower sample rates for supporting | |
1136 | * simple pin change and state triggers. Only two transitions (rise/fall) can be | |
1137 | * set at any time, but a full mask and value can be set (0/1). | |
1138 | */ | |
1139 | static int build_basic_trigger(struct triggerlut *lut, struct sigma *sigma) | |
1140 | { | |
1141 | int i,j; | |
1142 | uint16_t masks[2] = { 0, 0 }; | |
1143 | ||
1144 | memset(lut, 0, sizeof(struct triggerlut)); | |
1145 | ||
1146 | /* Contant for simple triggers. */ | |
1147 | lut->m4 = 0xa000; | |
1148 | ||
1149 | /* Value/mask trigger support. */ | |
1150 | build_lut_entry(sigma->trigger.simplevalue, sigma->trigger.simplemask, | |
1151 | lut->m2d); | |
1152 | ||
1153 | /* Rise/fall trigger support. */ | |
1154 | for (i = 0, j = 0; i < 16; ++i) { | |
1155 | if (sigma->trigger.risingmask & (1 << i) || | |
1156 | sigma->trigger.fallingmask & (1 << i)) | |
1157 | masks[j++] = 1 << i; | |
1158 | } | |
1159 | ||
1160 | build_lut_entry(masks[0], masks[0], lut->m0d); | |
1161 | build_lut_entry(masks[1], masks[1], lut->m1d); | |
1162 | ||
1163 | /* Add glue logic */ | |
1164 | if (masks[0] || masks[1]) { | |
1165 | /* Transition trigger. */ | |
1166 | if (masks[0] & sigma->trigger.risingmask) | |
1167 | add_trigger_function(OP_RISE, FUNC_OR, 0, 0, &lut->m3); | |
1168 | if (masks[0] & sigma->trigger.fallingmask) | |
1169 | add_trigger_function(OP_FALL, FUNC_OR, 0, 0, &lut->m3); | |
1170 | if (masks[1] & sigma->trigger.risingmask) | |
1171 | add_trigger_function(OP_RISE, FUNC_OR, 1, 0, &lut->m3); | |
1172 | if (masks[1] & sigma->trigger.fallingmask) | |
1173 | add_trigger_function(OP_FALL, FUNC_OR, 1, 0, &lut->m3); | |
1174 | } else { | |
1175 | /* Only value/mask trigger. */ | |
1176 | lut->m3 = 0xffff; | |
1177 | } | |
1178 | ||
1179 | /* Triggertype: event. */ | |
1180 | lut->params.selres = 3; | |
1181 | ||
1182 | return SIGROK_OK; | |
1183 | } | |
1184 | ||
1185 | static int hw_start_acquisition(int device_index, gpointer session_device_id) | |
1186 | { | |
1187 | struct sigrok_device_instance *sdi; | |
1188 | struct sigma *sigma; | |
1189 | struct datafeed_packet packet; | |
1190 | struct datafeed_header header; | |
1191 | struct clockselect_50 clockselect; | |
1192 | int frac; | |
1193 | uint8_t triggerselect; | |
1194 | struct triggerinout triggerinout_conf; | |
1195 | struct triggerlut lut; | |
1196 | int triggerpin; | |
1197 | ||
1198 | session_device_id = session_device_id; | |
1199 | ||
1200 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) | |
1201 | return SIGROK_ERR; | |
1202 | ||
1203 | sigma = sdi->priv; | |
1204 | ||
1205 | /* If the samplerate has not been set, default to 50 MHz. */ | |
1206 | if (sigma->cur_firmware == -1) | |
1207 | set_samplerate(sdi, MHZ(50)); | |
1208 | ||
1209 | /* Enter trigger programming mode. */ | |
1210 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, sigma); | |
1211 | ||
1212 | /* 100 and 200 MHz mode. */ | |
1213 | if (sigma->cur_samplerate >= MHZ(100)) { | |
1214 | sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, sigma); | |
1215 | ||
1216 | /* Find which pin to trigger on from mask. */ | |
1217 | for (triggerpin = 0; triggerpin < 8; ++triggerpin) | |
1218 | if ((sigma->trigger.risingmask | sigma->trigger.fallingmask) & | |
1219 | (1 << triggerpin)) | |
1220 | break; | |
1221 | ||
1222 | /* Set trigger pin and light LED on trigger. */ | |
1223 | triggerselect = (1 << LEDSEL1) | (triggerpin & 0x7); | |
1224 | ||
1225 | /* Default rising edge. */ | |
1226 | if (sigma->trigger.fallingmask) | |
1227 | triggerselect |= 1 << 3; | |
1228 | ||
1229 | /* All other modes. */ | |
1230 | } else if (sigma->cur_samplerate <= MHZ(50)) { | |
1231 | build_basic_trigger(&lut, sigma); | |
1232 | ||
1233 | sigma_write_trigger_lut(&lut, sigma); | |
1234 | ||
1235 | triggerselect = (1 << LEDSEL1) | (1 << LEDSEL0); | |
1236 | } | |
1237 | ||
1238 | /* Setup trigger in and out pins to default values. */ | |
1239 | memset(&triggerinout_conf, 0, sizeof(struct triggerinout)); | |
1240 | triggerinout_conf.trgout_bytrigger = 1; | |
1241 | triggerinout_conf.trgout_enable = 1; | |
1242 | ||
1243 | sigma_write_register(WRITE_TRIGGER_OPTION, | |
1244 | (uint8_t *) &triggerinout_conf, | |
1245 | sizeof(struct triggerinout), sigma); | |
1246 | ||
1247 | /* Go back to normal mode. */ | |
1248 | sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, sigma); | |
1249 | ||
1250 | /* Set clock select register. */ | |
1251 | if (sigma->cur_samplerate == MHZ(200)) | |
1252 | /* Enable 4 probes. */ | |
1253 | sigma_set_register(WRITE_CLOCK_SELECT, 0xf0, sigma); | |
1254 | else if (sigma->cur_samplerate == MHZ(100)) | |
1255 | /* Enable 8 probes. */ | |
1256 | sigma_set_register(WRITE_CLOCK_SELECT, 0x00, sigma); | |
1257 | else { | |
1258 | /* | |
1259 | * 50 MHz mode (or fraction thereof). Any fraction down to | |
1260 | * 50 MHz / 256 can be used, but is not supported by sigrok API. | |
1261 | */ | |
1262 | frac = MHZ(50) / sigma->cur_samplerate - 1; | |
1263 | ||
1264 | clockselect.async = 0; | |
1265 | clockselect.fraction = frac; | |
1266 | clockselect.disabled_probes = 0; | |
1267 | ||
1268 | sigma_write_register(WRITE_CLOCK_SELECT, | |
1269 | (uint8_t *) &clockselect, | |
1270 | sizeof(clockselect), sigma); | |
1271 | } | |
1272 | ||
1273 | /* Setup maximum post trigger time. */ | |
1274 | sigma_set_register(WRITE_POST_TRIGGER, | |
1275 | (sigma->capture_ratio * 255) / 100, sigma); | |
1276 | ||
1277 | /* Start acqusition. */ | |
1278 | gettimeofday(&sigma->start_tv, 0); | |
1279 | sigma_set_register(WRITE_MODE, 0x0d, sigma); | |
1280 | ||
1281 | sigma->session_id = session_device_id; | |
1282 | ||
1283 | /* Send header packet to the session bus. */ | |
1284 | packet.type = DF_HEADER; | |
1285 | packet.length = sizeof(struct datafeed_header); | |
1286 | packet.payload = &header; | |
1287 | header.feed_version = 1; | |
1288 | gettimeofday(&header.starttime, NULL); | |
1289 | header.samplerate = sigma->cur_samplerate; | |
1290 | header.protocol_id = PROTO_RAW; | |
1291 | header.num_logic_probes = sigma->num_probes; | |
1292 | header.num_analog_probes = 0; | |
1293 | session_bus(session_device_id, &packet); | |
1294 | ||
1295 | /* Add capture source. */ | |
1296 | source_add(0, G_IO_IN, 10, receive_data, sdi); | |
1297 | ||
1298 | sigma->state.state = SIGMA_CAPTURE; | |
1299 | ||
1300 | return SIGROK_OK; | |
1301 | } | |
1302 | ||
1303 | static void hw_stop_acquisition(int device_index, gpointer session_device_id) | |
1304 | { | |
1305 | struct sigrok_device_instance *sdi; | |
1306 | struct sigma *sigma; | |
1307 | uint8_t modestatus; | |
1308 | ||
1309 | if (!(sdi = get_sigrok_device_instance(device_instances, device_index))) | |
1310 | return; | |
1311 | ||
1312 | sigma = sdi->priv; | |
1313 | ||
1314 | session_device_id = session_device_id; | |
1315 | ||
1316 | /* Stop acquisition. */ | |
1317 | sigma_set_register(WRITE_MODE, 0x11, sigma); | |
1318 | ||
1319 | /* Set SDRAM Read Enable. */ | |
1320 | sigma_set_register(WRITE_MODE, 0x02, sigma); | |
1321 | ||
1322 | /* Get the current position. */ | |
1323 | sigma_read_pos(&sigma->state.stoppos, &sigma->state.triggerpos, sigma); | |
1324 | ||
1325 | /* Check if trigger has fired. */ | |
1326 | modestatus = sigma_get_register(READ_MODE, sigma); | |
1327 | if (modestatus & 0x20) { | |
1328 | sigma->state.triggerchunk = sigma->state.triggerpos / 512; | |
1329 | ||
1330 | } else | |
1331 | sigma->state.triggerchunk = -1; | |
1332 | ||
1333 | sigma->state.chunks_downloaded = 0; | |
1334 | ||
1335 | sigma->state.state = SIGMA_DOWNLOAD; | |
1336 | } | |
1337 | ||
1338 | struct device_plugin asix_sigma_plugin_info = { | |
1339 | "asix-sigma", | |
1340 | 1, | |
1341 | hw_init, | |
1342 | hw_cleanup, | |
1343 | hw_opendev, | |
1344 | hw_closedev, | |
1345 | hw_get_device_info, | |
1346 | hw_get_status, | |
1347 | hw_get_capabilities, | |
1348 | hw_set_configuration, | |
1349 | hw_start_acquisition, | |
1350 | hw_stop_acquisition, | |
1351 | }; |