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fx2lafw: add definitions for IBN (IN BULK NAK) interrupt
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1/*
2 * This file is part of the sigrok-firmware-fx2lafw project.
3 *
4 * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20/*
21 * fx2lafw is an open-source firmware for Cypress FX2 based logic analyzers.
22 *
23 * It is written in C, using fx2lib as helper library, and sdcc as compiler.
24 * The code is licensed under the terms of the GNU GPL, version 2 or later.
25 *
26 * Technical notes:
27 *
28 * - We use the FX2 in GPIF mode to sample the data (asynchronously).
29 * - We use the internal 48MHz clock for GPIF.
30 * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
31 * or PB0-PB7 + PD0-PD7 for 16-channel sampling.
32 * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
33 *
34 * Documentation:
35 *
36 * - See http://sigrok.org/wiki/Fx2lafw
37 */
38
39#include <fx2regs.h>
40#include <fx2macros.h>
41#include <fx2ints.h>
42#include <delay.h>
43#include <setupdat.h>
44#include <eputils.h>
45#include <gpif.h>
46#include <command.h>
47#include <fx2lafw.h>
48#include <gpif-acquisition.h>
49
50/* ... */
51volatile __bit got_sud;
52BYTE vendor_command;
53
54volatile WORD ledcounter = 1000;
55
56extern __bit gpif_acquiring;
57
58static void setup_endpoints(void)
59{
60 /* Setup EP2 (IN). */
61 EP2CFG = (1 << 7) | /* EP is valid/activated */
62 (1 << 6) | /* EP direction: IN */
63 (1 << 5) | (0 << 4) | /* EP Type: bulk */
64 (1 << 3) | /* EP buffer size: 1024 */
65 (0 << 2) | /* Reserved. */
66 (0 << 1) | (0 << 0); /* EP buffering: quad buffering */
67 SYNCDELAY();
68
69 /* Disable all other EPs (EP1, EP4, EP6, and EP8). */
70 EP1INCFG &= ~bmVALID;
71 SYNCDELAY();
72 EP1OUTCFG &= ~bmVALID;
73 SYNCDELAY();
74 EP4CFG &= ~bmVALID;
75 SYNCDELAY();
76 EP6CFG &= ~bmVALID;
77 SYNCDELAY();
78 EP8CFG &= ~bmVALID;
79 SYNCDELAY();
80
81 /* EP2: Reset the FIFOs. */
82 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
83 RESETFIFO(0x02)
84
85 /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */
86 EP2FIFOCFG = bmAUTOIN;
87 SYNCDELAY();
88
89 /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */
90 EP2AUTOINLENH = 0x02;
91 SYNCDELAY();
92 EP2AUTOINLENL = 0x00;
93 SYNCDELAY();
94
95 /* EP2: Set the GPIF flag to 'full'. */
96 EP2GPIFFLGSEL = (1 << 1) | (0 << 1);
97 SYNCDELAY();
98}
99
100static void send_fw_version(void)
101{
102 /* Populate the buffer. */
103 struct version_info *const vi = (struct version_info *)EP0BUF;
104 vi->major = FX2LAFW_VERSION_MAJOR;
105 vi->minor = FX2LAFW_VERSION_MINOR;
106
107 /* Send the message. */
108 EP0BCH = 0;
109 EP0BCL = sizeof(struct version_info);
110}
111
112static void send_revid_version(void)
113{
114 uint8_t *p;
115
116 /* Populate the buffer. */
117 p = (uint8_t *)EP0BUF;
118 *p = REVID;
119
120 /* Send the message. */
121 EP0BCH = 0;
122 EP0BCL = 1;
123}
124
125BOOL handle_vendorcommand(BYTE cmd)
126{
127 /* Protocol implementation */
128 switch (cmd) {
129 case CMD_START:
130 vendor_command = cmd;
131 EP0BCL = 0;
132 return TRUE;
133 case CMD_GET_FW_VERSION:
134 send_fw_version();
135 return TRUE;
136 case CMD_GET_REVID_VERSION:
137 send_revid_version();
138 return TRUE;
139 }
140
141 return FALSE;
142}
143
144BOOL handle_get_interface(BYTE ifc, BYTE *alt_ifc)
145{
146 /* We only support interface 0, alternate interface 0. */
147 if (ifc != 0)
148 return FALSE;
149
150 *alt_ifc = 0;
151 return TRUE;
152}
153
154BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
155{
156 /* We only support interface 0, alternate interface 0. */
157 if (ifc != 0 || alt_ifc != 0)
158 return FALSE;
159
160 /* Perform procedure from TRM, section 2.3.7: */
161
162 /* (1) TODO. */
163
164 /* (2) Reset data toggles of the EPs in the interface. */
165 /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
166 RESETTOGGLE(0x82);
167
168 /* (3) Restore EPs to their default conditions. */
169 /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
170 RESETFIFO(0x02);
171 /* TODO */
172
173 /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
174
175 return TRUE;
176}
177
178BYTE handle_get_configuration(void)
179{
180 /* We only support configuration 1. */
181 return 1;
182}
183
184BOOL handle_set_configuration(BYTE cfg)
185{
186 /* We only support configuration 1. */
187 return (cfg == 1) ? TRUE : FALSE;
188}
189
190void sudav_isr(void) __interrupt SUDAV_ISR
191{
192 got_sud = TRUE;
193 CLEAR_SUDAV();
194}
195
196void usbreset_isr(void) __interrupt USBRESET_ISR
197{
198 handle_hispeed(FALSE);
199 CLEAR_USBRESET();
200}
201
202void hispeed_isr(void) __interrupt HISPEED_ISR
203{
204 handle_hispeed(TRUE);
205 CLEAR_HISPEED();
206}
207
208void timer2_isr(void) __interrupt TF2_ISR
209{
210 /* Blink LED during acquisition, keep it on otherwise. */
211 if (gpif_acquiring) {
212 if (--ledcounter == 0) {
213 PA1 = !PA1;
214 ledcounter = 1000;
215 }
216 } else {
217 PA1 = 1; /* LED on. */
218 }
219 TF2 = 0;
220}
221
222void fx2lafw_init(void)
223{
224 /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
225 REVCTL = bmNOAUTOARM | bmSKIPCOMMIT;
226
227 got_sud = FALSE;
228 vendor_command = 0;
229
230 /* Renumerate. */
231 RENUMERATE_UNCOND();
232
233 SETCPUFREQ(CLK_48M);
234
235 USE_USB_INTS();
236
237 /* TODO: Does the order of the following lines matter? */
238 ENABLE_SUDAV();
239 ENABLE_HISPEED();
240 ENABLE_USBRESET();
241
242 /* PA1 (LED) is an output. */
243 PORTACFG = 0;
244 OEA = (1 << 1);
245 PA1 = 1; /* LED on. */
246
247 /* Init timer2. */
248 RCAP2L = -500 & 0xff;
249 RCAP2H = (-500 & 0xff00) >> 8;
250 T2CON = 0;
251 ET2 = 1;
252 TR2 = 1;
253
254 /* Global (8051) interrupt enable. */
255 EA = 1;
256
257 /* Setup the endpoints. */
258 setup_endpoints();
259
260 /* Put the FX2 into GPIF master mode and setup the GPIF. */
261 gpif_init_la();
262}
263
264void fx2lafw_poll(void)
265{
266 if (got_sud) {
267 handle_setupdata();
268 got_sud = FALSE;
269 }
270
271 if (vendor_command) {
272 switch (vendor_command) {
273 case CMD_START:
274 if ((EP0CS & bmEPBUSY) != 0)
275 break;
276
277 if (EP0BCL == sizeof(struct cmd_start_acquisition)) {
278 gpif_acquisition_start(
279 (const struct cmd_start_acquisition *)EP0BUF);
280 }
281
282 /* Acknowledge the vendor command. */
283 vendor_command = 0;
284 break;
285 default:
286 /* Unimplemented command. */
287 vendor_command = 0;
288 break;
289 }
290 }
291
292 gpif_poll();
293}
294
295void main(void)
296{
297 fx2lafw_init();
298 while (1)
299 fx2lafw_poll();
300}