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d4eabea8 BV |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> | |
4ee1e2f3 AG |
5 | * Copyright (C) 2015 Google, Inc. |
6 | * (Written by Alexandru Gagniuc <mrnuke@google.com> for Google, Inc.) | |
d4eabea8 BV |
7 | * |
8 | * This program is free software: you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation, either version 3 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
20 | */ | |
21 | ||
22c18b03 | 22 | #include <string.h> |
ba464a12 | 23 | #include <strings.h> |
d4eabea8 BV |
24 | #include "protocol.h" |
25 | ||
26 | #define CH_IDX(x) (1 << x) | |
4264f1c0 | 27 | #define FREQ_DC_ONLY {0, 0, 0} |
d4eabea8 | 28 | |
22c18b03 BV |
29 | const char *pps_vendors[][2] = { |
30 | { "RIGOL TECHNOLOGIES", "Rigol" }, | |
bc4a2a46 | 31 | { "HEWLETT-PACKARD", "HP" }, |
c3eadb07 | 32 | { "PHILIPS", "Philips" }, |
4ee1e2f3 | 33 | { "Chroma ATE", "Chroma" }, |
5c9e56c9 | 34 | { "Agilent Technologies", "Agilent" }, |
d4eabea8 BV |
35 | }; |
36 | ||
22c18b03 BV |
37 | const char *get_vendor(const char *raw_vendor) |
38 | { | |
39 | unsigned int i; | |
40 | ||
41 | for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) { | |
42 | if (!strcasecmp(raw_vendor, pps_vendors[i][0])) | |
43 | return pps_vendors[i][1]; | |
44 | } | |
45 | ||
46 | return raw_vendor; | |
47 | } | |
48 | ||
584560f1 | 49 | static const uint32_t devopts_none[] = { }; |
bfc86799 | 50 | |
5c9e56c9 AG |
51 | /* Agilent/Keysight N5700A series */ |
52 | static const uint32_t agilent_n5700a_devopts[] = { | |
53 | SR_CONF_CONTINUOUS | SR_CONF_SET, | |
54 | }; | |
55 | ||
56 | static const uint32_t agilent_n5700a_devopts_cg[] = { | |
57 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
58 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
59 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
60 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, | |
61 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
62 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, | |
63 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
64 | }; | |
65 | ||
66 | const struct channel_spec agilent_n5767a_ch[] = { | |
67 | { "1", { 0, 60, 0.0001 }, { 0, 25, 0.1 } }, | |
68 | }; | |
69 | ||
70 | const struct channel_group_spec agilent_n5767a_cg[] = { | |
71 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, | |
72 | }; | |
73 | ||
74 | /* | |
75 | * TODO: OVER_CURRENT_PROTECTION_ACTIVE status can be determined by the OC bit | |
76 | * in STAT:QUES:EVEN?, but this is not implemented | |
77 | */ | |
78 | const struct scpi_command agilent_n5700a_cmd[] = { | |
79 | { SCPI_CMD_REMOTE, "SYST:COMM:RLST REM" }, | |
80 | { SCPI_CMD_LOCAL, "SYST:COMM:RLST LOC" }, | |
81 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
82 | { SCPI_CMD_GET_MEAS_CURRENT, "MEAS:CURR?" }, | |
83 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
84 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
85 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
86 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
87 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP:STAT?" }, | |
88 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
89 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
90 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT?" }, | |
91 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":VOLT:PROT %.6f" }, | |
92 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":CURR:PROT:STAT?" }, | |
93 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":CURR:PROT:STAT ON?"}, | |
94 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":CURR:PROT:STAT OFF?"}, | |
95 | /* Current limit (CC mode) and OCP are set using the same cmd. sad */ | |
96 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR?" }, | |
97 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR %.6f" }, | |
98 | }; | |
99 | ||
4ee1e2f3 AG |
100 | /* Chroma 61600 series AC source */ |
101 | static const uint32_t chroma_61604_devopts[] = { | |
102 | SR_CONF_CONTINUOUS | SR_CONF_SET, | |
103 | }; | |
104 | ||
105 | static const uint32_t chroma_61604_devopts_cg[] = { | |
106 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
107 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
108 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, | |
109 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
6c0c9dd2 AG |
110 | SR_CONF_OUTPUT_FREQUENCY | SR_CONF_GET, |
111 | SR_CONF_OUTPUT_FREQUENCY_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
4ee1e2f3 AG |
112 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, |
113 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
114 | }; | |
115 | ||
116 | const struct channel_spec chroma_61604_ch[] = { | |
6c0c9dd2 | 117 | { "1", { 0, 300, 0.1 }, { 0, 16, 0.1 }, { 1.0, 1000.0, 0.01 } }, |
4ee1e2f3 AG |
118 | }; |
119 | ||
120 | const struct channel_group_spec chroma_61604_cg[] = { | |
121 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, | |
122 | }; | |
123 | ||
124 | const struct scpi_command chroma_61604_cmd[] = { | |
125 | { SCPI_CMD_REMOTE, "SYST:REM" }, | |
126 | { SCPI_CMD_LOCAL, "SYST:LOC" }, | |
127 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":FETC:VOLT:ACDC?" }, | |
6c0c9dd2 | 128 | { SCPI_CMD_GET_MEAS_FREQUENCY, ":FETC:FREQ?" }, |
4ee1e2f3 AG |
129 | { SCPI_CMD_GET_MEAS_CURRENT, ":FETC:CURR:AC?" }, |
130 | { SCPI_CMD_GET_MEAS_POWER, ":FETC:POW:AC?" }, | |
131 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT:AC?" }, | |
132 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT:AC %.1f" }, | |
6c0c9dd2 AG |
133 | { SCPI_CMD_GET_FREQUENCY_TARGET, ":SOUR:FREQ?" }, |
134 | { SCPI_CMD_SET_FREQUENCY_TARGET, ":SOUR:FREQ %.2f" }, | |
4ee1e2f3 AG |
135 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, |
136 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
137 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
138 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC?" }, | |
139 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:LIM:AC %.1f" }, | |
140 | /* This is not a current limit mode. It is overcurrent protection */ | |
141 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM?" }, | |
142 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":SOUR:CURR:LIM %.2f" }, | |
143 | }; | |
144 | ||
d4eabea8 | 145 | /* Rigol DP800 series */ |
584560f1 | 146 | static const uint32_t rigol_dp800_devopts[] = { |
9d9cf1c4 | 147 | SR_CONF_CONTINUOUS | SR_CONF_SET, |
5827f61b | 148 | SR_CONF_OVER_TEMPERATURE_PROTECTION | SR_CONF_GET | SR_CONF_SET, |
d4eabea8 BV |
149 | }; |
150 | ||
584560f1 | 151 | static const uint32_t rigol_dp800_devopts_cg[] = { |
5827f61b BV |
152 | SR_CONF_OUTPUT_REGULATION | SR_CONF_GET, |
153 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
154 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, | |
155 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
156 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
157 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, | |
158 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
159 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, | |
ca95e90f | 160 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
5827f61b | 161 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, |
ca95e90f | 162 | SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
5827f61b | 163 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, |
d4eabea8 BV |
164 | }; |
165 | ||
329733d9 | 166 | const struct channel_spec rigol_dp821a_ch[] = { |
4264f1c0 AG |
167 | { "1", { 0, 60, 0.001 }, { 0, 1, 0.0001 }, FREQ_DC_ONLY }, |
168 | { "2", { 0, 8, 0.001 }, { 0, 10, 0.001 }, FREQ_DC_ONLY }, | |
cfcdf576 ML |
169 | }; |
170 | ||
329733d9 | 171 | const struct channel_spec rigol_dp831_ch[] = { |
4264f1c0 AG |
172 | { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 }, FREQ_DC_ONLY }, |
173 | { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY }, | |
174 | { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 }, FREQ_DC_ONLY }, | |
d4eabea8 BV |
175 | }; |
176 | ||
329733d9 | 177 | const struct channel_spec rigol_dp832_ch[] = { |
4264f1c0 AG |
178 | { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY }, |
179 | { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY }, | |
180 | { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 }, FREQ_DC_ONLY }, | |
3222ee10 BV |
181 | }; |
182 | ||
329733d9 | 183 | const struct channel_group_spec rigol_dp820_cg[] = { |
cfcdf576 ML |
184 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
185 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
186 | }; | |
187 | ||
329733d9 | 188 | const struct channel_group_spec rigol_dp830_cg[] = { |
d4eabea8 BV |
189 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
190 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
191 | { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, | |
192 | }; | |
193 | ||
329733d9 | 194 | const struct scpi_command rigol_dp800_cmd[] = { |
60475cd7 BV |
195 | { SCPI_CMD_REMOTE, "SYST:REMOTE" }, |
196 | { SCPI_CMD_LOCAL, "SYST:LOCAL" }, | |
ee2860ee BV |
197 | { SCPI_CMD_BEEPER, "SYST:BEEP:STAT?" }, |
198 | { SCPI_CMD_BEEPER_ENABLE, "SYST:BEEP:STAT ON" }, | |
199 | { SCPI_CMD_BEEPER_DISABLE, "SYST:BEEP:STAT OFF" }, | |
60475cd7 BV |
200 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, |
201 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
202 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
203 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE?" }, | |
204 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
205 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
206 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
207 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
208 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, | |
209 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
210 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
211 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE?" }, | |
d4eabea8 | 212 | { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, |
53a81803 BV |
213 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_ENABLE, ":SYST:OTP ON" }, |
214 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION_DISABLE, ":SYST:OTP OFF" }, | |
60475cd7 BV |
215 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP?" }, |
216 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLE, ":OUTP:OVP ON" }, | |
217 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_DISABLE, ":OUTP:OVP OFF" }, | |
218 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES?" }, | |
219 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL?" }, | |
220 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL %.6f" }, | |
221 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP?" }, | |
222 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":OUTP:OCP:STAT ON" }, | |
223 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":OUTP:OCP:STAT OFF" }, | |
224 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES?" }, | |
225 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL?" }, | |
226 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL %.6f" }, | |
d4eabea8 BV |
227 | }; |
228 | ||
bfc86799 | 229 | /* HP 663xx series */ |
584560f1 | 230 | static const uint32_t hp_6632b_devopts[] = { |
9d9cf1c4 | 231 | SR_CONF_CONTINUOUS | SR_CONF_SET, |
5827f61b BV |
232 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, |
233 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, | |
234 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, | |
ca95e90f BV |
235 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, |
236 | SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
bc4a2a46 BV |
237 | }; |
238 | ||
329733d9 | 239 | const struct channel_spec hp_6632b_ch[] = { |
4264f1c0 | 240 | { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 }, FREQ_DC_ONLY }, |
bc4a2a46 BV |
241 | }; |
242 | ||
329733d9 | 243 | const struct channel_group_spec hp_6632b_cg[] = { |
bc4a2a46 BV |
244 | { "1", CH_IDX(0), 0 }, |
245 | }; | |
246 | ||
329733d9 | 247 | const struct scpi_command hp_6632b_cmd[] = { |
bc4a2a46 | 248 | { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" }, |
53a81803 BV |
249 | { SCPI_CMD_SET_OUTPUT_ENABLE, "OUTP:STAT ON" }, |
250 | { SCPI_CMD_SET_OUTPUT_DISABLE, "OUTP:STAT OFF" }, | |
bc4a2a46 BV |
251 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, |
252 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
ca95e90f BV |
253 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, |
254 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
255 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
256 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
bc4a2a46 BV |
257 | }; |
258 | ||
c3eadb07 | 259 | /* Philips/Fluke PM2800 series */ |
9d9cf1c4 BV |
260 | static const uint32_t philips_pm2800_devopts[] = { |
261 | SR_CONF_CONTINUOUS | SR_CONF_SET, | |
262 | }; | |
263 | ||
c3eadb07 BV |
264 | static const uint32_t philips_pm2800_devopts_cg[] = { |
265 | SR_CONF_OUTPUT_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
266 | SR_CONF_OUTPUT_VOLTAGE | SR_CONF_GET, | |
267 | SR_CONF_OUTPUT_VOLTAGE_TARGET | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
268 | SR_CONF_OUTPUT_CURRENT | SR_CONF_GET, | |
269 | SR_CONF_OUTPUT_CURRENT_LIMIT | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, | |
270 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE | SR_CONF_GET, | |
271 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD | SR_CONF_GET | SR_CONF_SET, | |
272 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED | SR_CONF_GET | SR_CONF_SET, | |
273 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE | SR_CONF_GET, | |
274 | SR_CONF_OUTPUT_REGULATION | SR_CONF_GET, | |
275 | }; | |
276 | ||
277 | enum philips_pm2800_modules { | |
278 | PM2800_MOD_30V_10A = 1, | |
279 | PM2800_MOD_60V_5A, | |
280 | PM2800_MOD_60V_10A, | |
281 | PM2800_MOD_8V_15A, | |
282 | PM2800_MOD_60V_2A, | |
283 | PM2800_MOD_120V_1A, | |
284 | }; | |
285 | ||
329733d9 | 286 | static const struct philips_pm2800_module_spec { |
c3eadb07 BV |
287 | /* Min, max, programming resolution. */ |
288 | float voltage[3]; | |
289 | float current[3]; | |
290 | } philips_pm2800_module_specs[] = { | |
291 | /* Autoranging modules. */ | |
292 | [PM2800_MOD_30V_10A] = { { 0, 30, 0.0075 }, { 0, 10, 0.0025 } }, | |
293 | [PM2800_MOD_60V_5A] = { { 0, 60, 0.015 }, { 0, 5, 0.00125 } }, | |
294 | [PM2800_MOD_60V_10A] = { { 0, 60, 0.015 }, { 0, 10, 0.0025 } }, | |
295 | /* Linear modules. */ | |
296 | [PM2800_MOD_8V_15A] = { { 0, 8, 0.002 }, { -15, 15, 0.00375 } }, | |
297 | [PM2800_MOD_60V_2A] = { { 0, 60, 0.015 }, { -2, 2, 0.0005 } }, | |
298 | [PM2800_MOD_120V_1A] = { { 0, 120, 0.030 }, { -1, 1, 0.00025 } }, | |
299 | }; | |
300 | ||
329733d9 | 301 | static const struct philips_pm2800_model { |
c3eadb07 BV |
302 | unsigned int chassis; |
303 | unsigned int num_modules; | |
304 | unsigned int set; | |
305 | unsigned int modules[3]; | |
306 | } philips_pm2800_matrix[] = { | |
307 | /* Autoranging chassis. */ | |
308 | { 1, 1, 0, { PM2800_MOD_30V_10A, 0, 0 } }, | |
309 | { 1, 1, 1, { PM2800_MOD_60V_5A, 0, 0 } }, | |
310 | { 1, 2, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, 0 } }, | |
311 | { 1, 2, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, 0 } }, | |
312 | { 1, 2, 2, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, 0 } }, | |
313 | { 1, 2, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_10A, 0 } }, | |
314 | { 1, 2, 4, { PM2800_MOD_60V_5A, PM2800_MOD_60V_10A, 0 } }, | |
315 | { 1, 3, 0, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_30V_10A } }, | |
316 | { 1, 3, 1, { PM2800_MOD_60V_5A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } }, | |
317 | { 1, 3, 2, { PM2800_MOD_30V_10A, PM2800_MOD_30V_10A, PM2800_MOD_60V_5A } }, | |
318 | { 1, 3, 3, { PM2800_MOD_30V_10A, PM2800_MOD_60V_5A, PM2800_MOD_60V_5A } }, | |
319 | /* Linear chassis. */ | |
320 | { 3, 1, 0, { PM2800_MOD_60V_2A, 0, 0 } }, | |
321 | { 3, 1, 1, { PM2800_MOD_120V_1A, 0, 0 } }, | |
322 | { 3, 1, 2, { PM2800_MOD_8V_15A, 0, 0 } }, | |
323 | { 3, 2, 0, { PM2800_MOD_60V_2A, 0, 0 } }, | |
324 | { 3, 2, 1, { PM2800_MOD_120V_1A, 0, 0 } }, | |
325 | { 3, 2, 2, { PM2800_MOD_60V_2A, PM2800_MOD_120V_1A, 0 } }, | |
326 | { 3, 2, 3, { PM2800_MOD_8V_15A, PM2800_MOD_8V_15A, 0 } }, | |
327 | }; | |
328 | ||
329733d9 | 329 | static const char *philips_pm2800_names[] = { "1", "2", "3" }; |
c3eadb07 BV |
330 | |
331 | static int philips_pm2800_probe_channels(struct sr_dev_inst *sdi, | |
332 | struct sr_scpi_hw_info *hw_info, | |
333 | struct channel_spec **channels, unsigned int *num_channels, | |
334 | struct channel_group_spec **channel_groups, unsigned int *num_channel_groups) | |
335 | { | |
329733d9 UH |
336 | const struct philips_pm2800_model *model; |
337 | const struct philips_pm2800_module_spec *spec; | |
c3eadb07 BV |
338 | unsigned int chassis, num_modules, set, module, m, i; |
339 | ||
340 | (void)sdi; | |
341 | ||
342 | /* | |
343 | * The model number as reported by *IDN? looks like e.g. PM2813/11, | |
344 | * Where "PM28" is fixed, followed by the chassis code (1 = autoranging, | |
345 | * 3 = linear series) and the number of modules: 1-3 for autoranging, | |
346 | * 1-2 for linear. | |
347 | * After the slash, the first digit denotes the module set. The | |
348 | * digit after that denotes front (5) or rear (1) binding posts. | |
349 | */ | |
350 | chassis = hw_info->model[4] - 0x30; | |
351 | num_modules = hw_info->model[5] - 0x30; | |
352 | set = hw_info->model[7] - 0x30; | |
353 | for (m = 0; m < ARRAY_SIZE(philips_pm2800_matrix); m++) { | |
354 | model = &philips_pm2800_matrix[m]; | |
355 | if (model->chassis == chassis && model->num_modules == num_modules | |
356 | && model->set == set) | |
357 | break; | |
358 | } | |
359 | if (m == ARRAY_SIZE(philips_pm2800_matrix)) { | |
360 | sr_dbg("Model %s not found in matrix.", hw_info->model); | |
361 | return SR_ERR; | |
362 | } | |
363 | ||
364 | sr_dbg("Found %d output channel%s:", num_modules, num_modules > 1 ? "s" : ""); | |
365 | *channels = g_malloc0(sizeof(struct channel_spec) * num_modules); | |
366 | *channel_groups = g_malloc0(sizeof(struct channel_group_spec) * num_modules); | |
367 | for (i = 0; i < num_modules; i++) { | |
368 | module = model->modules[i]; | |
369 | spec = &philips_pm2800_module_specs[module]; | |
370 | sr_dbg("output %d: %.0f - %.0fV, %.0f - %.0fA", i + 1, | |
371 | spec->voltage[0], spec->voltage[1], | |
372 | spec->current[0], spec->current[1]); | |
329733d9 | 373 | (*channels)[i].name = (char *)philips_pm2800_names[i]; |
c3eadb07 | 374 | memcpy(&((*channels)[i].voltage), spec, sizeof(float) * 6); |
329733d9 | 375 | (*channel_groups)[i].name = (char *)philips_pm2800_names[i]; |
c3eadb07 BV |
376 | (*channel_groups)[i].channel_index_mask = 1 << i; |
377 | (*channel_groups)[i].features = PPS_OTP | PPS_OVP | PPS_OCP; | |
378 | } | |
379 | *num_channels = *num_channel_groups = num_modules; | |
380 | ||
381 | return SR_OK; | |
382 | } | |
383 | ||
329733d9 | 384 | const struct scpi_command philips_pm2800_cmd[] = { |
c3eadb07 BV |
385 | { SCPI_CMD_SELECT_CHANNEL, ":INST:NSEL %s" }, |
386 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
387 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
388 | { SCPI_CMD_GET_VOLTAGE_TARGET, ":SOUR:VOLT?" }, | |
389 | { SCPI_CMD_SET_VOLTAGE_TARGET, ":SOUR:VOLT %.6f" }, | |
390 | { SCPI_CMD_GET_CURRENT_LIMIT, ":SOUR:CURR?" }, | |
391 | { SCPI_CMD_SET_CURRENT_LIMIT, ":SOUR:CURR %.6f" }, | |
392 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP?" }, | |
393 | { SCPI_CMD_SET_OUTPUT_ENABLE, ":OUTP ON" }, | |
394 | { SCPI_CMD_SET_OUTPUT_DISABLE, ":OUTP OFF" }, | |
395 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":SOUR:FUNC:MODE?" }, | |
396 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":SOUR:VOLT:PROT:TRIP?" }, | |
397 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV?" }, | |
398 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":SOUR:VOLT:PROT:LEV %.6f" }, | |
399 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":SOUR:CURR:PROT:STAT?" }, | |
400 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLE, ":SOUR:CURR:PROT:STAT ON" }, | |
401 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_DISABLE, ":SOUR:CURR:PROT:STAT OFF" }, | |
402 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":SOUR:CURR:PROT:TRIP?" }, | |
403 | }; | |
404 | ||
d4eabea8 | 405 | SR_PRIV const struct scpi_pps pps_profiles[] = { |
5c9e56c9 AG |
406 | /* Agilent N5767A */ |
407 | { "Agilent", "N5767A", 0, | |
408 | ARRAY_AND_SIZE(agilent_n5700a_devopts), | |
409 | ARRAY_AND_SIZE(agilent_n5700a_devopts_cg), | |
410 | ARRAY_AND_SIZE(agilent_n5767a_ch), | |
411 | ARRAY_AND_SIZE(agilent_n5767a_cg), | |
412 | ARRAY_AND_SIZE(agilent_n5700a_cmd), | |
413 | .probe_channels = NULL, | |
414 | }, | |
4ee1e2f3 AG |
415 | /* Chroma 61604 */ |
416 | { "Chroma", "61604", 0, | |
417 | ARRAY_AND_SIZE(chroma_61604_devopts), | |
418 | ARRAY_AND_SIZE(chroma_61604_devopts_cg), | |
419 | ARRAY_AND_SIZE(chroma_61604_ch), | |
420 | ARRAY_AND_SIZE(chroma_61604_cg), | |
421 | ARRAY_AND_SIZE(chroma_61604_cmd), | |
422 | .probe_channels = NULL, | |
423 | }, | |
bc4a2a46 BV |
424 | /* HP 6632B */ |
425 | { "HP", "6632B", 0, | |
426 | ARRAY_AND_SIZE(hp_6632b_devopts), | |
bfc86799 | 427 | ARRAY_AND_SIZE(devopts_none), |
bc4a2a46 BV |
428 | ARRAY_AND_SIZE(hp_6632b_ch), |
429 | ARRAY_AND_SIZE(hp_6632b_cg), | |
430 | ARRAY_AND_SIZE(hp_6632b_cmd), | |
c3eadb07 | 431 | .probe_channels = NULL, |
bc4a2a46 BV |
432 | }, |
433 | ||
d4eabea8 | 434 | /* Rigol DP800 series */ |
cfcdf576 ML |
435 | { "Rigol", "^DP821A$", PPS_OTP, |
436 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
437 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
438 | ARRAY_AND_SIZE(rigol_dp821a_ch), | |
439 | ARRAY_AND_SIZE(rigol_dp820_cg), | |
440 | ARRAY_AND_SIZE(rigol_dp800_cmd), | |
441 | .probe_channels = NULL, | |
442 | }, | |
3222ee10 BV |
443 | { "Rigol", "^DP831A$", PPS_OTP, |
444 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
445 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
446 | ARRAY_AND_SIZE(rigol_dp831_ch), | |
cfcdf576 | 447 | ARRAY_AND_SIZE(rigol_dp830_cg), |
3222ee10 | 448 | ARRAY_AND_SIZE(rigol_dp800_cmd), |
c3eadb07 | 449 | .probe_channels = NULL, |
3222ee10 BV |
450 | }, |
451 | { "Rigol", "^(DP832|DP832A)$", PPS_OTP, | |
452 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
453 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
454 | ARRAY_AND_SIZE(rigol_dp832_ch), | |
cfcdf576 | 455 | ARRAY_AND_SIZE(rigol_dp830_cg), |
3222ee10 | 456 | ARRAY_AND_SIZE(rigol_dp800_cmd), |
c3eadb07 BV |
457 | .probe_channels = NULL, |
458 | }, | |
459 | ||
460 | /* Philips/Fluke PM2800 series */ | |
461 | { "Philips", "^PM28[13][123]/[01234]{1,2}$", 0, | |
9d9cf1c4 | 462 | ARRAY_AND_SIZE(philips_pm2800_devopts), |
c3eadb07 BV |
463 | ARRAY_AND_SIZE(philips_pm2800_devopts_cg), |
464 | NULL, 0, | |
465 | NULL, 0, | |
466 | ARRAY_AND_SIZE(philips_pm2800_cmd), | |
467 | philips_pm2800_probe_channels, | |
d4eabea8 BV |
468 | }, |
469 | }; | |
d4eabea8 | 470 | |
1beccaed | 471 | SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); |