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d4eabea8 BV |
1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
22c18b03 | 20 | #include <string.h> |
d4eabea8 BV |
21 | #include "protocol.h" |
22 | ||
23 | #define CH_IDX(x) (1 << x) | |
24 | ||
22c18b03 BV |
25 | const char *pps_vendors[][2] = { |
26 | { "RIGOL TECHNOLOGIES", "Rigol" }, | |
bc4a2a46 | 27 | { "HEWLETT-PACKARD", "HP" }, |
d4eabea8 BV |
28 | }; |
29 | ||
22c18b03 BV |
30 | const char *get_vendor(const char *raw_vendor) |
31 | { | |
32 | unsigned int i; | |
33 | ||
34 | for (i = 0; i < ARRAY_SIZE(pps_vendors); i++) { | |
35 | if (!strcasecmp(raw_vendor, pps_vendors[i][0])) | |
36 | return pps_vendors[i][1]; | |
37 | } | |
38 | ||
39 | return raw_vendor; | |
40 | } | |
41 | ||
d4eabea8 | 42 | /* Rigol DP800 series */ |
3222ee10 | 43 | static const int32_t rigol_dp800_devopts[] = { |
d4eabea8 BV |
44 | SR_CONF_POWER_SUPPLY, |
45 | SR_CONF_CONTINUOUS, | |
46 | SR_CONF_OVER_TEMPERATURE_PROTECTION, | |
47 | }; | |
48 | ||
3222ee10 | 49 | static const int32_t rigol_dp800_devopts_cg[] = { |
d4eabea8 BV |
50 | SR_CONF_OUTPUT_REGULATION, |
51 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED, | |
52 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE, | |
53 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD, | |
54 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED, | |
55 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE, | |
56 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD, | |
57 | SR_CONF_OUTPUT_VOLTAGE, | |
58 | SR_CONF_OUTPUT_VOLTAGE_MAX, | |
59 | SR_CONF_OUTPUT_CURRENT, | |
60 | SR_CONF_OUTPUT_CURRENT_MAX, | |
61 | SR_CONF_OUTPUT_ENABLED, | |
62 | }; | |
63 | ||
3222ee10 BV |
64 | struct channel_spec rigol_dp831_ch[] = { |
65 | { "1", { 0, 8, 0.001 }, { 0, 5, 0.0003 } }, | |
66 | { "2", { 0, 30, 0.001 }, { 0, 2, 0.0001 } }, | |
67 | { "3", { 0, -30, 0.001 }, { 0, 2, 0.0001 } }, | |
d4eabea8 BV |
68 | }; |
69 | ||
3222ee10 BV |
70 | struct channel_spec rigol_dp832_ch[] = { |
71 | { "1", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, | |
72 | { "2", { 0, 30, 0.001 }, { 0, 3, 0.001 } }, | |
73 | { "3", { 0, 5, 0.001 }, { 0, 3, 0.001 } }, | |
74 | }; | |
75 | ||
76 | struct channel_group_spec rigol_dp800_cg[] = { | |
d4eabea8 BV |
77 | { "1", CH_IDX(0), PPS_OVP | PPS_OCP }, |
78 | { "2", CH_IDX(1), PPS_OVP | PPS_OCP }, | |
79 | { "3", CH_IDX(2), PPS_OVP | PPS_OCP }, | |
80 | }; | |
81 | ||
3222ee10 | 82 | struct scpi_command rigol_dp800_cmd[] = { |
d4eabea8 BV |
83 | { SCPI_CMD_KEY_UNLOCK, "SYST:KLOCK OFF" }, |
84 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT? CH%s" }, | |
85 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR? CH%s" }, | |
86 | { SCPI_CMD_GET_MEAS_POWER, ":MEAS:POWE? CH%s" }, | |
87 | { SCPI_CMD_GET_VOLTAGE_MAX, ":SOUR%s:VOLT?" }, | |
88 | { SCPI_CMD_SET_VOLTAGE_MAX, ":SOUR%s:VOLT %.6f" }, | |
89 | { SCPI_CMD_GET_CURRENT_MAX, ":SOUR%s:CURR?" }, | |
90 | { SCPI_CMD_SET_CURRENT_MAX, ":SOUR%s:CURR %.6f" }, | |
91 | { SCPI_CMD_GET_OUTPUT_ENABLED, ":OUTP? CH%s" }, | |
92 | { SCPI_CMD_SET_OUTPUT_ENABLED, ":OUTP CH%s,%s" }, | |
93 | { SCPI_CMD_GET_OUTPUT_REGULATION, ":OUTP:MODE? CH%s" }, | |
94 | { SCPI_CMD_GET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP?" }, | |
95 | { SCPI_CMD_SET_OVER_TEMPERATURE_PROTECTION, ":SYST:OTP %s" }, | |
96 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP? CH%s" }, | |
97 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_ENABLED, ":OUTP:OVP CH%s,%s" }, | |
98 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_ACTIVE, ":OUTP:OVP:QUES? CH%s" }, | |
99 | { SCPI_CMD_GET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL? CH%s" }, | |
100 | { SCPI_CMD_SET_OVER_VOLTAGE_PROTECTION_THRESHOLD, ":OUTP:OVP:VAL CH%s,%.6f" }, | |
101 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP? CH%s" }, | |
102 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_ENABLED, ":OUTP:OCP CH%s,%s" }, | |
103 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_ACTIVE, ":OUTP:OCP:QUES? CH%s" }, | |
104 | { SCPI_CMD_GET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL? CH%s" }, | |
105 | { SCPI_CMD_SET_OVER_CURRENT_PROTECTION_THRESHOLD, ":OUTP:OCP:VAL CH%s,%.6f" }, | |
106 | }; | |
107 | ||
bc4a2a46 BV |
108 | /* HP 663x series */ |
109 | static const int32_t hp_6632b_devopts[] = { | |
110 | SR_CONF_POWER_SUPPLY, | |
111 | SR_CONF_CONTINUOUS, | |
112 | SR_CONF_OUTPUT_ENABLED, | |
113 | SR_CONF_OUTPUT_VOLTAGE, | |
114 | SR_CONF_OUTPUT_CURRENT, | |
115 | SR_CONF_OUTPUT_VOLTAGE_MAX, | |
116 | SR_CONF_OUTPUT_CURRENT_MAX, | |
117 | // SR_CONF_OVER_TEMPERATURE_PROTECTION, | |
118 | }; | |
119 | ||
120 | static const int32_t hp_6632b_devopts_cg[] = { | |
121 | /* | |
122 | SR_CONF_OVER_CURRENT_PROTECTION_ENABLED, | |
123 | SR_CONF_OVER_VOLTAGE_PROTECTION_THRESHOLD, | |
124 | SR_CONF_OUTPUT_REGULATION, | |
125 | SR_CONF_OVER_VOLTAGE_PROTECTION_ENABLED, | |
126 | SR_CONF_OVER_VOLTAGE_PROTECTION_ACTIVE, | |
127 | SR_CONF_OVER_CURRENT_PROTECTION_ACTIVE, | |
128 | SR_CONF_OVER_CURRENT_PROTECTION_THRESHOLD, | |
129 | */ | |
130 | }; | |
131 | ||
132 | struct channel_spec hp_6632b_ch[] = { | |
133 | { "1", { 0, 20.475, 0.005 }, { 0, 5.1188, 0.00132 } }, | |
134 | }; | |
135 | ||
136 | struct channel_group_spec hp_6632b_cg[] = { | |
137 | { "1", CH_IDX(0), 0 }, | |
138 | }; | |
139 | ||
140 | struct scpi_command hp_6632b_cmd[] = { | |
141 | { SCPI_CMD_GET_OUTPUT_ENABLED, "OUTP:STAT?" }, | |
142 | { SCPI_CMD_SET_OUTPUT_ENABLED, "OUTP:STAT %s" }, | |
143 | { SCPI_CMD_GET_MEAS_VOLTAGE, ":MEAS:VOLT?" }, | |
144 | { SCPI_CMD_GET_MEAS_CURRENT, ":MEAS:CURR?" }, | |
145 | { SCPI_CMD_GET_VOLTAGE_MAX, ":SOUR:VOLT?" }, | |
146 | { SCPI_CMD_SET_VOLTAGE_MAX, ":SOUR:VOLT %.6f" }, | |
147 | { SCPI_CMD_GET_CURRENT_MAX, ":SOUR:CURR?" }, | |
148 | { SCPI_CMD_SET_CURRENT_MAX, ":SOUR:CURR %.6f" }, | |
149 | }; | |
150 | ||
151 | ||
d4eabea8 | 152 | SR_PRIV const struct scpi_pps pps_profiles[] = { |
bc4a2a46 BV |
153 | /* HP 6632B */ |
154 | { "HP", "6632B", 0, | |
155 | ARRAY_AND_SIZE(hp_6632b_devopts), | |
156 | ARRAY_AND_SIZE(hp_6632b_devopts_cg), | |
157 | ARRAY_AND_SIZE(hp_6632b_ch), | |
158 | ARRAY_AND_SIZE(hp_6632b_cg), | |
159 | ARRAY_AND_SIZE(hp_6632b_cmd), | |
160 | }, | |
161 | ||
d4eabea8 | 162 | /* Rigol DP800 series */ |
3222ee10 BV |
163 | { "Rigol", "^DP831A$", PPS_OTP, |
164 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
165 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
166 | ARRAY_AND_SIZE(rigol_dp831_ch), | |
167 | ARRAY_AND_SIZE(rigol_dp800_cg), | |
168 | ARRAY_AND_SIZE(rigol_dp800_cmd), | |
169 | }, | |
170 | { "Rigol", "^(DP832|DP832A)$", PPS_OTP, | |
171 | ARRAY_AND_SIZE(rigol_dp800_devopts), | |
172 | ARRAY_AND_SIZE(rigol_dp800_devopts_cg), | |
173 | ARRAY_AND_SIZE(rigol_dp832_ch), | |
174 | ARRAY_AND_SIZE(rigol_dp800_cg), | |
175 | ARRAY_AND_SIZE(rigol_dp800_cmd), | |
d4eabea8 BV |
176 | }, |
177 | }; | |
178 | SR_PRIV unsigned int num_pps_profiles = ARRAY_SIZE(pps_profiles); | |
179 |