]> sigrok.org Git - libsigrok.git/blame - src/hardware/pipistrello-ols/api.c
Remove unnecessary std_init() wrapper functions
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
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4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
4bd80e12 21#include "protocol.h"
22
f254bc4b 23static const uint32_t devopts[] = {
4bd80e12 24 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 33};
34
acc885c7
BV
35static const int32_t trigger_matches[] = {
36 SR_TRIGGER_ZERO,
37 SR_TRIGGER_ONE,
38 SR_TRIGGER_RISING,
39 SR_TRIGGER_FALLING,
40};
41
4bd80e12 42#define STR_PATTERN_NONE "None"
43#define STR_PATTERN_EXTERNAL "External"
44#define STR_PATTERN_INTERNAL "Internal"
45
46/* Supported methods of test pattern outputs */
47enum {
48 /**
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
51 */
52 PATTERN_EXTERNAL,
53
54 /** Route test pattern internally to capture buffer. */
55 PATTERN_INTERNAL,
56};
57
58static const char *patterns[] = {
59 STR_PATTERN_NONE,
60 STR_PATTERN_EXTERNAL,
61 STR_PATTERN_INTERNAL,
62};
63
64/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 65SR_PRIV const char *p_ols_channel_names[] = {
4bd80e12 66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
4bd80e12 69};
70
71/* Default supported samplerates, can be overridden by device metadata. */
72static const uint64_t samplerates[] = {
73 SR_HZ(10),
74 SR_MHZ(200),
75 SR_HZ(1),
76};
77
78SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 79
4f840ce9 80static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 81{
82 struct sr_dev_inst *sdi;
83 struct drv_context *drvc;
84 struct dev_context *devc;
85 GSList *devices;
86 int ret, i;
87 char buf[70];
88 int bytes_read;
89
90 (void)options;
91
41812aca 92 drvc = di->context;
4bd80e12 93
94 devices = NULL;
95
96 /* Allocate memory for our private device context. */
f57d8ffe 97 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 98
99 /* Device-specific settings */
b94cff40 100 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 101
102 /* Acquisition settings */
103 devc->limit_samples = devc->capture_ratio = 0;
104 devc->trigger_at = -1;
105 devc->channel_mask = 0xffffffff;
106 devc->flag_reg = 0;
107
108 /* Allocate memory for the incoming ftdi data. */
a95f142e 109 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
4bd80e12 110
111 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
112 if (!(devc->ftdic = ftdi_new())) {
113 sr_err("Failed to initialize libftdi.");
114 goto err_free_ftdi_buf;;
115 }
116
117 /* Try to open the FTDI device */
118 if (p_ols_open(devc) != SR_OK) {
119 goto err_free_ftdic;
120 }
121
122 /* The discovery procedure is like this: first send the Reset
123 * command (0x00) 5 times, since the device could be anywhere
124 * in a 5-byte command. Then send the ID command (0x02).
125 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
126 * have a match.
127 */
128
129 ret = SR_OK;
130 for (i = 0; i < 5; i++) {
131 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
132 break;
133 }
134 }
135 if (ret != SR_OK) {
136 sr_err("Could not reset device. Quitting.");
137 goto err_close_ftdic;
138 }
139 write_shortcommand(devc, CMD_ID);
140
141 /* Read the response data. */
142 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
143 if (bytes_read < 0) {
144 sr_err("Failed to read FTDI data (%d): %s.",
145 bytes_read, ftdi_get_error_string(devc->ftdic));
146 goto err_close_ftdic;
147 }
148 if (bytes_read == 0) {
149 goto err_close_ftdic;
150 }
151
152 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
153 goto err_close_ftdic;
154
155 /* Definitely using the OLS protocol, check if it supports
156 * the metadata command.
157 */
158 write_shortcommand(devc, CMD_METADATA);
159
160 /* Read the metadata. */
161 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
162 if (bytes_read < 0) {
163 sr_err("Failed to read FTDI data (%d): %s.",
164 bytes_read, ftdi_get_error_string(devc->ftdic));
165 goto err_close_ftdic;
166 }
167 if (bytes_read == 0) {
168 goto err_close_ftdic;
169 }
170
171 /* Close device. We'll reopen it again when we need it. */
172 p_ols_close(devc);
173
174 /* Parse the metadata. */
175 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 176
177 /* Configure samplerate and divider. */
178 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
179 sr_dbg("Failed to set default samplerate (%"PRIu64").",
180 DEFAULT_SAMPLERATE);
4bd80e12 181
182 drvc->instances = g_slist_append(drvc->instances, sdi);
183 devices = g_slist_append(devices, sdi);
184
185 return devices;
186
187err_close_ftdic:
188 p_ols_close(devc);
189err_free_ftdic:
190 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
191err_free_ftdi_buf:
192 g_free(devc->ftdi_buf);
4bd80e12 193 g_free(devc);
4bd80e12 194
195 return NULL;
196}
197
4bd80e12 198static void clear_helper(void *priv)
199{
200 struct dev_context *devc;
201
202 devc = priv;
203
204 ftdi_free(devc->ftdic);
205 g_free(devc->ftdi_buf);
206}
207
4f840ce9 208static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 209{
210 return std_dev_clear(di, clear_helper);
211}
212
584560f1 213static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 214 const struct sr_channel_group *cg)
215{
216 struct dev_context *devc;
217
218 (void)cg;
219
220 if (!sdi)
221 return SR_ERR_ARG;
222
223 devc = sdi->priv;
584560f1 224 switch (key) {
4bd80e12 225 case SR_CONF_SAMPLERATE:
226 *data = g_variant_new_uint64(devc->cur_samplerate);
227 break;
228 case SR_CONF_CAPTURE_RATIO:
229 *data = g_variant_new_uint64(devc->capture_ratio);
230 break;
231 case SR_CONF_LIMIT_SAMPLES:
232 *data = g_variant_new_uint64(devc->limit_samples);
233 break;
234 case SR_CONF_PATTERN_MODE:
235 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
236 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
237 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
238 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
239 else
240 *data = g_variant_new_string(STR_PATTERN_NONE);
241 break;
242 case SR_CONF_RLE:
243 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
244 break;
245 case SR_CONF_EXTERNAL_CLOCK:
246 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
247 break;
248 default:
249 return SR_ERR_NA;
250 }
251
252 return SR_OK;
253}
254
584560f1 255static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 256 const struct sr_channel_group *cg)
257{
258 struct dev_context *devc;
259 uint16_t flag;
260 uint64_t tmp_u64;
261 int ret;
262 const char *stropt;
263
264 (void)cg;
265
266 if (sdi->status != SR_ST_ACTIVE)
267 return SR_ERR_DEV_CLOSED;
268
269 devc = sdi->priv;
270
584560f1 271 switch (key) {
4bd80e12 272 case SR_CONF_SAMPLERATE:
273 tmp_u64 = g_variant_get_uint64(data);
274 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
275 return SR_ERR_SAMPLERATE;
276 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
277 break;
278 case SR_CONF_LIMIT_SAMPLES:
279 tmp_u64 = g_variant_get_uint64(data);
280 if (tmp_u64 < MIN_NUM_SAMPLES)
281 return SR_ERR;
282 devc->limit_samples = tmp_u64;
283 ret = SR_OK;
284 break;
285 case SR_CONF_CAPTURE_RATIO:
286 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 287 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
4bd80e12 288 ret = SR_ERR;
a5c38703 289 else
4bd80e12 290 ret = SR_OK;
291 break;
292 case SR_CONF_EXTERNAL_CLOCK:
293 if (g_variant_get_boolean(data)) {
294 sr_info("Enabling external clock.");
295 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
296 } else {
297 sr_info("Disabled external clock.");
298 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
299 }
300 ret = SR_OK;
301 break;
302 case SR_CONF_PATTERN_MODE:
303 stropt = g_variant_get_string(data, NULL);
304 ret = SR_OK;
305 flag = 0xffff;
306 if (!strcmp(stropt, STR_PATTERN_NONE)) {
307 sr_info("Disabling test modes.");
308 flag = 0x0000;
309 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
310 sr_info("Enabling internal test mode.");
311 flag = FLAG_INTERNAL_TEST_MODE;
312 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
313 sr_info("Enabling external test mode.");
314 flag = FLAG_EXTERNAL_TEST_MODE;
315 } else {
316 ret = SR_ERR;
317 }
318 if (flag != 0xffff) {
319 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
320 devc->flag_reg |= flag;
321 }
322 break;
323 case SR_CONF_SWAP:
324 if (g_variant_get_boolean(data)) {
325 sr_info("Enabling channel swapping.");
326 devc->flag_reg |= FLAG_SWAP_CHANNELS;
327 } else {
328 sr_info("Disabling channel swapping.");
329 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
330 }
331 ret = SR_OK;
332 break;
333
334 case SR_CONF_RLE:
335 if (g_variant_get_boolean(data)) {
336 sr_info("Enabling RLE.");
337 devc->flag_reg |= FLAG_RLE;
338 } else {
339 sr_info("Disabling RLE.");
340 devc->flag_reg &= ~FLAG_RLE;
341 }
342 ret = SR_OK;
343 break;
344 default:
345 ret = SR_ERR_NA;
346 }
347
348 return ret;
349}
350
584560f1 351static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 352 const struct sr_channel_group *cg)
353{
354 struct dev_context *devc;
355 GVariant *gvar, *grange[2];
356 GVariantBuilder gvb;
acc885c7 357 int num_pols_changrp, i;
4bd80e12 358
359 (void)cg;
360
361 switch (key) {
362 case SR_CONF_DEVICE_OPTIONS:
584560f1 363 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 364 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 365 break;
366 case SR_CONF_SAMPLERATE:
367 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
368 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
369 ARRAY_SIZE(samplerates), sizeof(uint64_t));
370 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
371 *data = g_variant_builder_end(&gvb);
372 break;
acc885c7
BV
373 case SR_CONF_TRIGGER_MATCH:
374 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
375 trigger_matches, ARRAY_SIZE(trigger_matches),
376 sizeof(int32_t));
4bd80e12 377 break;
378 case SR_CONF_PATTERN_MODE:
379 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
380 break;
381 case SR_CONF_LIMIT_SAMPLES:
382 if (!sdi)
383 return SR_ERR_ARG;
384 devc = sdi->priv;
385 if (devc->flag_reg & FLAG_RLE)
386 return SR_ERR_NA;
b94cff40 387 if (devc->max_samplebytes == 0)
4bd80e12 388 /* Device didn't specify sample memory size in metadata. */
389 return SR_ERR_NA;
390 /*
391 * Channel groups are turned off if no channels in that group are
392 * enabled, making more room for samples for the enabled group.
393 */
acc885c7
BV
394 pols_channel_mask(sdi);
395 num_pols_changrp = 0;
4bd80e12 396 for (i = 0; i < 4; i++) {
397 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 398 num_pols_changrp++;
4bd80e12 399 }
b94cff40 400 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
401 if (num_pols_changrp == 3)
402 num_pols_changrp = 4;
4bd80e12 403 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
404 if (num_pols_changrp)
405 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
406 else
407 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 408 *data = g_variant_new_tuple(grange, 2);
409 break;
410 default:
411 return SR_ERR_NA;
412 }
413
414 return SR_OK;
415}
416
417static int dev_open(struct sr_dev_inst *sdi)
418{
419 struct dev_context *devc;
4bd80e12 420
421 devc = sdi->priv;
422
423 if (p_ols_open(devc) != SR_OK) {
424 return SR_ERR;
425 } else {
dcd438ee 426 sdi->status = SR_ST_ACTIVE;
4bd80e12 427 return SR_OK;
428 }
429}
430
431static int dev_close(struct sr_dev_inst *sdi)
432{
433 int ret;
434 struct dev_context *devc;
435
436 ret = SR_OK;
437 devc = sdi->priv;
438
439 if (sdi->status == SR_ST_ACTIVE) {
440 sr_dbg("Status ACTIVE, closing device.");
441 ret = p_ols_close(devc);
442 } else {
443 sr_spew("Status not ACTIVE, nothing to do.");
444 }
445
446 sdi->status = SR_ST_INACTIVE;
447
448 return ret;
449}
450
4bd80e12 451static int set_trigger(const struct sr_dev_inst *sdi, int stage)
452{
453 struct dev_context *devc;
454 uint8_t cmd, arg[4];
455
456 devc = sdi->priv;
457
458 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
459 arg[0] = devc->trigger_mask[stage] & 0xff;
460 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
461 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
462 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
463 if (write_longcommand(devc, cmd, arg) != SR_OK)
464 return SR_ERR;
465
466 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
467 arg[0] = devc->trigger_value[stage] & 0xff;
468 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
469 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
470 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
471 if (write_longcommand(devc, cmd, arg) != SR_OK)
472 return SR_ERR;
473
474 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
475 arg[0] = arg[1] = arg[3] = 0x00;
476 arg[2] = stage;
477 if (stage == devc->num_stages)
478 /* Last stage, fire when this one matches. */
479 arg[3] |= TRIGGER_START;
480 if (write_longcommand(devc, cmd, arg) != SR_OK)
481 return SR_ERR;
482
1e0de846 483 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
484 arg[0] = devc->trigger_edge[stage] & 0xff;
485 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
486 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
487 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
488 if (write_longcommand(devc, cmd, arg) != SR_OK)
489 return SR_ERR;
490
4bd80e12 491 return SR_OK;
492}
493
84cbaf77
BV
494static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
495{
496 struct dev_context *devc;
497 uint8_t cmd, arg[4];
498
499 devc = sdi->priv;
500
501 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
502 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
503 if (write_longcommand(devc, cmd, arg) != SR_OK)
504 return SR_ERR;
505
506 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
507 if (write_longcommand(devc, cmd, arg) != SR_OK)
508 return SR_ERR;
509
510 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
511 arg[2] = 0x03;
512 if (write_longcommand(devc, cmd, arg) != SR_OK)
513 return SR_ERR;
514
515 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
516 arg[2] = 0x00;
517 if (write_longcommand(devc, cmd, arg) != SR_OK)
518 return SR_ERR;
519
520 return SR_OK;
521}
522
695dc859 523static int dev_acquisition_start(const struct sr_dev_inst *sdi)
4bd80e12 524{
525 struct dev_context *devc;
526 uint32_t samplecount, readcount, delaycount;
acc885c7 527 uint8_t pols_changrp_mask, arg[4];
b94cff40 528 uint16_t flag_tmp;
acc885c7 529 int num_pols_changrp, samplespercount;
4bd80e12 530 int ret, i;
531
532 if (sdi->status != SR_ST_ACTIVE)
533 return SR_ERR_DEV_CLOSED;
534
535 devc = sdi->priv;
536
acc885c7 537 pols_channel_mask(sdi);
4bd80e12 538
539 /*
540 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
541 * channel mask. Calculate this here, because num_pols_changrp is
542 * needed to limit readcount.
4bd80e12 543 */
acc885c7
BV
544 pols_changrp_mask = 0;
545 num_pols_changrp = 0;
4bd80e12 546 for (i = 0; i < 4; i++) {
547 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
548 pols_changrp_mask |= (1 << i);
549 num_pols_changrp++;
4bd80e12 550 }
551 }
b94cff40 552 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
553 if (num_pols_changrp == 3)
554 num_pols_changrp = 4;
b94cff40 555 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 556 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 557
558 /*
559 * Limit readcount to prevent reading past the end of the hardware
560 * buffer.
561 */
562 sr_dbg("max_samples = %d", devc->max_samples);
6433156c 563 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
b94cff40 564 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 565 sr_dbg("Samplecount = %d", samplecount);
566
b94cff40 567 /* In demux mode the OLS is processing two samples per clock */
568 if (devc->flag_reg & FLAG_DEMUX) {
569 samplespercount = 8;
570 }
571 else {
572 samplespercount = 4;
573 }
574
575 readcount = samplecount / samplespercount;
576
4bd80e12 577 /* Rather read too many samples than too few. */
b94cff40 578 if (samplecount % samplespercount != 0)
4bd80e12 579 readcount++;
580
581 /* Basic triggers. */
acc885c7
BV
582 if (pols_convert_trigger(sdi) != SR_OK) {
583 sr_err("Failed to configure channels.");
584 return SR_ERR;
585 }
84cbaf77 586
acc885c7 587 if (devc->num_stages > 0) {
4bd80e12 588 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 589 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
590 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
591 if (i <= devc->num_stages) {
592 sr_dbg("Setting p-ols stage %d trigger.", i);
593 if ((ret = set_trigger(sdi, i)) != SR_OK)
594 return ret;
595 }
596 else {
597 sr_dbg("Disabling p-ols stage %d trigger.", i);
598 if ((ret = disable_trigger(sdi, i)) != SR_OK)
599 return ret;
600 }
4bd80e12 601 }
602 } else {
603 /* No triggers configured, force trigger on first stage. */
604 sr_dbg("Forcing trigger at stage 0.");
605 if ((ret = set_trigger(sdi, 0)) != SR_OK)
606 return ret;
607 delaycount = readcount;
608 }
609
610 /* Samplerate. */
611 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
612 devc->cur_samplerate, devc->cur_samplerate_divider);
613 arg[0] = devc->cur_samplerate_divider & 0xff;
614 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
615 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
616 arg[3] = 0x00;
617 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
618 return SR_ERR;
acc885c7 619
4bd80e12 620 /* Send extended sample limit and pre/post-trigger capture ratio. */
621 arg[0] = ((readcount - 1) & 0xff);
622 arg[1] = ((readcount - 1) & 0xff00) >> 8;
623 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
624 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 625 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 626 return SR_ERR;
627 arg[0] = ((delaycount - 1) & 0xff);
628 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
629 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
630 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 631 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 632 return SR_ERR;
acc885c7 633
4bd80e12 634 /* Flag register. */
635 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
636 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
637 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
638 devc->flag_reg & FLAG_RLE ? "on" : "off",
639 devc->flag_reg & FLAG_FILTER ? "on": "off",
640 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
641
b94cff40 642 /*
643 * Enable/disable OLS channel groups in the flag register according
644 * to the channel mask. 1 means "disable channel".
645 */
646 devc->flag_reg &= ~0x3c;
acc885c7 647 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 648 sr_dbg("flag_reg = %x", devc->flag_reg);
649
650 /*
651 * In demux mode the OLS is processing two 8-bit or 16-bit samples
652 * in parallel and for this to work the lower two bits of the four
653 * "channel_disable" bits must be replicated to the upper two bits.
654 */
655 flag_tmp = devc->flag_reg;
656 if (devc->flag_reg & FLAG_DEMUX) {
657 flag_tmp &= ~0x30;
acc885c7 658 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 659 }
660 arg[0] = flag_tmp & 0xff;
661 arg[1] = flag_tmp >> 8;
4bd80e12 662 arg[2] = arg[3] = 0x00;
663 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
664 return SR_ERR;
665
666 /* Start acquisition on the device. */
667 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
668 return SR_ERR;
669
670 /* Reset all operational states. */
671 devc->rle_count = devc->num_transfers = 0;
672 devc->num_samples = devc->num_bytes = 0;
673 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
674 memset(devc->sample, 0, 4);
675
695dc859 676 std_session_send_df_header(sdi, LOG_PREFIX);
4bd80e12 677
678 /* Hook up a dummy handler to receive data from the device. */
c650d3ec 679 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
695dc859 680 (struct sr_dev_inst *)sdi);
4bd80e12 681
682 return SR_OK;
683}
684
695dc859 685static int dev_acquisition_stop(struct sr_dev_inst *sdi)
4bd80e12 686{
687 struct dev_context *devc;
4bd80e12 688
689 devc = sdi->priv;
690
691 sr_dbg("Stopping acquisition.");
692 write_shortcommand(devc, CMD_RESET);
693 write_shortcommand(devc, CMD_RESET);
694 write_shortcommand(devc, CMD_RESET);
695 write_shortcommand(devc, CMD_RESET);
696 write_shortcommand(devc, CMD_RESET);
697
dd7a4a71 698 sr_session_source_remove(sdi->session, -1);
4bd80e12 699
695dc859 700 std_session_send_df_end(sdi, LOG_PREFIX);
4bd80e12 701
702 return SR_OK;
703}
704
705SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 706 .name = "p-ols",
4bd80e12 707 .longname = "Pipistrello OLS",
708 .api_version = 1,
c2fdcc25 709 .init = std_init,
700d6b64 710 .cleanup = std_cleanup,
4bd80e12 711 .scan = scan,
c01bf34c 712 .dev_list = std_dev_list,
4bd80e12 713 .dev_clear = dev_clear,
714 .config_get = config_get,
715 .config_set = config_set,
716 .config_list = config_list,
717 .dev_open = dev_open,
718 .dev_close = dev_close,
719 .dev_acquisition_start = dev_acquisition_start,
720 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 721 .context = NULL,
4bd80e12 722};