]> sigrok.org Git - libsigrok.git/blame - src/hardware/pipistrello-ols/api.c
Introduce standard implementation of the dev_list() callback
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
CommitLineData
4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
4bd80e12 21#include "protocol.h"
22
f254bc4b 23static const uint32_t devopts[] = {
4bd80e12 24 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 33};
34
acc885c7
BV
35static const int32_t trigger_matches[] = {
36 SR_TRIGGER_ZERO,
37 SR_TRIGGER_ONE,
38 SR_TRIGGER_RISING,
39 SR_TRIGGER_FALLING,
40};
41
4bd80e12 42#define STR_PATTERN_NONE "None"
43#define STR_PATTERN_EXTERNAL "External"
44#define STR_PATTERN_INTERNAL "Internal"
45
46/* Supported methods of test pattern outputs */
47enum {
48 /**
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
51 */
52 PATTERN_EXTERNAL,
53
54 /** Route test pattern internally to capture buffer. */
55 PATTERN_INTERNAL,
56};
57
58static const char *patterns[] = {
59 STR_PATTERN_NONE,
60 STR_PATTERN_EXTERNAL,
61 STR_PATTERN_INTERNAL,
62};
63
64/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 65SR_PRIV const char *p_ols_channel_names[] = {
4bd80e12 66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
4bd80e12 69};
70
71/* Default supported samplerates, can be overridden by device metadata. */
72static const uint64_t samplerates[] = {
73 SR_HZ(10),
74 SR_MHZ(200),
75 SR_HZ(1),
76};
77
78SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 79
4f840ce9 80static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
4bd80e12 81{
82 return std_init(sr_ctx, di, LOG_PREFIX);
83}
84
4f840ce9 85static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 86{
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
90 GSList *devices;
91 int ret, i;
92 char buf[70];
93 int bytes_read;
94
95 (void)options;
96
41812aca 97 drvc = di->context;
4bd80e12 98
99 devices = NULL;
100
101 /* Allocate memory for our private device context. */
f57d8ffe 102 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 103
104 /* Device-specific settings */
b94cff40 105 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 106
107 /* Acquisition settings */
108 devc->limit_samples = devc->capture_ratio = 0;
109 devc->trigger_at = -1;
110 devc->channel_mask = 0xffffffff;
111 devc->flag_reg = 0;
112
113 /* Allocate memory for the incoming ftdi data. */
a95f142e 114 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
4bd80e12 115
116 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
117 if (!(devc->ftdic = ftdi_new())) {
118 sr_err("Failed to initialize libftdi.");
119 goto err_free_ftdi_buf;;
120 }
121
122 /* Try to open the FTDI device */
123 if (p_ols_open(devc) != SR_OK) {
124 goto err_free_ftdic;
125 }
126
127 /* The discovery procedure is like this: first send the Reset
128 * command (0x00) 5 times, since the device could be anywhere
129 * in a 5-byte command. Then send the ID command (0x02).
130 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
131 * have a match.
132 */
133
134 ret = SR_OK;
135 for (i = 0; i < 5; i++) {
136 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
137 break;
138 }
139 }
140 if (ret != SR_OK) {
141 sr_err("Could not reset device. Quitting.");
142 goto err_close_ftdic;
143 }
144 write_shortcommand(devc, CMD_ID);
145
146 /* Read the response data. */
147 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
148 if (bytes_read < 0) {
149 sr_err("Failed to read FTDI data (%d): %s.",
150 bytes_read, ftdi_get_error_string(devc->ftdic));
151 goto err_close_ftdic;
152 }
153 if (bytes_read == 0) {
154 goto err_close_ftdic;
155 }
156
157 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
158 goto err_close_ftdic;
159
160 /* Definitely using the OLS protocol, check if it supports
161 * the metadata command.
162 */
163 write_shortcommand(devc, CMD_METADATA);
164
165 /* Read the metadata. */
166 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
167 if (bytes_read < 0) {
168 sr_err("Failed to read FTDI data (%d): %s.",
169 bytes_read, ftdi_get_error_string(devc->ftdic));
170 goto err_close_ftdic;
171 }
172 if (bytes_read == 0) {
173 goto err_close_ftdic;
174 }
175
176 /* Close device. We'll reopen it again when we need it. */
177 p_ols_close(devc);
178
179 /* Parse the metadata. */
180 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 181
182 /* Configure samplerate and divider. */
183 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
184 sr_dbg("Failed to set default samplerate (%"PRIu64").",
185 DEFAULT_SAMPLERATE);
4bd80e12 186
187 drvc->instances = g_slist_append(drvc->instances, sdi);
188 devices = g_slist_append(devices, sdi);
189
190 return devices;
191
192err_close_ftdic:
193 p_ols_close(devc);
194err_free_ftdic:
195 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
196err_free_ftdi_buf:
197 g_free(devc->ftdi_buf);
4bd80e12 198 g_free(devc);
4bd80e12 199
200 return NULL;
201}
202
4bd80e12 203static void clear_helper(void *priv)
204{
205 struct dev_context *devc;
206
207 devc = priv;
208
209 ftdi_free(devc->ftdic);
210 g_free(devc->ftdi_buf);
211}
212
4f840ce9 213static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 214{
215 return std_dev_clear(di, clear_helper);
216}
217
584560f1 218static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 219 const struct sr_channel_group *cg)
220{
221 struct dev_context *devc;
222
223 (void)cg;
224
225 if (!sdi)
226 return SR_ERR_ARG;
227
228 devc = sdi->priv;
584560f1 229 switch (key) {
4bd80e12 230 case SR_CONF_SAMPLERATE:
231 *data = g_variant_new_uint64(devc->cur_samplerate);
232 break;
233 case SR_CONF_CAPTURE_RATIO:
234 *data = g_variant_new_uint64(devc->capture_ratio);
235 break;
236 case SR_CONF_LIMIT_SAMPLES:
237 *data = g_variant_new_uint64(devc->limit_samples);
238 break;
239 case SR_CONF_PATTERN_MODE:
240 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
241 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
242 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
243 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
244 else
245 *data = g_variant_new_string(STR_PATTERN_NONE);
246 break;
247 case SR_CONF_RLE:
248 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
249 break;
250 case SR_CONF_EXTERNAL_CLOCK:
251 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
252 break;
253 default:
254 return SR_ERR_NA;
255 }
256
257 return SR_OK;
258}
259
584560f1 260static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 261 const struct sr_channel_group *cg)
262{
263 struct dev_context *devc;
264 uint16_t flag;
265 uint64_t tmp_u64;
266 int ret;
267 const char *stropt;
268
269 (void)cg;
270
271 if (sdi->status != SR_ST_ACTIVE)
272 return SR_ERR_DEV_CLOSED;
273
274 devc = sdi->priv;
275
584560f1 276 switch (key) {
4bd80e12 277 case SR_CONF_SAMPLERATE:
278 tmp_u64 = g_variant_get_uint64(data);
279 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
280 return SR_ERR_SAMPLERATE;
281 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
282 break;
283 case SR_CONF_LIMIT_SAMPLES:
284 tmp_u64 = g_variant_get_uint64(data);
285 if (tmp_u64 < MIN_NUM_SAMPLES)
286 return SR_ERR;
287 devc->limit_samples = tmp_u64;
288 ret = SR_OK;
289 break;
290 case SR_CONF_CAPTURE_RATIO:
291 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 292 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
4bd80e12 293 ret = SR_ERR;
a5c38703 294 else
4bd80e12 295 ret = SR_OK;
296 break;
297 case SR_CONF_EXTERNAL_CLOCK:
298 if (g_variant_get_boolean(data)) {
299 sr_info("Enabling external clock.");
300 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
301 } else {
302 sr_info("Disabled external clock.");
303 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
304 }
305 ret = SR_OK;
306 break;
307 case SR_CONF_PATTERN_MODE:
308 stropt = g_variant_get_string(data, NULL);
309 ret = SR_OK;
310 flag = 0xffff;
311 if (!strcmp(stropt, STR_PATTERN_NONE)) {
312 sr_info("Disabling test modes.");
313 flag = 0x0000;
314 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
315 sr_info("Enabling internal test mode.");
316 flag = FLAG_INTERNAL_TEST_MODE;
317 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
318 sr_info("Enabling external test mode.");
319 flag = FLAG_EXTERNAL_TEST_MODE;
320 } else {
321 ret = SR_ERR;
322 }
323 if (flag != 0xffff) {
324 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
325 devc->flag_reg |= flag;
326 }
327 break;
328 case SR_CONF_SWAP:
329 if (g_variant_get_boolean(data)) {
330 sr_info("Enabling channel swapping.");
331 devc->flag_reg |= FLAG_SWAP_CHANNELS;
332 } else {
333 sr_info("Disabling channel swapping.");
334 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
335 }
336 ret = SR_OK;
337 break;
338
339 case SR_CONF_RLE:
340 if (g_variant_get_boolean(data)) {
341 sr_info("Enabling RLE.");
342 devc->flag_reg |= FLAG_RLE;
343 } else {
344 sr_info("Disabling RLE.");
345 devc->flag_reg &= ~FLAG_RLE;
346 }
347 ret = SR_OK;
348 break;
349 default:
350 ret = SR_ERR_NA;
351 }
352
353 return ret;
354}
355
584560f1 356static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 357 const struct sr_channel_group *cg)
358{
359 struct dev_context *devc;
360 GVariant *gvar, *grange[2];
361 GVariantBuilder gvb;
acc885c7 362 int num_pols_changrp, i;
4bd80e12 363
364 (void)cg;
365
366 switch (key) {
367 case SR_CONF_DEVICE_OPTIONS:
584560f1 368 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 369 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 370 break;
371 case SR_CONF_SAMPLERATE:
372 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
373 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
374 ARRAY_SIZE(samplerates), sizeof(uint64_t));
375 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
376 *data = g_variant_builder_end(&gvb);
377 break;
acc885c7
BV
378 case SR_CONF_TRIGGER_MATCH:
379 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
380 trigger_matches, ARRAY_SIZE(trigger_matches),
381 sizeof(int32_t));
4bd80e12 382 break;
383 case SR_CONF_PATTERN_MODE:
384 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
385 break;
386 case SR_CONF_LIMIT_SAMPLES:
387 if (!sdi)
388 return SR_ERR_ARG;
389 devc = sdi->priv;
390 if (devc->flag_reg & FLAG_RLE)
391 return SR_ERR_NA;
b94cff40 392 if (devc->max_samplebytes == 0)
4bd80e12 393 /* Device didn't specify sample memory size in metadata. */
394 return SR_ERR_NA;
395 /*
396 * Channel groups are turned off if no channels in that group are
397 * enabled, making more room for samples for the enabled group.
398 */
acc885c7
BV
399 pols_channel_mask(sdi);
400 num_pols_changrp = 0;
4bd80e12 401 for (i = 0; i < 4; i++) {
402 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 403 num_pols_changrp++;
4bd80e12 404 }
b94cff40 405 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
406 if (num_pols_changrp == 3)
407 num_pols_changrp = 4;
4bd80e12 408 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
409 if (num_pols_changrp)
410 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
411 else
412 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 413 *data = g_variant_new_tuple(grange, 2);
414 break;
415 default:
416 return SR_ERR_NA;
417 }
418
419 return SR_OK;
420}
421
422static int dev_open(struct sr_dev_inst *sdi)
423{
424 struct dev_context *devc;
4bd80e12 425
426 devc = sdi->priv;
427
428 if (p_ols_open(devc) != SR_OK) {
429 return SR_ERR;
430 } else {
dcd438ee 431 sdi->status = SR_ST_ACTIVE;
4bd80e12 432 return SR_OK;
433 }
434}
435
436static int dev_close(struct sr_dev_inst *sdi)
437{
438 int ret;
439 struct dev_context *devc;
440
441 ret = SR_OK;
442 devc = sdi->priv;
443
444 if (sdi->status == SR_ST_ACTIVE) {
445 sr_dbg("Status ACTIVE, closing device.");
446 ret = p_ols_close(devc);
447 } else {
448 sr_spew("Status not ACTIVE, nothing to do.");
449 }
450
451 sdi->status = SR_ST_INACTIVE;
452
453 return ret;
454}
455
4bd80e12 456static int set_trigger(const struct sr_dev_inst *sdi, int stage)
457{
458 struct dev_context *devc;
459 uint8_t cmd, arg[4];
460
461 devc = sdi->priv;
462
463 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
464 arg[0] = devc->trigger_mask[stage] & 0xff;
465 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
466 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
467 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
468 if (write_longcommand(devc, cmd, arg) != SR_OK)
469 return SR_ERR;
470
471 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
472 arg[0] = devc->trigger_value[stage] & 0xff;
473 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
474 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
475 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
476 if (write_longcommand(devc, cmd, arg) != SR_OK)
477 return SR_ERR;
478
479 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
480 arg[0] = arg[1] = arg[3] = 0x00;
481 arg[2] = stage;
482 if (stage == devc->num_stages)
483 /* Last stage, fire when this one matches. */
484 arg[3] |= TRIGGER_START;
485 if (write_longcommand(devc, cmd, arg) != SR_OK)
486 return SR_ERR;
487
1e0de846 488 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
489 arg[0] = devc->trigger_edge[stage] & 0xff;
490 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
491 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
492 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
493 if (write_longcommand(devc, cmd, arg) != SR_OK)
494 return SR_ERR;
495
4bd80e12 496 return SR_OK;
497}
498
84cbaf77
BV
499static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
500{
501 struct dev_context *devc;
502 uint8_t cmd, arg[4];
503
504 devc = sdi->priv;
505
506 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
507 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
508 if (write_longcommand(devc, cmd, arg) != SR_OK)
509 return SR_ERR;
510
511 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
512 if (write_longcommand(devc, cmd, arg) != SR_OK)
513 return SR_ERR;
514
515 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
516 arg[2] = 0x03;
517 if (write_longcommand(devc, cmd, arg) != SR_OK)
518 return SR_ERR;
519
520 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
521 arg[2] = 0x00;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
523 return SR_ERR;
524
525 return SR_OK;
526}
527
695dc859 528static int dev_acquisition_start(const struct sr_dev_inst *sdi)
4bd80e12 529{
530 struct dev_context *devc;
531 uint32_t samplecount, readcount, delaycount;
acc885c7 532 uint8_t pols_changrp_mask, arg[4];
b94cff40 533 uint16_t flag_tmp;
acc885c7 534 int num_pols_changrp, samplespercount;
4bd80e12 535 int ret, i;
536
537 if (sdi->status != SR_ST_ACTIVE)
538 return SR_ERR_DEV_CLOSED;
539
540 devc = sdi->priv;
541
acc885c7 542 pols_channel_mask(sdi);
4bd80e12 543
544 /*
545 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
546 * channel mask. Calculate this here, because num_pols_changrp is
547 * needed to limit readcount.
4bd80e12 548 */
acc885c7
BV
549 pols_changrp_mask = 0;
550 num_pols_changrp = 0;
4bd80e12 551 for (i = 0; i < 4; i++) {
552 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
553 pols_changrp_mask |= (1 << i);
554 num_pols_changrp++;
4bd80e12 555 }
556 }
b94cff40 557 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
558 if (num_pols_changrp == 3)
559 num_pols_changrp = 4;
b94cff40 560 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 561 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 562
563 /*
564 * Limit readcount to prevent reading past the end of the hardware
565 * buffer.
566 */
567 sr_dbg("max_samples = %d", devc->max_samples);
6433156c 568 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
b94cff40 569 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 570 sr_dbg("Samplecount = %d", samplecount);
571
b94cff40 572 /* In demux mode the OLS is processing two samples per clock */
573 if (devc->flag_reg & FLAG_DEMUX) {
574 samplespercount = 8;
575 }
576 else {
577 samplespercount = 4;
578 }
579
580 readcount = samplecount / samplespercount;
581
4bd80e12 582 /* Rather read too many samples than too few. */
b94cff40 583 if (samplecount % samplespercount != 0)
4bd80e12 584 readcount++;
585
586 /* Basic triggers. */
acc885c7
BV
587 if (pols_convert_trigger(sdi) != SR_OK) {
588 sr_err("Failed to configure channels.");
589 return SR_ERR;
590 }
84cbaf77 591
acc885c7 592 if (devc->num_stages > 0) {
4bd80e12 593 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 594 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
595 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
596 if (i <= devc->num_stages) {
597 sr_dbg("Setting p-ols stage %d trigger.", i);
598 if ((ret = set_trigger(sdi, i)) != SR_OK)
599 return ret;
600 }
601 else {
602 sr_dbg("Disabling p-ols stage %d trigger.", i);
603 if ((ret = disable_trigger(sdi, i)) != SR_OK)
604 return ret;
605 }
4bd80e12 606 }
607 } else {
608 /* No triggers configured, force trigger on first stage. */
609 sr_dbg("Forcing trigger at stage 0.");
610 if ((ret = set_trigger(sdi, 0)) != SR_OK)
611 return ret;
612 delaycount = readcount;
613 }
614
615 /* Samplerate. */
616 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
617 devc->cur_samplerate, devc->cur_samplerate_divider);
618 arg[0] = devc->cur_samplerate_divider & 0xff;
619 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
620 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
621 arg[3] = 0x00;
622 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
623 return SR_ERR;
acc885c7 624
4bd80e12 625 /* Send extended sample limit and pre/post-trigger capture ratio. */
626 arg[0] = ((readcount - 1) & 0xff);
627 arg[1] = ((readcount - 1) & 0xff00) >> 8;
628 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
629 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 630 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 631 return SR_ERR;
632 arg[0] = ((delaycount - 1) & 0xff);
633 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
634 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
635 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 636 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 637 return SR_ERR;
acc885c7 638
4bd80e12 639 /* Flag register. */
640 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
641 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
642 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
643 devc->flag_reg & FLAG_RLE ? "on" : "off",
644 devc->flag_reg & FLAG_FILTER ? "on": "off",
645 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
646
b94cff40 647 /*
648 * Enable/disable OLS channel groups in the flag register according
649 * to the channel mask. 1 means "disable channel".
650 */
651 devc->flag_reg &= ~0x3c;
acc885c7 652 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 653 sr_dbg("flag_reg = %x", devc->flag_reg);
654
655 /*
656 * In demux mode the OLS is processing two 8-bit or 16-bit samples
657 * in parallel and for this to work the lower two bits of the four
658 * "channel_disable" bits must be replicated to the upper two bits.
659 */
660 flag_tmp = devc->flag_reg;
661 if (devc->flag_reg & FLAG_DEMUX) {
662 flag_tmp &= ~0x30;
acc885c7 663 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 664 }
665 arg[0] = flag_tmp & 0xff;
666 arg[1] = flag_tmp >> 8;
4bd80e12 667 arg[2] = arg[3] = 0x00;
668 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
669 return SR_ERR;
670
671 /* Start acquisition on the device. */
672 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
673 return SR_ERR;
674
675 /* Reset all operational states. */
676 devc->rle_count = devc->num_transfers = 0;
677 devc->num_samples = devc->num_bytes = 0;
678 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
679 memset(devc->sample, 0, 4);
680
695dc859 681 std_session_send_df_header(sdi, LOG_PREFIX);
4bd80e12 682
683 /* Hook up a dummy handler to receive data from the device. */
c650d3ec 684 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
695dc859 685 (struct sr_dev_inst *)sdi);
4bd80e12 686
687 return SR_OK;
688}
689
695dc859 690static int dev_acquisition_stop(struct sr_dev_inst *sdi)
4bd80e12 691{
692 struct dev_context *devc;
4bd80e12 693
694 devc = sdi->priv;
695
696 sr_dbg("Stopping acquisition.");
697 write_shortcommand(devc, CMD_RESET);
698 write_shortcommand(devc, CMD_RESET);
699 write_shortcommand(devc, CMD_RESET);
700 write_shortcommand(devc, CMD_RESET);
701 write_shortcommand(devc, CMD_RESET);
702
dd7a4a71 703 sr_session_source_remove(sdi->session, -1);
4bd80e12 704
695dc859 705 std_session_send_df_end(sdi, LOG_PREFIX);
4bd80e12 706
707 return SR_OK;
708}
709
710SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 711 .name = "p-ols",
4bd80e12 712 .longname = "Pipistrello OLS",
713 .api_version = 1,
714 .init = init,
700d6b64 715 .cleanup = std_cleanup,
4bd80e12 716 .scan = scan,
c01bf34c 717 .dev_list = std_dev_list,
4bd80e12 718 .dev_clear = dev_clear,
719 .config_get = config_get,
720 .config_set = config_set,
721 .config_list = config_list,
722 .dev_open = dev_open,
723 .dev_close = dev_close,
724 .dev_acquisition_start = dev_acquisition_start,
725 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 726 .context = NULL,
4bd80e12 727};