]> sigrok.org Git - libsigrok.git/blame - src/hardware/pipistrello-ols/api.c
Remove unnecessary dev_clear() callbacks
[libsigrok.git] / src / hardware / pipistrello-ols / api.c
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4bd80e12 1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
6ec6c43b 20#include <config.h>
4bd80e12 21#include "protocol.h"
22
f254bc4b 23static const uint32_t devopts[] = {
4bd80e12 24 SR_CONF_LOGIC_ANALYZER,
5827f61b
BV
25 SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
26 SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
27 SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
28 SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
29 SR_CONF_PATTERN_MODE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
30 SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
31 SR_CONF_SWAP | SR_CONF_SET,
32 SR_CONF_RLE | SR_CONF_GET | SR_CONF_SET,
4bd80e12 33};
34
acc885c7
BV
35static const int32_t trigger_matches[] = {
36 SR_TRIGGER_ZERO,
37 SR_TRIGGER_ONE,
38 SR_TRIGGER_RISING,
39 SR_TRIGGER_FALLING,
40};
41
4bd80e12 42#define STR_PATTERN_NONE "None"
43#define STR_PATTERN_EXTERNAL "External"
44#define STR_PATTERN_INTERNAL "Internal"
45
46/* Supported methods of test pattern outputs */
47enum {
48 /**
49 * Capture pins 31:16 (unbuffered wing) output a test pattern
50 * that can captured on pins 0:15.
51 */
52 PATTERN_EXTERNAL,
53
54 /** Route test pattern internally to capture buffer. */
55 PATTERN_INTERNAL,
56};
57
58static const char *patterns[] = {
59 STR_PATTERN_NONE,
60 STR_PATTERN_EXTERNAL,
61 STR_PATTERN_INTERNAL,
62};
63
64/* Channels are numbered 0-31 (on the PCB silkscreen). */
53cda65a 65SR_PRIV const char *p_ols_channel_names[] = {
4bd80e12 66 "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12",
67 "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23",
68 "24", "25", "26", "27", "28", "29", "30", "31",
4bd80e12 69};
70
71/* Default supported samplerates, can be overridden by device metadata. */
72static const uint64_t samplerates[] = {
73 SR_HZ(10),
74 SR_MHZ(200),
75 SR_HZ(1),
76};
77
78SR_PRIV struct sr_dev_driver p_ols_driver_info;
4bd80e12 79
4f840ce9 80static int init(struct sr_dev_driver *di, struct sr_context *sr_ctx)
4bd80e12 81{
82 return std_init(sr_ctx, di, LOG_PREFIX);
83}
84
4f840ce9 85static GSList *scan(struct sr_dev_driver *di, GSList *options)
4bd80e12 86{
87 struct sr_dev_inst *sdi;
88 struct drv_context *drvc;
89 struct dev_context *devc;
90 GSList *devices;
91 int ret, i;
92 char buf[70];
93 int bytes_read;
94
95 (void)options;
96
41812aca 97 drvc = di->context;
4bd80e12 98
99 devices = NULL;
100
101 /* Allocate memory for our private device context. */
f57d8ffe 102 devc = g_malloc0(sizeof(struct dev_context));
4bd80e12 103
104 /* Device-specific settings */
b94cff40 105 devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0;
4bd80e12 106
107 /* Acquisition settings */
108 devc->limit_samples = devc->capture_ratio = 0;
109 devc->trigger_at = -1;
110 devc->channel_mask = 0xffffffff;
111 devc->flag_reg = 0;
112
113 /* Allocate memory for the incoming ftdi data. */
a95f142e 114 devc->ftdi_buf = g_malloc0(FTDI_BUF_SIZE);
4bd80e12 115
116 /* Allocate memory for the FTDI context (ftdic) and initialize it. */
117 if (!(devc->ftdic = ftdi_new())) {
118 sr_err("Failed to initialize libftdi.");
119 goto err_free_ftdi_buf;;
120 }
121
122 /* Try to open the FTDI device */
123 if (p_ols_open(devc) != SR_OK) {
124 goto err_free_ftdic;
125 }
126
127 /* The discovery procedure is like this: first send the Reset
128 * command (0x00) 5 times, since the device could be anywhere
129 * in a 5-byte command. Then send the ID command (0x02).
130 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
131 * have a match.
132 */
133
134 ret = SR_OK;
135 for (i = 0; i < 5; i++) {
136 if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) {
137 break;
138 }
139 }
140 if (ret != SR_OK) {
141 sr_err("Could not reset device. Quitting.");
142 goto err_close_ftdic;
143 }
144 write_shortcommand(devc, CMD_ID);
145
146 /* Read the response data. */
147 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4);
148 if (bytes_read < 0) {
149 sr_err("Failed to read FTDI data (%d): %s.",
150 bytes_read, ftdi_get_error_string(devc->ftdic));
151 goto err_close_ftdic;
152 }
153 if (bytes_read == 0) {
154 goto err_close_ftdic;
155 }
156
157 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
158 goto err_close_ftdic;
159
160 /* Definitely using the OLS protocol, check if it supports
161 * the metadata command.
162 */
163 write_shortcommand(devc, CMD_METADATA);
164
165 /* Read the metadata. */
166 bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64);
167 if (bytes_read < 0) {
168 sr_err("Failed to read FTDI data (%d): %s.",
169 bytes_read, ftdi_get_error_string(devc->ftdic));
170 goto err_close_ftdic;
171 }
172 if (bytes_read == 0) {
173 goto err_close_ftdic;
174 }
175
176 /* Close device. We'll reopen it again when we need it. */
177 p_ols_close(devc);
178
179 /* Parse the metadata. */
180 sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc);
4bd80e12 181
182 /* Configure samplerate and divider. */
183 if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK)
184 sr_dbg("Failed to set default samplerate (%"PRIu64").",
185 DEFAULT_SAMPLERATE);
4bd80e12 186
187 drvc->instances = g_slist_append(drvc->instances, sdi);
188 devices = g_slist_append(devices, sdi);
189
190 return devices;
191
192err_close_ftdic:
193 p_ols_close(devc);
194err_free_ftdic:
195 ftdi_free(devc->ftdic); /* NOT free() or g_free()! */
196err_free_ftdi_buf:
197 g_free(devc->ftdi_buf);
4bd80e12 198 g_free(devc);
4bd80e12 199
200 return NULL;
201}
202
4f840ce9 203static GSList *dev_list(const struct sr_dev_driver *di)
4bd80e12 204{
41812aca 205 return ((struct drv_context *)(di->context))->instances;
4bd80e12 206}
207
208static void clear_helper(void *priv)
209{
210 struct dev_context *devc;
211
212 devc = priv;
213
214 ftdi_free(devc->ftdic);
215 g_free(devc->ftdi_buf);
216}
217
4f840ce9 218static int dev_clear(const struct sr_dev_driver *di)
4bd80e12 219{
220 return std_dev_clear(di, clear_helper);
221}
222
584560f1 223static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 224 const struct sr_channel_group *cg)
225{
226 struct dev_context *devc;
227
228 (void)cg;
229
230 if (!sdi)
231 return SR_ERR_ARG;
232
233 devc = sdi->priv;
584560f1 234 switch (key) {
4bd80e12 235 case SR_CONF_SAMPLERATE:
236 *data = g_variant_new_uint64(devc->cur_samplerate);
237 break;
238 case SR_CONF_CAPTURE_RATIO:
239 *data = g_variant_new_uint64(devc->capture_ratio);
240 break;
241 case SR_CONF_LIMIT_SAMPLES:
242 *data = g_variant_new_uint64(devc->limit_samples);
243 break;
244 case SR_CONF_PATTERN_MODE:
245 if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE)
246 *data = g_variant_new_string(STR_PATTERN_EXTERNAL);
247 else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE)
248 *data = g_variant_new_string(STR_PATTERN_INTERNAL);
249 else
250 *data = g_variant_new_string(STR_PATTERN_NONE);
251 break;
252 case SR_CONF_RLE:
253 *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE);
254 break;
255 case SR_CONF_EXTERNAL_CLOCK:
256 *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE);
257 break;
258 default:
259 return SR_ERR_NA;
260 }
261
262 return SR_OK;
263}
264
584560f1 265static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
4bd80e12 266 const struct sr_channel_group *cg)
267{
268 struct dev_context *devc;
269 uint16_t flag;
270 uint64_t tmp_u64;
271 int ret;
272 const char *stropt;
273
274 (void)cg;
275
276 if (sdi->status != SR_ST_ACTIVE)
277 return SR_ERR_DEV_CLOSED;
278
279 devc = sdi->priv;
280
584560f1 281 switch (key) {
4bd80e12 282 case SR_CONF_SAMPLERATE:
283 tmp_u64 = g_variant_get_uint64(data);
284 if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1])
285 return SR_ERR_SAMPLERATE;
286 ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data));
287 break;
288 case SR_CONF_LIMIT_SAMPLES:
289 tmp_u64 = g_variant_get_uint64(data);
290 if (tmp_u64 < MIN_NUM_SAMPLES)
291 return SR_ERR;
292 devc->limit_samples = tmp_u64;
293 ret = SR_OK;
294 break;
295 case SR_CONF_CAPTURE_RATIO:
296 devc->capture_ratio = g_variant_get_uint64(data);
a5c38703 297 if (devc->capture_ratio < 0 || devc->capture_ratio > 100)
4bd80e12 298 ret = SR_ERR;
a5c38703 299 else
4bd80e12 300 ret = SR_OK;
301 break;
302 case SR_CONF_EXTERNAL_CLOCK:
303 if (g_variant_get_boolean(data)) {
304 sr_info("Enabling external clock.");
305 devc->flag_reg |= FLAG_CLOCK_EXTERNAL;
306 } else {
307 sr_info("Disabled external clock.");
308 devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL;
309 }
310 ret = SR_OK;
311 break;
312 case SR_CONF_PATTERN_MODE:
313 stropt = g_variant_get_string(data, NULL);
314 ret = SR_OK;
315 flag = 0xffff;
316 if (!strcmp(stropt, STR_PATTERN_NONE)) {
317 sr_info("Disabling test modes.");
318 flag = 0x0000;
319 }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) {
320 sr_info("Enabling internal test mode.");
321 flag = FLAG_INTERNAL_TEST_MODE;
322 } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) {
323 sr_info("Enabling external test mode.");
324 flag = FLAG_EXTERNAL_TEST_MODE;
325 } else {
326 ret = SR_ERR;
327 }
328 if (flag != 0xffff) {
329 devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE);
330 devc->flag_reg |= flag;
331 }
332 break;
333 case SR_CONF_SWAP:
334 if (g_variant_get_boolean(data)) {
335 sr_info("Enabling channel swapping.");
336 devc->flag_reg |= FLAG_SWAP_CHANNELS;
337 } else {
338 sr_info("Disabling channel swapping.");
339 devc->flag_reg &= ~FLAG_SWAP_CHANNELS;
340 }
341 ret = SR_OK;
342 break;
343
344 case SR_CONF_RLE:
345 if (g_variant_get_boolean(data)) {
346 sr_info("Enabling RLE.");
347 devc->flag_reg |= FLAG_RLE;
348 } else {
349 sr_info("Disabling RLE.");
350 devc->flag_reg &= ~FLAG_RLE;
351 }
352 ret = SR_OK;
353 break;
354 default:
355 ret = SR_ERR_NA;
356 }
357
358 return ret;
359}
360
584560f1 361static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi,
4bd80e12 362 const struct sr_channel_group *cg)
363{
364 struct dev_context *devc;
365 GVariant *gvar, *grange[2];
366 GVariantBuilder gvb;
acc885c7 367 int num_pols_changrp, i;
4bd80e12 368
369 (void)cg;
370
371 switch (key) {
372 case SR_CONF_DEVICE_OPTIONS:
584560f1 373 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
f254bc4b 374 devopts, ARRAY_SIZE(devopts), sizeof(uint32_t));
4bd80e12 375 break;
376 case SR_CONF_SAMPLERATE:
377 g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}"));
378 gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates,
379 ARRAY_SIZE(samplerates), sizeof(uint64_t));
380 g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar);
381 *data = g_variant_builder_end(&gvb);
382 break;
acc885c7
BV
383 case SR_CONF_TRIGGER_MATCH:
384 *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
385 trigger_matches, ARRAY_SIZE(trigger_matches),
386 sizeof(int32_t));
4bd80e12 387 break;
388 case SR_CONF_PATTERN_MODE:
389 *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns));
390 break;
391 case SR_CONF_LIMIT_SAMPLES:
392 if (!sdi)
393 return SR_ERR_ARG;
394 devc = sdi->priv;
395 if (devc->flag_reg & FLAG_RLE)
396 return SR_ERR_NA;
b94cff40 397 if (devc->max_samplebytes == 0)
4bd80e12 398 /* Device didn't specify sample memory size in metadata. */
399 return SR_ERR_NA;
400 /*
401 * Channel groups are turned off if no channels in that group are
402 * enabled, making more room for samples for the enabled group.
403 */
acc885c7
BV
404 pols_channel_mask(sdi);
405 num_pols_changrp = 0;
4bd80e12 406 for (i = 0; i < 4; i++) {
407 if (devc->channel_mask & (0xff << (i * 8)))
acc885c7 408 num_pols_changrp++;
4bd80e12 409 }
b94cff40 410 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
411 if (num_pols_changrp == 3)
412 num_pols_changrp = 4;
4bd80e12 413 grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES);
acc885c7
BV
414 if (num_pols_changrp)
415 grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp);
416 else
417 grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES);
4bd80e12 418 *data = g_variant_new_tuple(grange, 2);
419 break;
420 default:
421 return SR_ERR_NA;
422 }
423
424 return SR_OK;
425}
426
427static int dev_open(struct sr_dev_inst *sdi)
428{
429 struct dev_context *devc;
4bd80e12 430
431 devc = sdi->priv;
432
433 if (p_ols_open(devc) != SR_OK) {
434 return SR_ERR;
435 } else {
dcd438ee 436 sdi->status = SR_ST_ACTIVE;
4bd80e12 437 return SR_OK;
438 }
439}
440
441static int dev_close(struct sr_dev_inst *sdi)
442{
443 int ret;
444 struct dev_context *devc;
445
446 ret = SR_OK;
447 devc = sdi->priv;
448
449 if (sdi->status == SR_ST_ACTIVE) {
450 sr_dbg("Status ACTIVE, closing device.");
451 ret = p_ols_close(devc);
452 } else {
453 sr_spew("Status not ACTIVE, nothing to do.");
454 }
455
456 sdi->status = SR_ST_INACTIVE;
457
458 return ret;
459}
460
4bd80e12 461static int set_trigger(const struct sr_dev_inst *sdi, int stage)
462{
463 struct dev_context *devc;
464 uint8_t cmd, arg[4];
465
466 devc = sdi->priv;
467
468 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
469 arg[0] = devc->trigger_mask[stage] & 0xff;
470 arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff;
471 arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff;
472 arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff;
473 if (write_longcommand(devc, cmd, arg) != SR_OK)
474 return SR_ERR;
475
476 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
477 arg[0] = devc->trigger_value[stage] & 0xff;
478 arg[1] = (devc->trigger_value[stage] >> 8) & 0xff;
479 arg[2] = (devc->trigger_value[stage] >> 16) & 0xff;
480 arg[3] = (devc->trigger_value[stage] >> 24) & 0xff;
481 if (write_longcommand(devc, cmd, arg) != SR_OK)
482 return SR_ERR;
483
484 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
485 arg[0] = arg[1] = arg[3] = 0x00;
486 arg[2] = stage;
487 if (stage == devc->num_stages)
488 /* Last stage, fire when this one matches. */
489 arg[3] |= TRIGGER_START;
490 if (write_longcommand(devc, cmd, arg) != SR_OK)
491 return SR_ERR;
492
1e0de846 493 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
494 arg[0] = devc->trigger_edge[stage] & 0xff;
495 arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff;
496 arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff;
497 arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff;
498 if (write_longcommand(devc, cmd, arg) != SR_OK)
499 return SR_ERR;
500
4bd80e12 501 return SR_OK;
502}
503
84cbaf77
BV
504static int disable_trigger(const struct sr_dev_inst *sdi, int stage)
505{
506 struct dev_context *devc;
507 uint8_t cmd, arg[4];
508
509 devc = sdi->priv;
510
511 cmd = CMD_SET_TRIGGER_MASK + stage * 4;
512 arg[0] = arg[1] = arg[2] = arg[3] = 0x00;
513 if (write_longcommand(devc, cmd, arg) != SR_OK)
514 return SR_ERR;
515
516 cmd = CMD_SET_TRIGGER_VALUE + stage * 4;
517 if (write_longcommand(devc, cmd, arg) != SR_OK)
518 return SR_ERR;
519
520 cmd = CMD_SET_TRIGGER_CONFIG + stage * 4;
521 arg[2] = 0x03;
522 if (write_longcommand(devc, cmd, arg) != SR_OK)
523 return SR_ERR;
524
525 cmd = CMD_SET_TRIGGER_EDGE + stage * 4;
526 arg[2] = 0x00;
527 if (write_longcommand(devc, cmd, arg) != SR_OK)
528 return SR_ERR;
529
530 return SR_OK;
531}
532
695dc859 533static int dev_acquisition_start(const struct sr_dev_inst *sdi)
4bd80e12 534{
535 struct dev_context *devc;
536 uint32_t samplecount, readcount, delaycount;
acc885c7 537 uint8_t pols_changrp_mask, arg[4];
b94cff40 538 uint16_t flag_tmp;
acc885c7 539 int num_pols_changrp, samplespercount;
4bd80e12 540 int ret, i;
541
542 if (sdi->status != SR_ST_ACTIVE)
543 return SR_ERR_DEV_CLOSED;
544
545 devc = sdi->priv;
546
acc885c7 547 pols_channel_mask(sdi);
4bd80e12 548
549 /*
550 * Enable/disable channel groups in the flag register according to the
acc885c7
BV
551 * channel mask. Calculate this here, because num_pols_changrp is
552 * needed to limit readcount.
4bd80e12 553 */
acc885c7
BV
554 pols_changrp_mask = 0;
555 num_pols_changrp = 0;
4bd80e12 556 for (i = 0; i < 4; i++) {
557 if (devc->channel_mask & (0xff << (i * 8))) {
acc885c7
BV
558 pols_changrp_mask |= (1 << i);
559 num_pols_changrp++;
4bd80e12 560 }
561 }
b94cff40 562 /* 3 channel groups takes as many bytes as 4 channel groups */
acc885c7
BV
563 if (num_pols_changrp == 3)
564 num_pols_changrp = 4;
b94cff40 565 /* maximum number of samples (or RLE counts) the buffer memory can hold */
acc885c7 566 devc->max_samples = devc->max_samplebytes / num_pols_changrp;
4bd80e12 567
568 /*
569 * Limit readcount to prevent reading past the end of the hardware
570 * buffer.
571 */
572 sr_dbg("max_samples = %d", devc->max_samples);
6433156c 573 sr_dbg("limit_samples = %" PRIu64, devc->limit_samples);
b94cff40 574 samplecount = MIN(devc->max_samples, devc->limit_samples);
4bd80e12 575 sr_dbg("Samplecount = %d", samplecount);
576
b94cff40 577 /* In demux mode the OLS is processing two samples per clock */
578 if (devc->flag_reg & FLAG_DEMUX) {
579 samplespercount = 8;
580 }
581 else {
582 samplespercount = 4;
583 }
584
585 readcount = samplecount / samplespercount;
586
4bd80e12 587 /* Rather read too many samples than too few. */
b94cff40 588 if (samplecount % samplespercount != 0)
4bd80e12 589 readcount++;
590
591 /* Basic triggers. */
acc885c7
BV
592 if (pols_convert_trigger(sdi) != SR_OK) {
593 sr_err("Failed to configure channels.");
594 return SR_ERR;
595 }
84cbaf77 596
acc885c7 597 if (devc->num_stages > 0) {
4bd80e12 598 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
b94cff40 599 devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages;
84cbaf77
BV
600 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
601 if (i <= devc->num_stages) {
602 sr_dbg("Setting p-ols stage %d trigger.", i);
603 if ((ret = set_trigger(sdi, i)) != SR_OK)
604 return ret;
605 }
606 else {
607 sr_dbg("Disabling p-ols stage %d trigger.", i);
608 if ((ret = disable_trigger(sdi, i)) != SR_OK)
609 return ret;
610 }
4bd80e12 611 }
612 } else {
613 /* No triggers configured, force trigger on first stage. */
614 sr_dbg("Forcing trigger at stage 0.");
615 if ((ret = set_trigger(sdi, 0)) != SR_OK)
616 return ret;
617 delaycount = readcount;
618 }
619
620 /* Samplerate. */
621 sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)",
622 devc->cur_samplerate, devc->cur_samplerate_divider);
623 arg[0] = devc->cur_samplerate_divider & 0xff;
624 arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8;
625 arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16;
626 arg[3] = 0x00;
627 if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK)
628 return SR_ERR;
acc885c7 629
4bd80e12 630 /* Send extended sample limit and pre/post-trigger capture ratio. */
631 arg[0] = ((readcount - 1) & 0xff);
632 arg[1] = ((readcount - 1) & 0xff00) >> 8;
633 arg[2] = ((readcount - 1) & 0xff0000) >> 16;
634 arg[3] = ((readcount - 1) & 0xff000000) >> 24;
1e0de846 635 if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK)
4bd80e12 636 return SR_ERR;
637 arg[0] = ((delaycount - 1) & 0xff);
638 arg[1] = ((delaycount - 1) & 0xff00) >> 8;
639 arg[2] = ((delaycount - 1) & 0xff0000) >> 16;
640 arg[3] = ((delaycount - 1) & 0xff000000) >> 24;
1e0de846 641 if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK)
4bd80e12 642 return SR_ERR;
acc885c7 643
4bd80e12 644 /* Flag register. */
645 sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s",
646 devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off",
647 devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off",
648 devc->flag_reg & FLAG_RLE ? "on" : "off",
649 devc->flag_reg & FLAG_FILTER ? "on": "off",
650 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
651
b94cff40 652 /*
653 * Enable/disable OLS channel groups in the flag register according
654 * to the channel mask. 1 means "disable channel".
655 */
656 devc->flag_reg &= ~0x3c;
acc885c7 657 devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c;
b94cff40 658 sr_dbg("flag_reg = %x", devc->flag_reg);
659
660 /*
661 * In demux mode the OLS is processing two 8-bit or 16-bit samples
662 * in parallel and for this to work the lower two bits of the four
663 * "channel_disable" bits must be replicated to the upper two bits.
664 */
665 flag_tmp = devc->flag_reg;
666 if (devc->flag_reg & FLAG_DEMUX) {
667 flag_tmp &= ~0x30;
acc885c7 668 flag_tmp |= ~(pols_changrp_mask << 4) & 0x30;
b94cff40 669 }
670 arg[0] = flag_tmp & 0xff;
671 arg[1] = flag_tmp >> 8;
4bd80e12 672 arg[2] = arg[3] = 0x00;
673 if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK)
674 return SR_ERR;
675
676 /* Start acquisition on the device. */
677 if (write_shortcommand(devc, CMD_RUN) != SR_OK)
678 return SR_ERR;
679
680 /* Reset all operational states. */
681 devc->rle_count = devc->num_transfers = 0;
682 devc->num_samples = devc->num_bytes = 0;
683 devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0;
684 memset(devc->sample, 0, 4);
685
695dc859 686 std_session_send_df_header(sdi, LOG_PREFIX);
4bd80e12 687
688 /* Hook up a dummy handler to receive data from the device. */
c650d3ec 689 sr_session_source_add(sdi->session, -1, 0, 10, p_ols_receive_data,
695dc859 690 (struct sr_dev_inst *)sdi);
4bd80e12 691
692 return SR_OK;
693}
694
695dc859 695static int dev_acquisition_stop(struct sr_dev_inst *sdi)
4bd80e12 696{
697 struct dev_context *devc;
4bd80e12 698
699 devc = sdi->priv;
700
701 sr_dbg("Stopping acquisition.");
702 write_shortcommand(devc, CMD_RESET);
703 write_shortcommand(devc, CMD_RESET);
704 write_shortcommand(devc, CMD_RESET);
705 write_shortcommand(devc, CMD_RESET);
706 write_shortcommand(devc, CMD_RESET);
707
dd7a4a71 708 sr_session_source_remove(sdi->session, -1);
4bd80e12 709
695dc859 710 std_session_send_df_end(sdi, LOG_PREFIX);
4bd80e12 711
712 return SR_OK;
713}
714
715SR_PRIV struct sr_dev_driver p_ols_driver_info = {
acc885c7 716 .name = "p-ols",
4bd80e12 717 .longname = "Pipistrello OLS",
718 .api_version = 1,
719 .init = init,
700d6b64 720 .cleanup = std_cleanup,
4bd80e12 721 .scan = scan,
722 .dev_list = dev_list,
723 .dev_clear = dev_clear,
724 .config_get = config_get,
725 .config_set = config_set,
726 .config_list = config_list,
727 .dev_open = dev_open,
728 .dev_close = dev_close,
729 .dev_acquisition_start = dev_acquisition_start,
730 .dev_acquisition_stop = dev_acquisition_stop,
41812aca 731 .context = NULL,
4bd80e12 732};