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4bd80e12 | 1 | /* |
2 | * This file is part of the libsigrok project. | |
3 | * | |
4 | * Copyright (C) 2013 Bert Vermeulen <bert@biot.com> | |
5 | * | |
6 | * This program is free software: you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation, either version 3 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #include "protocol.h" | |
21 | ||
4bd80e12 | 22 | static const int32_t hwcaps[] = { |
23 | SR_CONF_LOGIC_ANALYZER, | |
24 | SR_CONF_SAMPLERATE, | |
acc885c7 | 25 | SR_CONF_TRIGGER_MATCH, |
4bd80e12 | 26 | SR_CONF_CAPTURE_RATIO, |
27 | SR_CONF_LIMIT_SAMPLES, | |
28 | SR_CONF_PATTERN_MODE, | |
29 | SR_CONF_EXTERNAL_CLOCK, | |
30 | SR_CONF_SWAP, | |
31 | SR_CONF_RLE, | |
32 | }; | |
33 | ||
acc885c7 BV |
34 | static const int32_t trigger_matches[] = { |
35 | SR_TRIGGER_ZERO, | |
36 | SR_TRIGGER_ONE, | |
37 | SR_TRIGGER_RISING, | |
38 | SR_TRIGGER_FALLING, | |
39 | }; | |
40 | ||
4bd80e12 | 41 | #define STR_PATTERN_NONE "None" |
42 | #define STR_PATTERN_EXTERNAL "External" | |
43 | #define STR_PATTERN_INTERNAL "Internal" | |
44 | ||
45 | /* Supported methods of test pattern outputs */ | |
46 | enum { | |
47 | /** | |
48 | * Capture pins 31:16 (unbuffered wing) output a test pattern | |
49 | * that can captured on pins 0:15. | |
50 | */ | |
51 | PATTERN_EXTERNAL, | |
52 | ||
53 | /** Route test pattern internally to capture buffer. */ | |
54 | PATTERN_INTERNAL, | |
55 | }; | |
56 | ||
57 | static const char *patterns[] = { | |
58 | STR_PATTERN_NONE, | |
59 | STR_PATTERN_EXTERNAL, | |
60 | STR_PATTERN_INTERNAL, | |
61 | }; | |
62 | ||
63 | /* Channels are numbered 0-31 (on the PCB silkscreen). */ | |
64 | SR_PRIV const char *p_ols_channel_names[NUM_CHANNELS + 1] = { | |
65 | "0", "1", "2", "3", "4", "5", "6", "7", "8", "9", "10", "11", "12", | |
66 | "13", "14", "15", "16", "17", "18", "19", "20", "21", "22", "23", | |
67 | "24", "25", "26", "27", "28", "29", "30", "31", | |
68 | NULL, | |
69 | }; | |
70 | ||
71 | /* Default supported samplerates, can be overridden by device metadata. */ | |
72 | static const uint64_t samplerates[] = { | |
73 | SR_HZ(10), | |
74 | SR_MHZ(200), | |
75 | SR_HZ(1), | |
76 | }; | |
77 | ||
78 | SR_PRIV struct sr_dev_driver p_ols_driver_info; | |
79 | static struct sr_dev_driver *di = &p_ols_driver_info; | |
80 | ||
81 | static int init(struct sr_context *sr_ctx) | |
82 | { | |
83 | return std_init(sr_ctx, di, LOG_PREFIX); | |
84 | } | |
85 | ||
86 | static GSList *scan(GSList *options) | |
87 | { | |
88 | struct sr_dev_inst *sdi; | |
89 | struct drv_context *drvc; | |
90 | struct dev_context *devc; | |
91 | GSList *devices; | |
92 | int ret, i; | |
93 | char buf[70]; | |
94 | int bytes_read; | |
95 | ||
96 | (void)options; | |
97 | ||
98 | drvc = di->priv; | |
99 | ||
100 | devices = NULL; | |
101 | ||
102 | /* Allocate memory for our private device context. */ | |
103 | if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) { | |
104 | sr_err("Device context malloc failed."); | |
105 | goto err_free_nothing; | |
106 | } | |
107 | ||
108 | /* Device-specific settings */ | |
b94cff40 | 109 | devc->max_samplebytes = devc->max_samplerate = devc->protocol_version = 0; |
4bd80e12 | 110 | |
111 | /* Acquisition settings */ | |
112 | devc->limit_samples = devc->capture_ratio = 0; | |
113 | devc->trigger_at = -1; | |
114 | devc->channel_mask = 0xffffffff; | |
115 | devc->flag_reg = 0; | |
116 | ||
117 | /* Allocate memory for the incoming ftdi data. */ | |
118 | if (!(devc->ftdi_buf = g_try_malloc0(FTDI_BUF_SIZE))) { | |
119 | sr_err("ftdi_buf malloc failed."); | |
120 | goto err_free_devc; | |
121 | } | |
122 | ||
123 | /* Allocate memory for the FTDI context (ftdic) and initialize it. */ | |
124 | if (!(devc->ftdic = ftdi_new())) { | |
125 | sr_err("Failed to initialize libftdi."); | |
126 | goto err_free_ftdi_buf;; | |
127 | } | |
128 | ||
129 | /* Try to open the FTDI device */ | |
130 | if (p_ols_open(devc) != SR_OK) { | |
131 | goto err_free_ftdic; | |
132 | } | |
133 | ||
134 | /* The discovery procedure is like this: first send the Reset | |
135 | * command (0x00) 5 times, since the device could be anywhere | |
136 | * in a 5-byte command. Then send the ID command (0x02). | |
137 | * If the device responds with 4 bytes ("OLS1" or "SLA1"), we | |
138 | * have a match. | |
139 | */ | |
140 | ||
141 | ret = SR_OK; | |
142 | for (i = 0; i < 5; i++) { | |
143 | if ((ret = write_shortcommand(devc, CMD_RESET)) != SR_OK) { | |
144 | break; | |
145 | } | |
146 | } | |
147 | if (ret != SR_OK) { | |
148 | sr_err("Could not reset device. Quitting."); | |
149 | goto err_close_ftdic; | |
150 | } | |
151 | write_shortcommand(devc, CMD_ID); | |
152 | ||
153 | /* Read the response data. */ | |
154 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 4); | |
155 | if (bytes_read < 0) { | |
156 | sr_err("Failed to read FTDI data (%d): %s.", | |
157 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
158 | goto err_close_ftdic; | |
159 | } | |
160 | if (bytes_read == 0) { | |
161 | goto err_close_ftdic; | |
162 | } | |
163 | ||
164 | if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4)) | |
165 | goto err_close_ftdic; | |
166 | ||
167 | /* Definitely using the OLS protocol, check if it supports | |
168 | * the metadata command. | |
169 | */ | |
170 | write_shortcommand(devc, CMD_METADATA); | |
171 | ||
172 | /* Read the metadata. */ | |
173 | bytes_read = ftdi_read_data(devc->ftdic, (uint8_t *)buf, 64); | |
174 | if (bytes_read < 0) { | |
175 | sr_err("Failed to read FTDI data (%d): %s.", | |
176 | bytes_read, ftdi_get_error_string(devc->ftdic)); | |
177 | goto err_close_ftdic; | |
178 | } | |
179 | if (bytes_read == 0) { | |
180 | goto err_close_ftdic; | |
181 | } | |
182 | ||
183 | /* Close device. We'll reopen it again when we need it. */ | |
184 | p_ols_close(devc); | |
185 | ||
186 | /* Parse the metadata. */ | |
187 | sdi = p_ols_get_metadata((uint8_t *)buf, bytes_read, devc); | |
188 | sdi->index = 0; | |
189 | ||
190 | /* Configure samplerate and divider. */ | |
191 | if (p_ols_set_samplerate(sdi, DEFAULT_SAMPLERATE) != SR_OK) | |
192 | sr_dbg("Failed to set default samplerate (%"PRIu64").", | |
193 | DEFAULT_SAMPLERATE); | |
4bd80e12 | 194 | |
195 | drvc->instances = g_slist_append(drvc->instances, sdi); | |
196 | devices = g_slist_append(devices, sdi); | |
197 | ||
198 | return devices; | |
199 | ||
200 | err_close_ftdic: | |
201 | p_ols_close(devc); | |
202 | err_free_ftdic: | |
203 | ftdi_free(devc->ftdic); /* NOT free() or g_free()! */ | |
204 | err_free_ftdi_buf: | |
205 | g_free(devc->ftdi_buf); | |
206 | err_free_devc: | |
207 | g_free(devc); | |
208 | err_free_nothing: | |
209 | ||
210 | return NULL; | |
211 | } | |
212 | ||
213 | static GSList *dev_list(void) | |
214 | { | |
215 | return ((struct drv_context *)(di->priv))->instances; | |
216 | } | |
217 | ||
218 | static void clear_helper(void *priv) | |
219 | { | |
220 | struct dev_context *devc; | |
221 | ||
222 | devc = priv; | |
223 | ||
224 | ftdi_free(devc->ftdic); | |
225 | g_free(devc->ftdi_buf); | |
226 | } | |
227 | ||
228 | static int dev_clear(void) | |
229 | { | |
230 | return std_dev_clear(di, clear_helper); | |
231 | } | |
232 | ||
233 | static int cleanup(void) | |
234 | { | |
235 | return dev_clear(); | |
236 | } | |
237 | ||
238 | ||
239 | static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, | |
240 | const struct sr_channel_group *cg) | |
241 | { | |
242 | struct dev_context *devc; | |
243 | ||
244 | (void)cg; | |
245 | ||
246 | if (!sdi) | |
247 | return SR_ERR_ARG; | |
248 | ||
249 | devc = sdi->priv; | |
250 | switch (id) { | |
251 | case SR_CONF_SAMPLERATE: | |
252 | *data = g_variant_new_uint64(devc->cur_samplerate); | |
253 | break; | |
254 | case SR_CONF_CAPTURE_RATIO: | |
255 | *data = g_variant_new_uint64(devc->capture_ratio); | |
256 | break; | |
257 | case SR_CONF_LIMIT_SAMPLES: | |
258 | *data = g_variant_new_uint64(devc->limit_samples); | |
259 | break; | |
260 | case SR_CONF_PATTERN_MODE: | |
261 | if (devc->flag_reg & FLAG_EXTERNAL_TEST_MODE) | |
262 | *data = g_variant_new_string(STR_PATTERN_EXTERNAL); | |
263 | else if (devc->flag_reg & FLAG_INTERNAL_TEST_MODE) | |
264 | *data = g_variant_new_string(STR_PATTERN_INTERNAL); | |
265 | else | |
266 | *data = g_variant_new_string(STR_PATTERN_NONE); | |
267 | break; | |
268 | case SR_CONF_RLE: | |
269 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_RLE ? TRUE : FALSE); | |
270 | break; | |
271 | case SR_CONF_EXTERNAL_CLOCK: | |
272 | *data = g_variant_new_boolean(devc->flag_reg & FLAG_CLOCK_EXTERNAL ? TRUE : FALSE); | |
273 | break; | |
274 | default: | |
275 | return SR_ERR_NA; | |
276 | } | |
277 | ||
278 | return SR_OK; | |
279 | } | |
280 | ||
281 | static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, | |
282 | const struct sr_channel_group *cg) | |
283 | { | |
284 | struct dev_context *devc; | |
285 | uint16_t flag; | |
286 | uint64_t tmp_u64; | |
287 | int ret; | |
288 | const char *stropt; | |
289 | ||
290 | (void)cg; | |
291 | ||
292 | if (sdi->status != SR_ST_ACTIVE) | |
293 | return SR_ERR_DEV_CLOSED; | |
294 | ||
295 | devc = sdi->priv; | |
296 | ||
297 | switch (id) { | |
298 | case SR_CONF_SAMPLERATE: | |
299 | tmp_u64 = g_variant_get_uint64(data); | |
300 | if (tmp_u64 < samplerates[0] || tmp_u64 > samplerates[1]) | |
301 | return SR_ERR_SAMPLERATE; | |
302 | ret = p_ols_set_samplerate(sdi, g_variant_get_uint64(data)); | |
303 | break; | |
304 | case SR_CONF_LIMIT_SAMPLES: | |
305 | tmp_u64 = g_variant_get_uint64(data); | |
306 | if (tmp_u64 < MIN_NUM_SAMPLES) | |
307 | return SR_ERR; | |
308 | devc->limit_samples = tmp_u64; | |
309 | ret = SR_OK; | |
310 | break; | |
311 | case SR_CONF_CAPTURE_RATIO: | |
312 | devc->capture_ratio = g_variant_get_uint64(data); | |
313 | if (devc->capture_ratio < 0 || devc->capture_ratio > 100) { | |
314 | devc->capture_ratio = 0; | |
315 | ret = SR_ERR; | |
316 | } else | |
317 | ret = SR_OK; | |
318 | break; | |
319 | case SR_CONF_EXTERNAL_CLOCK: | |
320 | if (g_variant_get_boolean(data)) { | |
321 | sr_info("Enabling external clock."); | |
322 | devc->flag_reg |= FLAG_CLOCK_EXTERNAL; | |
323 | } else { | |
324 | sr_info("Disabled external clock."); | |
325 | devc->flag_reg &= ~FLAG_CLOCK_EXTERNAL; | |
326 | } | |
327 | ret = SR_OK; | |
328 | break; | |
329 | case SR_CONF_PATTERN_MODE: | |
330 | stropt = g_variant_get_string(data, NULL); | |
331 | ret = SR_OK; | |
332 | flag = 0xffff; | |
333 | if (!strcmp(stropt, STR_PATTERN_NONE)) { | |
334 | sr_info("Disabling test modes."); | |
335 | flag = 0x0000; | |
336 | }else if (!strcmp(stropt, STR_PATTERN_INTERNAL)) { | |
337 | sr_info("Enabling internal test mode."); | |
338 | flag = FLAG_INTERNAL_TEST_MODE; | |
339 | } else if (!strcmp(stropt, STR_PATTERN_EXTERNAL)) { | |
340 | sr_info("Enabling external test mode."); | |
341 | flag = FLAG_EXTERNAL_TEST_MODE; | |
342 | } else { | |
343 | ret = SR_ERR; | |
344 | } | |
345 | if (flag != 0xffff) { | |
346 | devc->flag_reg &= ~(FLAG_INTERNAL_TEST_MODE | FLAG_EXTERNAL_TEST_MODE); | |
347 | devc->flag_reg |= flag; | |
348 | } | |
349 | break; | |
350 | case SR_CONF_SWAP: | |
351 | if (g_variant_get_boolean(data)) { | |
352 | sr_info("Enabling channel swapping."); | |
353 | devc->flag_reg |= FLAG_SWAP_CHANNELS; | |
354 | } else { | |
355 | sr_info("Disabling channel swapping."); | |
356 | devc->flag_reg &= ~FLAG_SWAP_CHANNELS; | |
357 | } | |
358 | ret = SR_OK; | |
359 | break; | |
360 | ||
361 | case SR_CONF_RLE: | |
362 | if (g_variant_get_boolean(data)) { | |
363 | sr_info("Enabling RLE."); | |
364 | devc->flag_reg |= FLAG_RLE; | |
365 | } else { | |
366 | sr_info("Disabling RLE."); | |
367 | devc->flag_reg &= ~FLAG_RLE; | |
368 | } | |
369 | ret = SR_OK; | |
370 | break; | |
371 | default: | |
372 | ret = SR_ERR_NA; | |
373 | } | |
374 | ||
375 | return ret; | |
376 | } | |
377 | ||
378 | static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, | |
379 | const struct sr_channel_group *cg) | |
380 | { | |
381 | struct dev_context *devc; | |
382 | GVariant *gvar, *grange[2]; | |
383 | GVariantBuilder gvb; | |
acc885c7 | 384 | int num_pols_changrp, i; |
4bd80e12 | 385 | |
386 | (void)cg; | |
387 | ||
388 | switch (key) { | |
389 | case SR_CONF_DEVICE_OPTIONS: | |
390 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
391 | hwcaps, ARRAY_SIZE(hwcaps), sizeof(int32_t)); | |
392 | break; | |
393 | case SR_CONF_SAMPLERATE: | |
394 | g_variant_builder_init(&gvb, G_VARIANT_TYPE("a{sv}")); | |
395 | gvar = g_variant_new_fixed_array(G_VARIANT_TYPE("t"), samplerates, | |
396 | ARRAY_SIZE(samplerates), sizeof(uint64_t)); | |
397 | g_variant_builder_add(&gvb, "{sv}", "samplerate-steps", gvar); | |
398 | *data = g_variant_builder_end(&gvb); | |
399 | break; | |
acc885c7 BV |
400 | case SR_CONF_TRIGGER_MATCH: |
401 | *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32, | |
402 | trigger_matches, ARRAY_SIZE(trigger_matches), | |
403 | sizeof(int32_t)); | |
4bd80e12 | 404 | break; |
405 | case SR_CONF_PATTERN_MODE: | |
406 | *data = g_variant_new_strv(patterns, ARRAY_SIZE(patterns)); | |
407 | break; | |
408 | case SR_CONF_LIMIT_SAMPLES: | |
409 | if (!sdi) | |
410 | return SR_ERR_ARG; | |
411 | devc = sdi->priv; | |
412 | if (devc->flag_reg & FLAG_RLE) | |
413 | return SR_ERR_NA; | |
b94cff40 | 414 | if (devc->max_samplebytes == 0) |
4bd80e12 | 415 | /* Device didn't specify sample memory size in metadata. */ |
416 | return SR_ERR_NA; | |
417 | /* | |
418 | * Channel groups are turned off if no channels in that group are | |
419 | * enabled, making more room for samples for the enabled group. | |
420 | */ | |
acc885c7 BV |
421 | pols_channel_mask(sdi); |
422 | num_pols_changrp = 0; | |
4bd80e12 | 423 | for (i = 0; i < 4; i++) { |
424 | if (devc->channel_mask & (0xff << (i * 8))) | |
acc885c7 | 425 | num_pols_changrp++; |
4bd80e12 | 426 | } |
b94cff40 | 427 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
428 | if (num_pols_changrp == 3) |
429 | num_pols_changrp = 4; | |
4bd80e12 | 430 | grange[0] = g_variant_new_uint64(MIN_NUM_SAMPLES); |
acc885c7 BV |
431 | if (num_pols_changrp) |
432 | grange[1] = g_variant_new_uint64(devc->max_samplebytes / num_pols_changrp); | |
433 | else | |
434 | grange[1] = g_variant_new_uint64(MIN_NUM_SAMPLES); | |
4bd80e12 | 435 | *data = g_variant_new_tuple(grange, 2); |
436 | break; | |
437 | default: | |
438 | return SR_ERR_NA; | |
439 | } | |
440 | ||
441 | return SR_OK; | |
442 | } | |
443 | ||
444 | static int dev_open(struct sr_dev_inst *sdi) | |
445 | { | |
446 | struct dev_context *devc; | |
4bd80e12 | 447 | |
448 | devc = sdi->priv; | |
449 | ||
450 | if (p_ols_open(devc) != SR_OK) { | |
451 | return SR_ERR; | |
452 | } else { | |
453 | sdi->status = SR_ST_ACTIVE; | |
454 | return SR_OK; | |
455 | } | |
456 | } | |
457 | ||
458 | static int dev_close(struct sr_dev_inst *sdi) | |
459 | { | |
460 | int ret; | |
461 | struct dev_context *devc; | |
462 | ||
463 | ret = SR_OK; | |
464 | devc = sdi->priv; | |
465 | ||
466 | if (sdi->status == SR_ST_ACTIVE) { | |
467 | sr_dbg("Status ACTIVE, closing device."); | |
468 | ret = p_ols_close(devc); | |
469 | } else { | |
470 | sr_spew("Status not ACTIVE, nothing to do."); | |
471 | } | |
472 | ||
473 | sdi->status = SR_ST_INACTIVE; | |
474 | ||
475 | return ret; | |
476 | } | |
477 | ||
478 | ||
479 | static int set_trigger(const struct sr_dev_inst *sdi, int stage) | |
480 | { | |
481 | struct dev_context *devc; | |
482 | uint8_t cmd, arg[4]; | |
483 | ||
484 | devc = sdi->priv; | |
485 | ||
486 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
487 | arg[0] = devc->trigger_mask[stage] & 0xff; | |
488 | arg[1] = (devc->trigger_mask[stage] >> 8) & 0xff; | |
489 | arg[2] = (devc->trigger_mask[stage] >> 16) & 0xff; | |
490 | arg[3] = (devc->trigger_mask[stage] >> 24) & 0xff; | |
491 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
492 | return SR_ERR; | |
493 | ||
494 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
495 | arg[0] = devc->trigger_value[stage] & 0xff; | |
496 | arg[1] = (devc->trigger_value[stage] >> 8) & 0xff; | |
497 | arg[2] = (devc->trigger_value[stage] >> 16) & 0xff; | |
498 | arg[3] = (devc->trigger_value[stage] >> 24) & 0xff; | |
499 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
500 | return SR_ERR; | |
501 | ||
502 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
503 | arg[0] = arg[1] = arg[3] = 0x00; | |
504 | arg[2] = stage; | |
505 | if (stage == devc->num_stages) | |
506 | /* Last stage, fire when this one matches. */ | |
507 | arg[3] |= TRIGGER_START; | |
508 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
509 | return SR_ERR; | |
510 | ||
1e0de846 | 511 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; |
512 | arg[0] = devc->trigger_edge[stage] & 0xff; | |
513 | arg[1] = (devc->trigger_edge[stage] >> 8) & 0xff; | |
514 | arg[2] = (devc->trigger_edge[stage] >> 16) & 0xff; | |
515 | arg[3] = (devc->trigger_edge[stage] >> 24) & 0xff; | |
516 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
517 | return SR_ERR; | |
518 | ||
4bd80e12 | 519 | return SR_OK; |
520 | } | |
521 | ||
84cbaf77 BV |
522 | static int disable_trigger(const struct sr_dev_inst *sdi, int stage) |
523 | { | |
524 | struct dev_context *devc; | |
525 | uint8_t cmd, arg[4]; | |
526 | ||
527 | devc = sdi->priv; | |
528 | ||
529 | cmd = CMD_SET_TRIGGER_MASK + stage * 4; | |
530 | arg[0] = arg[1] = arg[2] = arg[3] = 0x00; | |
531 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
532 | return SR_ERR; | |
533 | ||
534 | cmd = CMD_SET_TRIGGER_VALUE + stage * 4; | |
535 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
536 | return SR_ERR; | |
537 | ||
538 | cmd = CMD_SET_TRIGGER_CONFIG + stage * 4; | |
539 | arg[2] = 0x03; | |
540 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
541 | return SR_ERR; | |
542 | ||
543 | cmd = CMD_SET_TRIGGER_EDGE + stage * 4; | |
544 | arg[2] = 0x00; | |
545 | if (write_longcommand(devc, cmd, arg) != SR_OK) | |
546 | return SR_ERR; | |
547 | ||
548 | return SR_OK; | |
549 | } | |
550 | ||
4bd80e12 | 551 | static int dev_acquisition_start(const struct sr_dev_inst *sdi, |
552 | void *cb_data) | |
553 | { | |
554 | struct dev_context *devc; | |
555 | uint32_t samplecount, readcount, delaycount; | |
acc885c7 | 556 | uint8_t pols_changrp_mask, arg[4]; |
b94cff40 | 557 | uint16_t flag_tmp; |
acc885c7 | 558 | int num_pols_changrp, samplespercount; |
4bd80e12 | 559 | int ret, i; |
560 | ||
561 | if (sdi->status != SR_ST_ACTIVE) | |
562 | return SR_ERR_DEV_CLOSED; | |
563 | ||
564 | devc = sdi->priv; | |
565 | ||
acc885c7 | 566 | pols_channel_mask(sdi); |
4bd80e12 | 567 | |
568 | /* | |
569 | * Enable/disable channel groups in the flag register according to the | |
acc885c7 BV |
570 | * channel mask. Calculate this here, because num_pols_changrp is |
571 | * needed to limit readcount. | |
4bd80e12 | 572 | */ |
acc885c7 BV |
573 | pols_changrp_mask = 0; |
574 | num_pols_changrp = 0; | |
4bd80e12 | 575 | for (i = 0; i < 4; i++) { |
576 | if (devc->channel_mask & (0xff << (i * 8))) { | |
acc885c7 BV |
577 | pols_changrp_mask |= (1 << i); |
578 | num_pols_changrp++; | |
4bd80e12 | 579 | } |
580 | } | |
b94cff40 | 581 | /* 3 channel groups takes as many bytes as 4 channel groups */ |
acc885c7 BV |
582 | if (num_pols_changrp == 3) |
583 | num_pols_changrp = 4; | |
b94cff40 | 584 | /* maximum number of samples (or RLE counts) the buffer memory can hold */ |
acc885c7 | 585 | devc->max_samples = devc->max_samplebytes / num_pols_changrp; |
4bd80e12 | 586 | |
587 | /* | |
588 | * Limit readcount to prevent reading past the end of the hardware | |
589 | * buffer. | |
590 | */ | |
591 | sr_dbg("max_samples = %d", devc->max_samples); | |
592 | sr_dbg("limit_samples = %d", devc->limit_samples); | |
b94cff40 | 593 | samplecount = MIN(devc->max_samples, devc->limit_samples); |
4bd80e12 | 594 | sr_dbg("Samplecount = %d", samplecount); |
595 | ||
b94cff40 | 596 | /* In demux mode the OLS is processing two samples per clock */ |
597 | if (devc->flag_reg & FLAG_DEMUX) { | |
598 | samplespercount = 8; | |
599 | } | |
600 | else { | |
601 | samplespercount = 4; | |
602 | } | |
603 | ||
604 | readcount = samplecount / samplespercount; | |
605 | ||
4bd80e12 | 606 | /* Rather read too many samples than too few. */ |
b94cff40 | 607 | if (samplecount % samplespercount != 0) |
4bd80e12 | 608 | readcount++; |
609 | ||
610 | /* Basic triggers. */ | |
acc885c7 BV |
611 | if (pols_convert_trigger(sdi) != SR_OK) { |
612 | sr_err("Failed to configure channels."); | |
613 | return SR_ERR; | |
614 | } | |
84cbaf77 | 615 | |
acc885c7 | 616 | if (devc->num_stages > 0) { |
4bd80e12 | 617 | delaycount = readcount * (1 - devc->capture_ratio / 100.0); |
b94cff40 | 618 | devc->trigger_at = (readcount - delaycount) * samplespercount - devc->num_stages; |
84cbaf77 BV |
619 | for (i = 0; i < NUM_TRIGGER_STAGES; i++) { |
620 | if (i <= devc->num_stages) { | |
621 | sr_dbg("Setting p-ols stage %d trigger.", i); | |
622 | if ((ret = set_trigger(sdi, i)) != SR_OK) | |
623 | return ret; | |
624 | } | |
625 | else { | |
626 | sr_dbg("Disabling p-ols stage %d trigger.", i); | |
627 | if ((ret = disable_trigger(sdi, i)) != SR_OK) | |
628 | return ret; | |
629 | } | |
4bd80e12 | 630 | } |
631 | } else { | |
632 | /* No triggers configured, force trigger on first stage. */ | |
633 | sr_dbg("Forcing trigger at stage 0."); | |
634 | if ((ret = set_trigger(sdi, 0)) != SR_OK) | |
635 | return ret; | |
636 | delaycount = readcount; | |
637 | } | |
638 | ||
639 | /* Samplerate. */ | |
640 | sr_dbg("Setting samplerate to %" PRIu64 "Hz (divider %u)", | |
641 | devc->cur_samplerate, devc->cur_samplerate_divider); | |
642 | arg[0] = devc->cur_samplerate_divider & 0xff; | |
643 | arg[1] = (devc->cur_samplerate_divider & 0xff00) >> 8; | |
644 | arg[2] = (devc->cur_samplerate_divider & 0xff0000) >> 16; | |
645 | arg[3] = 0x00; | |
646 | if (write_longcommand(devc, CMD_SET_DIVIDER, arg) != SR_OK) | |
647 | return SR_ERR; | |
acc885c7 | 648 | |
4bd80e12 | 649 | /* Send extended sample limit and pre/post-trigger capture ratio. */ |
650 | arg[0] = ((readcount - 1) & 0xff); | |
651 | arg[1] = ((readcount - 1) & 0xff00) >> 8; | |
652 | arg[2] = ((readcount - 1) & 0xff0000) >> 16; | |
653 | arg[3] = ((readcount - 1) & 0xff000000) >> 24; | |
1e0de846 | 654 | if (write_longcommand(devc, CMD_CAPTURE_DELAY, arg) != SR_OK) |
4bd80e12 | 655 | return SR_ERR; |
656 | arg[0] = ((delaycount - 1) & 0xff); | |
657 | arg[1] = ((delaycount - 1) & 0xff00) >> 8; | |
658 | arg[2] = ((delaycount - 1) & 0xff0000) >> 16; | |
659 | arg[3] = ((delaycount - 1) & 0xff000000) >> 24; | |
1e0de846 | 660 | if (write_longcommand(devc, CMD_CAPTURE_COUNT, arg) != SR_OK) |
4bd80e12 | 661 | return SR_ERR; |
acc885c7 | 662 | |
4bd80e12 | 663 | /* Flag register. */ |
664 | sr_dbg("Setting intpat %s, extpat %s, RLE %s, noise_filter %s, demux %s", | |
665 | devc->flag_reg & FLAG_INTERNAL_TEST_MODE ? "on": "off", | |
666 | devc->flag_reg & FLAG_EXTERNAL_TEST_MODE ? "on": "off", | |
667 | devc->flag_reg & FLAG_RLE ? "on" : "off", | |
668 | devc->flag_reg & FLAG_FILTER ? "on": "off", | |
669 | devc->flag_reg & FLAG_DEMUX ? "on" : "off"); | |
670 | ||
b94cff40 | 671 | /* |
672 | * Enable/disable OLS channel groups in the flag register according | |
673 | * to the channel mask. 1 means "disable channel". | |
674 | */ | |
675 | devc->flag_reg &= ~0x3c; | |
acc885c7 | 676 | devc->flag_reg |= ~(pols_changrp_mask << 2) & 0x3c; |
b94cff40 | 677 | sr_dbg("flag_reg = %x", devc->flag_reg); |
678 | ||
679 | /* | |
680 | * In demux mode the OLS is processing two 8-bit or 16-bit samples | |
681 | * in parallel and for this to work the lower two bits of the four | |
682 | * "channel_disable" bits must be replicated to the upper two bits. | |
683 | */ | |
684 | flag_tmp = devc->flag_reg; | |
685 | if (devc->flag_reg & FLAG_DEMUX) { | |
686 | flag_tmp &= ~0x30; | |
acc885c7 | 687 | flag_tmp |= ~(pols_changrp_mask << 4) & 0x30; |
b94cff40 | 688 | } |
689 | arg[0] = flag_tmp & 0xff; | |
690 | arg[1] = flag_tmp >> 8; | |
4bd80e12 | 691 | arg[2] = arg[3] = 0x00; |
692 | if (write_longcommand(devc, CMD_SET_FLAGS, arg) != SR_OK) | |
693 | return SR_ERR; | |
694 | ||
695 | /* Start acquisition on the device. */ | |
696 | if (write_shortcommand(devc, CMD_RUN) != SR_OK) | |
697 | return SR_ERR; | |
698 | ||
699 | /* Reset all operational states. */ | |
700 | devc->rle_count = devc->num_transfers = 0; | |
701 | devc->num_samples = devc->num_bytes = 0; | |
702 | devc->cnt_bytes = devc->cnt_samples = devc->cnt_samples_rle = 0; | |
703 | memset(devc->sample, 0, 4); | |
704 | ||
705 | /* Send header packet to the session bus. */ | |
706 | std_session_send_df_header(cb_data, LOG_PREFIX); | |
707 | ||
708 | /* Hook up a dummy handler to receive data from the device. */ | |
acc885c7 BV |
709 | sr_session_source_add(sdi->session, 0, G_IO_IN, 10, p_ols_receive_data, |
710 | cb_data); | |
4bd80e12 | 711 | |
712 | return SR_OK; | |
713 | } | |
714 | ||
715 | ||
716 | ||
717 | static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) | |
718 | { | |
719 | struct dev_context *devc; | |
720 | struct sr_datafeed_packet packet; | |
721 | ||
722 | devc = sdi->priv; | |
723 | ||
724 | sr_dbg("Stopping acquisition."); | |
725 | write_shortcommand(devc, CMD_RESET); | |
726 | write_shortcommand(devc, CMD_RESET); | |
727 | write_shortcommand(devc, CMD_RESET); | |
728 | write_shortcommand(devc, CMD_RESET); | |
729 | write_shortcommand(devc, CMD_RESET); | |
730 | ||
acc885c7 | 731 | sr_session_source_remove(sdi->session, 0); |
4bd80e12 | 732 | |
733 | /* Send end packet to the session bus. */ | |
734 | sr_dbg("Sending SR_DF_END."); | |
735 | packet.type = SR_DF_END; | |
736 | sr_session_send(cb_data, &packet); | |
737 | ||
738 | return SR_OK; | |
739 | } | |
740 | ||
741 | SR_PRIV struct sr_dev_driver p_ols_driver_info = { | |
acc885c7 | 742 | .name = "p-ols", |
4bd80e12 | 743 | .longname = "Pipistrello OLS", |
744 | .api_version = 1, | |
745 | .init = init, | |
746 | .cleanup = cleanup, | |
747 | .scan = scan, | |
748 | .dev_list = dev_list, | |
749 | .dev_clear = dev_clear, | |
750 | .config_get = config_get, | |
751 | .config_set = config_set, | |
752 | .config_list = config_list, | |
753 | .dev_open = dev_open, | |
754 | .dev_close = dev_close, | |
755 | .dev_acquisition_start = dev_acquisition_start, | |
756 | .dev_acquisition_stop = dev_acquisition_stop, | |
757 | .priv = NULL, | |
758 | }; |