]> sigrok.org Git - libsigrok.git/blame - src/hardware/motech-lps-30x/protocol.c
Add sr_dev_acquisition_stop(), factor out SR_ERR_DEV_CLOSED check.
[libsigrok.git] / src / hardware / motech-lps-30x / protocol.c
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1/*
2 * This file is part of the libsigrok project.
3 *
4 * Copyright (C) 2014 Matthias Heidbrink <m-sigrok@heidbrink.biz>
1c3d002b 5 * Copyright (C) 2014 Bert Vermeulen <bert@biot.com> (code from atten-pps3xxx)
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6 *
7 * This program is free software: you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation, either version 3 of the License, or
10 * (at your option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
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21/**
22 * @file
23 *
24 * <em>Motech LPS-30x series</em> power supply driver
25 *
26 * @internal
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27 */
28
6ec6c43b 29#include <config.h>
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30#include <errno.h>
31#include <string.h>
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32#include "protocol.h"
33
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34/** Send data packets for current measurements. */
35static void send_data(struct sr_dev_inst *sdi)
36{
37 struct dev_context *devc;
38 struct sr_datafeed_packet packet;
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39 struct sr_datafeed_analog analog;
40 struct sr_analog_encoding encoding;
41 struct sr_analog_meaning meaning;
42 struct sr_analog_spec spec;
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43 int i;
44 float data[MAX_CHANNELS];
45
46 devc = sdi->priv;
ddfe99d9 47 packet.type = SR_DF_ANALOG;
1c3d002b 48 packet.payload = &analog;
1c3d002b 49
869c8375 50 /* Note: digits/spec_digits will be overridden later. */
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51 sr_analog_init(&analog, &encoding, &meaning, &spec, 0);
52
53 analog.meaning->channels = sdi->channels;
54 analog.num_samples = 1;
55 analog.meaning->mq = SR_MQ_VOLTAGE;
56 analog.meaning->unit = SR_UNIT_VOLT;
57 analog.meaning->mqflags = SR_MQFLAG_DC;
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58 analog.encoding->digits = 3;
59 analog.spec->spec_digits = 2;
1c3d002b 60 analog.data = data;
ddfe99d9 61
1c3d002b 62 for (i = 0; i < devc->model->num_channels; i++)
ddfe99d9 63 ((float *)analog.data)[i] = devc->channel_status[i].output_voltage_last; /* Value always 3.3 or 5 for channel 3, if present! */
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64 sr_session_send(sdi, &packet);
65
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66 analog.meaning->mq = SR_MQ_CURRENT;
67 analog.meaning->unit = SR_UNIT_AMPERE;
68 analog.meaning->mqflags = 0;
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69 analog.encoding->digits = 4;
70 analog.spec->spec_digits = 3;
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71 analog.data = data;
72 for (i = 0; i < devc->model->num_channels; i++)
ddfe99d9 73 ((float *)analog.data)[i] = devc->channel_status[i].output_current_last; /* Value always 0 for channel 3, if present! */
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74 sr_session_send(sdi, &packet);
75
8aafc5e6 76 sr_sw_limits_update_samples_read(&devc->limits, 1);
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77}
78
79/** Process a complete line (without CR/LF) in buf. */
80static void process_line(struct sr_dev_inst *sdi)
81{
82 struct dev_context *devc;
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83 double dbl;
84 int auxint;
85
86 devc = sdi->priv;
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87
88 switch (devc->acq_req_pending) {
89 case 0: /* Should not happen... */
90 break;
91 case 1: /* Waiting for data reply to request */
92 /* Convert numbers */
93 switch (devc->acq_req) {
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94 case AQ_U1:
95 case AQ_U2:
96 case AQ_I1:
97 case AQ_I2:
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98 if (sr_atod(devc->buf, &dbl) != SR_OK) {
99 sr_err("Failed to convert '%s' to double, errno=%d %s",
7237e912 100 devc->buf, errno, g_strerror(errno));
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101 dbl = 0.0;
102 }
103 break;
104 case AQ_STATUS:
105 if (sr_atoi(devc->buf, &auxint) != SR_OK) {
106 sr_err("Failed to convert '%s' to int, errno=%d %s",
7237e912 107 devc->buf, errno, g_strerror(errno));
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108 auxint = 0;
109 }
110 break;
111 default:
112 break;
113 }
114
115 switch (devc->acq_req) {
116 case AQ_U1:
117 devc->channel_status[0].output_voltage_last = dbl;
118 break;
119 case AQ_I1:
120 devc->channel_status[0].output_current_last = dbl;
121 break;
122 case AQ_U2:
123 devc->channel_status[1].output_voltage_last = dbl;
124 break;
125 case AQ_I2:
126 devc->channel_status[1].output_current_last = dbl;
127 break;
128 case AQ_STATUS: /* Process status and generate data. */
129 if (lps_process_status(sdi, auxint) == SR_OK) {
130 send_data(sdi);
131 }
132 break;
133 default:
134 break;
135 }
136
137 devc->acq_req_pending = 2;
138 break;
139 case 2: /* Waiting for OK after request */
140 if (strcmp(devc->buf, "OK")) {
141 sr_err("Unexpected reply while waiting for OK: '%s'", devc->buf);
142 }
143 devc->acq_req_pending = 0;
144 break;
145 }
146
147 devc->buf[0] = '\0';
148 devc->buflen = 0;
149}
150
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151SR_PRIV int motech_lps_30x_receive_data(int fd, int revents, void *cb_data)
152{
1c3d002b 153 struct sr_dev_inst *sdi;
41b7bd01 154 struct dev_context *devc;
1c3d002b 155 struct sr_serial_dev_inst *serial;
1c3d002b 156 int len;
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157
158 (void)fd;
159
160 if (!(sdi = cb_data))
161 return TRUE;
162
163 if (!(devc = sdi->priv))
164 return TRUE;
165
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166 serial = sdi->conn;
167
168 if (revents == G_IO_IN) { /* Serial data arrived. */
169 while (LINELEN_MAX - devc->buflen - 2 > 0) {
e0501240 170 len = serial_read_nonblocking(serial, devc->buf + devc->buflen, 1);
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171 if (len < 1)
172 break;
173
174 /* Eliminate whitespace at beginning of line. */
175 if (g_ascii_isspace(devc->buf[0])) {
176 devc->buf[0] = '\0';
177 devc->buflen = 0;
178 continue;
179 }
180
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181 devc->buflen += len;
182 devc->buf[devc->buflen] = '\0';
183
184 /* If line complete, process msg. */
185 if ((devc->buflen > 0) && ((devc->buf[devc->buflen-1] == '\r') || devc->buf[devc->buflen-1] == '\n')) {
186 devc->buflen--;
187 devc->buf[devc->buflen] = '\0';
188
189 sr_spew("Line complete: \"%s\"", devc->buf);
190 process_line(sdi);
191 }
192 }
193 }
194
8aafc5e6 195 if (sr_sw_limits_check(&devc->limits))
d2f7c417 196 sr_dev_acquisition_stop(sdi);
1c3d002b 197
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198 /* Only request the next packet if required. */
199 if (!((sdi->status == SR_ST_ACTIVE) && (devc->acq_running)))
200 return TRUE;
201
202 if (devc->acq_req_pending) {
6433156c 203 int64_t elapsed_us = g_get_monotonic_time() - devc->req_sent_at;
dc89faea 204 if (elapsed_us > (REQ_TIMEOUT_MS * 1000)) {
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205 sr_spew("Request timeout: req=%d t=%" PRIi64 "us",
206 (int)devc->acq_req, elapsed_us);
dc89faea 207 devc->acq_req_pending = 0;
1c3d002b 208 }
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209 }
210
211 if (devc->acq_req_pending == 0) {
212 switch (devc->acq_req) {
213 case AQ_NONE: /* Fall through */
214 case AQ_STATUS:
215 devc->acq_req = AQ_U1;
216 lps_send_req(serial, "VOUT1");
217 break;
218 case AQ_U1:
219 devc->acq_req = AQ_I1;
220 lps_send_req(serial, "IOUT1");
221 break;
222 case AQ_I1:
223 if (devc->model->num_channels == 1) {
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224 devc->acq_req = AQ_STATUS;
225 lps_send_req(serial, "STATUS");
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226 } else {
227 devc->acq_req = AQ_U2;
228 lps_send_req(serial, "VOUT2");
1c3d002b 229 }
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230 break;
231 case AQ_U2:
232 devc->acq_req = AQ_I2;
233 lps_send_req(serial, "IOUT2");
234 break;
235 case AQ_I2:
236 devc->acq_req = AQ_STATUS;
237 lps_send_req(serial, "STATUS");
238 break;
239 default:
240 sr_err("Illegal devc->acq_req=%d", devc->acq_req);
241 return SR_ERR;
1c3d002b 242 }
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243 devc->req_sent_at = g_get_real_time();
244 devc->acq_req_pending = 1;
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245 }
246
247 return TRUE;
248}