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b3dc55b2 | 1 | ------------------------------------------------------------------------------- |
2 | FIDELIX FM25Q32 | |
3 | ------------------------------------------------------------------------------- | |
4 | ||
5 | This is a set of example captures of a FIDELIX FM25Q32 SPI flash chip | |
6 | (32MBit == 4Mbyte) that is read by ESP32. | |
7 | ||
8 | First part is the 2nd-stage bootloader loaded from SPI flash (using | |
9 | QuadSPI @ 10MHz). Then the 2nd-stage bootloader loads 02_blink (from SPI | |
10 | flash to SRAM) and executes it. | |
11 | ||
12 | The SPI hardware used is ESP32 DevKitC (from ESPRESSIF). | |
13 | ||
14 | Details: | |
15 | https://espressif.com/sites/default/files/documentation/esp32-devkitc_getting_started_guide_en.pdf | |
16 | ||
17 | ||
18 | Logic analyzer setup | |
19 | -------------------- | |
20 | ||
21 | The logic analyzer used was a DreamSourceLab DSLogic (at 100MHz): | |
22 | ||
23 | Probe FM25Q32 pin | |
24 | ----------------------- | |
25 | 0 CS | |
26 | 1 CLK | |
27 | 2 IO0 | |
28 | 3 IO1 | |
29 | 4 IO2 | |
30 | 5 IO3 |