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ols: remove serial source from session when done
[libsigrok.git] / hardware / openbench-logic-sniffer / ols.c
CommitLineData
a1bb33af
UH
1/*
2 * This file is part of the sigrok project.
3 *
c73d2ea4 4 * Copyright (C) 2010-2012 Bert Vermeulen <bert@biot.com>
a1bb33af
UH
5 *
6 * This program is free software: you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation, either version 3 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include <stdio.h>
21#include <stdint.h>
22#include <stdlib.h>
23#include <sys/types.h>
24#include <sys/stat.h>
25#include <fcntl.h>
26#include <unistd.h>
a9f54bcd
UH
27#ifdef _WIN32
28#include <windows.h>
29#else
a1bb33af 30#include <termios.h>
926b866c 31#endif
a1bb33af
UH
32#include <string.h>
33#include <sys/time.h>
34#include <inttypes.h>
926b866c
UH
35#ifdef _WIN32
36/* TODO */
37#else
6937bb75 38#include <arpa/inet.h>
926b866c 39#endif
a1bb33af 40#include <glib.h>
45c59c8b
BV
41#include "libsigrok.h"
42#include "libsigrok-internal.h"
4fe9a6da 43#include "ols.h"
a1bb33af 44
1fdb75e1
UH
45#ifdef _WIN32
46#define O_NONBLOCK FIONBIO
47#endif
48
915f7cc8 49static const int hwcaps[] = {
5a2326a7
UH
50 SR_HWCAP_LOGIC_ANALYZER,
51 SR_HWCAP_SAMPLERATE,
52 SR_HWCAP_CAPTURE_RATIO,
53 SR_HWCAP_LIMIT_SAMPLES,
3a4d09c0 54 SR_HWCAP_RLE,
43fc7885 55 0,
a1bb33af
UH
56};
57
d261dbbf 58/* Probes are numbered 0-31 (on the PCB silkscreen). */
c37d2b1b 59static const char *probe_names[NUM_PROBES + 1] = {
464d12c7
KS
60 "0",
61 "1",
62 "2",
63 "3",
64 "4",
65 "5",
66 "6",
67 "7",
68 "8",
69 "9",
70 "10",
71 "11",
72 "12",
73 "13",
74 "14",
75 "15",
76 "16",
77 "17",
78 "18",
79 "19",
80 "20",
81 "21",
82 "22",
83 "23",
84 "24",
85 "25",
86 "26",
87 "27",
88 "28",
89 "29",
90 "30",
91 "31",
92 NULL,
93};
94
4fe9a6da 95/* default supported samplerates, can be overridden by device metadata */
a533743d 96static const struct sr_samplerates samplerates = {
c9140419 97 SR_HZ(10),
59df0c77 98 SR_MHZ(200),
c9140419
UH
99 SR_HZ(1),
100 NULL,
a1bb33af
UH
101};
102
e5e81856
BV
103SR_PRIV struct sr_dev_driver ols_driver_info;
104static struct sr_dev_driver *odi = &ols_driver_info;
a1bb33af 105
6937bb75 106static int send_shortcommand(int fd, uint8_t command)
a1bb33af
UH
107{
108 char buf[1];
109
b08024a8 110 sr_dbg("ols: sending cmd 0x%.2x", command);
a1bb33af 111 buf[0] = command;
2119ab03 112 if (serial_write(fd, buf, 1) != 1)
e46b8fb1 113 return SR_ERR;
a1bb33af 114
e46b8fb1 115 return SR_OK;
a1bb33af
UH
116}
117
6937bb75 118static int send_longcommand(int fd, uint8_t command, uint32_t data)
a1bb33af
UH
119{
120 char buf[5];
121
b08024a8 122 sr_dbg("ols: sending cmd 0x%.2x data 0x%.8x", command, data);
a1bb33af 123 buf[0] = command;
6937bb75
BV
124 buf[1] = (data & 0xff000000) >> 24;
125 buf[2] = (data & 0xff0000) >> 16;
126 buf[3] = (data & 0xff00) >> 8;
127 buf[4] = data & 0xff;
2119ab03 128 if (serial_write(fd, buf, 5) != 5)
e46b8fb1 129 return SR_ERR;
a1bb33af 130
e46b8fb1 131 return SR_OK;
a1bb33af
UH
132}
133
fefc4b85 134static int configure_probes(struct dev_context *devc, const GSList *probes)
a1bb33af 135{
1b79df2f
JH
136 const struct sr_probe *probe;
137 const GSList *l;
6937bb75 138 int probe_bit, stage, i;
a1bb33af
UH
139 char *tc;
140
fefc4b85 141 devc->probe_mask = 0;
43fc7885 142 for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
fefc4b85
BV
143 devc->trigger_mask[i] = 0;
144 devc->trigger_value[i] = 0;
a1bb33af
UH
145 }
146
fefc4b85 147 devc->num_stages = 0;
43fc7885 148 for (l = probes; l; l = l->next) {
1b79df2f 149 probe = (const struct sr_probe *)l->data;
43fc7885 150 if (!probe->enabled)
6937bb75
BV
151 continue;
152
43fc7885
UH
153 /*
154 * Set up the probe mask for later configuration into the
155 * flag register.
156 */
b35c8293 157 probe_bit = 1 << (probe->index);
fefc4b85 158 devc->probe_mask |= probe_bit;
6937bb75 159
a803c0db 160 if (!probe->trigger)
6937bb75
BV
161 continue;
162
43fc7885 163 /* Configure trigger mask and value. */
6937bb75 164 stage = 0;
43fc7885 165 for (tc = probe->trigger; tc && *tc; tc++) {
fefc4b85 166 devc->trigger_mask[stage] |= probe_bit;
43fc7885 167 if (*tc == '1')
fefc4b85 168 devc->trigger_value[stage] |= probe_bit;
6937bb75 169 stage++;
43fc7885
UH
170 if (stage > 3)
171 /*
172 * TODO: Only supporting parallel mode, with
173 * up to 4 stages.
174 */
e46b8fb1 175 return SR_ERR;
a1bb33af 176 }
fefc4b85
BV
177 if (stage > devc->num_stages)
178 devc->num_stages = stage;
a1bb33af
UH
179 }
180
e46b8fb1 181 return SR_OK;
a1bb33af
UH
182}
183
a803c0db 184static uint32_t reverse16(uint32_t in)
6937bb75
BV
185{
186 uint32_t out;
187
a803c0db
BV
188 out = (in & 0xff) << 8;
189 out |= (in & 0xff00) >> 8;
190 out |= (in & 0xff0000) << 8;
191 out |= (in & 0xff000000) >> 8;
192
193 return out;
194}
195
196static uint32_t reverse32(uint32_t in)
197{
198 uint32_t out;
199
200 out = (in & 0xff) << 24;
201 out |= (in & 0xff00) << 8;
202 out |= (in & 0xff0000) >> 8;
203 out |= (in & 0xff000000) >> 24;
204
205 return out;
6937bb75
BV
206}
207
fefc4b85 208static struct dev_context *ols_dev_new(void)
4fe9a6da 209{
fefc4b85 210 struct dev_context *devc;
4fe9a6da 211
fefc4b85
BV
212 /* TODO: Is 'devc' ever g_free()'d? */
213 if (!(devc = g_try_malloc0(sizeof(struct dev_context)))) {
214 sr_err("ols: %s: devc malloc failed", __func__);
b53738ba
UH
215 return NULL;
216 }
217
fefc4b85
BV
218 devc->trigger_at = -1;
219 devc->probe_mask = 0xffffffff;
220 devc->cur_samplerate = SR_KHZ(200);
221 devc->serial = NULL;
4fe9a6da 222
fefc4b85 223 return devc;
4fe9a6da
BV
224}
225
d68e2d1a 226static struct sr_dev_inst *get_metadata(int fd)
4fe9a6da 227{
d68e2d1a 228 struct sr_dev_inst *sdi;
fefc4b85 229 struct dev_context *devc;
10e5cbed
BV
230 struct sr_probe *probe;
231 uint32_t tmp_int, ui;
4fe9a6da 232 uint8_t key, type, token;
bb7ef793 233 GString *tmp_str, *devname, *version;
10e5cbed 234 guchar tmp_c;
4fe9a6da 235
d3683c42 236 sdi = sr_dev_inst_new(0, SR_ST_INACTIVE, NULL, NULL, NULL);
2efc5948 237 sdi->driver = odi;
fefc4b85
BV
238 devc = ols_dev_new();
239 sdi->priv = devc;
4fe9a6da 240
bb7ef793 241 devname = g_string_new("");
4fe9a6da
BV
242 version = g_string_new("");
243
244 key = 0xff;
245 while (key) {
246 if (serial_read(fd, &key, 1) != 1 || key == 0x00)
247 break;
248 type = key >> 5;
249 token = key & 0x1f;
250 switch (type) {
251 case 0:
252 /* NULL-terminated string */
253 tmp_str = g_string_new("");
254 while (serial_read(fd, &tmp_c, 1) == 1 && tmp_c != '\0')
255 g_string_append_c(tmp_str, tmp_c);
b08024a8
UH
256 sr_dbg("ols: got metadata key 0x%.2x value '%s'",
257 key, tmp_str->str);
4fe9a6da
BV
258 switch (token) {
259 case 0x01:
260 /* Device name */
bb7ef793 261 devname = g_string_append(devname, tmp_str->str);
4fe9a6da
BV
262 break;
263 case 0x02:
264 /* FPGA firmware version */
265 if (version->len)
266 g_string_append(version, ", ");
267 g_string_append(version, "FPGA version ");
268 g_string_append(version, tmp_str->str);
269 break;
270 case 0x03:
271 /* Ancillary version */
272 if (version->len)
273 g_string_append(version, ", ");
274 g_string_append(version, "Ancillary version ");
275 g_string_append(version, tmp_str->str);
276 break;
277 default:
b08024a8
UH
278 sr_info("ols: unknown token 0x%.2x: '%s'",
279 token, tmp_str->str);
4fe9a6da
BV
280 break;
281 }
282 g_string_free(tmp_str, TRUE);
283 break;
284 case 1:
285 /* 32-bit unsigned integer */
286 if (serial_read(fd, &tmp_int, 4) != 4)
287 break;
288 tmp_int = reverse32(tmp_int);
b08024a8
UH
289 sr_dbg("ols: got metadata key 0x%.2x value 0x%.8x",
290 key, tmp_int);
4fe9a6da
BV
291 switch (token) {
292 case 0x00:
293 /* Number of usable probes */
10e5cbed
BV
294 for (ui = 0; ui < tmp_int; ui++) {
295 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
296 probe_names[ui])))
297 return 0;
298 sdi->probes = g_slist_append(sdi->probes, probe);
299 }
4fe9a6da
BV
300 break;
301 case 0x01:
302 /* Amount of sample memory available (bytes) */
fefc4b85 303 devc->max_samples = tmp_int;
4fe9a6da
BV
304 break;
305 case 0x02:
306 /* Amount of dynamic memory available (bytes) */
307 /* what is this for? */
308 break;
309 case 0x03:
310 /* Maximum sample rate (hz) */
fefc4b85 311 devc->max_samplerate = tmp_int;
4fe9a6da
BV
312 break;
313 case 0x04:
314 /* protocol version */
fefc4b85 315 devc->protocol_version = tmp_int;
4fe9a6da
BV
316 break;
317 default:
b08024a8
UH
318 sr_info("ols: unknown token 0x%.2x: 0x%.8x",
319 token, tmp_int);
4fe9a6da
BV
320 break;
321 }
322 break;
323 case 2:
324 /* 8-bit unsigned integer */
325 if (serial_read(fd, &tmp_c, 1) != 1)
326 break;
b08024a8
UH
327 sr_dbg("ols: got metadata key 0x%.2x value 0x%.2x",
328 key, tmp_c);
4fe9a6da
BV
329 switch (token) {
330 case 0x00:
331 /* Number of usable probes */
10e5cbed
BV
332 for (ui = 0; ui < tmp_c; ui++) {
333 if (!(probe = sr_probe_new(ui, SR_PROBE_LOGIC, TRUE,
334 probe_names[ui])))
335 return 0;
336 sdi->probes = g_slist_append(sdi->probes, probe);
337 }
4fe9a6da
BV
338 break;
339 case 0x01:
340 /* protocol version */
fefc4b85 341 devc->protocol_version = tmp_c;
4fe9a6da
BV
342 break;
343 default:
b08024a8
UH
344 sr_info("ols: unknown token 0x%.2x: 0x%.2x",
345 token, tmp_c);
4fe9a6da
BV
346 break;
347 }
348 break;
349 default:
350 /* unknown type */
351 break;
352 }
353 }
354
bb7ef793 355 sdi->model = devname->str;
4fe9a6da 356 sdi->version = version->str;
bb7ef793 357 g_string_free(devname, FALSE);
4fe9a6da
BV
358 g_string_free(version, FALSE);
359
360 return sdi;
361}
362
40dda2c3 363static int hw_init(void)
61136ea6 364{
fefc4b85 365 struct drv_context *drvc;
61136ea6 366
fefc4b85
BV
367 if (!(drvc = g_try_malloc0(sizeof(struct drv_context)))) {
368 sr_err("ols: driver context malloc failed.");
369 return SR_ERR;
370 }
371 odi->priv = drvc;
61136ea6
BV
372
373 return SR_OK;
374}
375
10e5cbed 376static GSList *hw_scan(GSList *options)
a1bb33af 377{
d68e2d1a 378 struct sr_dev_inst *sdi;
fefc4b85
BV
379 struct drv_context *drvc;
380 struct dev_context *devc;
10e5cbed
BV
381 struct sr_probe *probe;
382 GSList *devices, *ports, *l;
4fe9a6da 383 GPollFD *fds, probefd;
10e5cbed 384 int devcnt, final_devcnt, num_ports, fd, ret, i, j;
bb7ef793 385 char buf[8], **dev_names, **serial_params;
a1bb33af 386
10e5cbed 387 (void)options;
fefc4b85 388 drvc = odi->priv;
c0a4b971 389 final_devcnt = 0;
10e5cbed 390 devices = NULL;
c0a4b971 391
40dda2c3
BV
392 /* Scan all serial ports. */
393 ports = list_serial_ports();
a1bb33af 394 num_ports = g_slist_length(ports);
c0a4b971
UH
395
396 if (!(fds = g_try_malloc0(num_ports * sizeof(GPollFD)))) {
397 sr_err("ols: %s: fds malloc failed", __func__);
398 goto hw_init_free_ports; /* TODO: SR_ERR_MALLOC. */
399 }
400
bb7ef793
UH
401 if (!(dev_names = g_try_malloc(num_ports * sizeof(char *)))) {
402 sr_err("ols: %s: dev_names malloc failed", __func__);
c0a4b971
UH
403 goto hw_init_free_fds; /* TODO: SR_ERR_MALLOC. */
404 }
405
406 if (!(serial_params = g_try_malloc(num_ports * sizeof(char *)))) {
407 sr_err("ols: %s: serial_params malloc failed", __func__);
bb7ef793 408 goto hw_init_free_dev_names; /* TODO: SR_ERR_MALLOC. */
c0a4b971
UH
409 }
410
a1bb33af 411 devcnt = 0;
43fc7885
UH
412 for (l = ports; l; l = l->next) {
413 /* The discovery procedure is like this: first send the Reset
414 * command (0x00) 5 times, since the device could be anywhere
415 * in a 5-byte command. Then send the ID command (0x02).
416 * If the device responds with 4 bytes ("OLS1" or "SLA1"), we
417 * have a match.
418 *
419 * Since it may take the device a while to respond at 115Kb/s,
420 * we do all the sending first, then wait for all of them to
421 * respond with g_poll().
a1bb33af 422 */
b08024a8 423 sr_info("ols: probing %s...", (char *)l->data);
d02a535e 424 fd = serial_open(l->data, O_RDWR | O_NONBLOCK);
43fc7885 425 if (fd != -1) {
d02a535e 426 serial_params[devcnt] = serial_backup_params(fd);
f8c1fcda 427 serial_set_params(fd, 115200, 8, SERIAL_PARITY_NONE, 1, 2);
e46b8fb1 428 ret = SR_OK;
43fc7885
UH
429 for (i = 0; i < 5; i++) {
430 if ((ret = send_shortcommand(fd,
e46b8fb1 431 CMD_RESET)) != SR_OK) {
43fc7885 432 /* Serial port is not writable. */
6937bb75
BV
433 break;
434 }
a1bb33af 435 }
e46b8fb1 436 if (ret != SR_OK) {
43fc7885
UH
437 serial_restore_params(fd,
438 serial_params[devcnt]);
d02a535e 439 serial_close(fd);
6937bb75 440 continue;
d02a535e 441 }
6937bb75
BV
442 send_shortcommand(fd, CMD_ID);
443 fds[devcnt].fd = fd;
444 fds[devcnt].events = G_IO_IN;
bb7ef793 445 dev_names[devcnt] = g_strdup(l->data);
6937bb75 446 devcnt++;
a1bb33af 447 }
133a37bf 448 g_free(l->data);
a1bb33af
UH
449 }
450
5b15b41e
PS
451 /* 2ms isn't enough for reliable transfer with pl2303, let's try 10 */
452 usleep(10000);
a1bb33af 453
a1bb33af 454 g_poll(fds, devcnt, 1);
4fe9a6da 455
43fc7885 456 for (i = 0; i < devcnt; i++) {
4fe9a6da
BV
457 if (fds[i].revents != G_IO_IN)
458 continue;
459 if (serial_read(fds[i].fd, buf, 4) != 4)
460 continue;
461 if (strncmp(buf, "1SLO", 4) && strncmp(buf, "1ALS", 4))
462 continue;
463
464 /* definitely using the OLS protocol, check if it supports
465 * the metadata command
466 */
467 send_shortcommand(fds[i].fd, CMD_METADATA);
468 probefd.fd = fds[i].fd;
469 probefd.events = G_IO_IN;
470 if (g_poll(&probefd, 1, 10) > 0) {
471 /* got metadata */
472 sdi = get_metadata(fds[i].fd);
473 sdi->index = final_devcnt;
fefc4b85 474 devc = sdi->priv;
4fe9a6da
BV
475 } else {
476 /* not an OLS -- some other board that uses the sump protocol */
d3683c42 477 sdi = sr_dev_inst_new(final_devcnt, SR_ST_INACTIVE,
4fe9a6da 478 "Sump", "Logic Analyzer", "v1.0");
2efc5948 479 sdi->driver = odi;
fefc4b85 480 devc = ols_dev_new();
10e5cbed
BV
481 for (j = 0; j < 32; j++) {
482 if (!(probe = sr_probe_new(j, SR_PROBE_LOGIC, TRUE,
483 probe_names[j])))
484 return 0;
485 sdi->probes = g_slist_append(sdi->probes, probe);
486 }
fefc4b85 487 sdi->priv = devc;
a1bb33af 488 }
fefc4b85
BV
489 devc->serial = sr_serial_dev_inst_new(dev_names[i], -1);
490 drvc->instances = g_slist_append(drvc->instances, sdi);
e5e81856
BV
491 devices = g_slist_append(devices, sdi);
492
4fe9a6da
BV
493 final_devcnt++;
494 serial_close(fds[i].fd);
495 fds[i].fd = 0;
4fe9a6da
BV
496 }
497
498 /* clean up after all the probing */
499 for (i = 0; i < devcnt; i++) {
43fc7885 500 if (fds[i].fd != 0) {
d02a535e
BV
501 serial_restore_params(fds[i].fd, serial_params[i]);
502 serial_close(fds[i].fd);
6937bb75 503 }
133a37bf 504 g_free(serial_params[i]);
bb7ef793 505 g_free(dev_names[i]);
a1bb33af
UH
506 }
507
c0a4b971 508 g_free(serial_params);
bb7ef793
UH
509hw_init_free_dev_names:
510 g_free(dev_names);
c0a4b971
UH
511hw_init_free_fds:
512 g_free(fds);
513hw_init_free_ports:
a1bb33af
UH
514 g_slist_free(ports);
515
10e5cbed 516 return devices;
a1bb33af
UH
517}
518
25a0f108 519static int hw_dev_open(struct sr_dev_inst *sdi)
a1bb33af 520{
fefc4b85 521 struct dev_context *devc;
a1bb33af 522
fefc4b85 523 devc = sdi->priv;
69890f73 524
fefc4b85
BV
525 devc->serial->fd = serial_open(devc->serial->port, O_RDWR);
526 if (devc->serial->fd == -1)
e46b8fb1 527 return SR_ERR;
a1bb33af 528
5a2326a7 529 sdi->status = SR_ST_ACTIVE;
a1bb33af 530
e46b8fb1 531 return SR_OK;
a1bb33af
UH
532}
533
25a0f108 534static int hw_dev_close(struct sr_dev_inst *sdi)
a1bb33af 535{
fefc4b85 536 struct dev_context *devc;
a1bb33af 537
fefc4b85 538 devc = sdi->priv;
69890f73 539
fefc4b85
BV
540 if (devc->serial->fd != -1) {
541 serial_close(devc->serial->fd);
542 devc->serial->fd = -1;
5a2326a7 543 sdi->status = SR_ST_INACTIVE;
a1bb33af 544 }
697785d1
UH
545
546 return SR_OK;
a1bb33af
UH
547}
548
57ab7d9f 549static int hw_cleanup(void)
a1bb33af
UH
550{
551 GSList *l;
d68e2d1a 552 struct sr_dev_inst *sdi;
fefc4b85
BV
553 struct drv_context *drvc;
554 struct dev_context *devc;
57ab7d9f 555 int ret = SR_OK;
a1bb33af 556
fefc4b85
BV
557 if (!(drvc = odi->priv))
558 return SR_OK;
559
8722c31e 560 /* Properly close and free all devices. */
fefc4b85 561 for (l = drvc->instances; l; l = l->next) {
57ab7d9f
UH
562 if (!(sdi = l->data)) {
563 /* Log error, but continue cleaning up the rest. */
564 sr_err("ols: %s: sdi was NULL, continuing", __func__);
565 ret = SR_ERR_BUG;
566 continue;
567 }
fefc4b85 568 if (!(devc = sdi->priv)) {
57ab7d9f
UH
569 /* Log error, but continue cleaning up the rest. */
570 sr_err("ols: %s: sdi->priv was NULL, continuing",
571 __func__);
572 ret = SR_ERR_BUG;
573 continue;
574 }
575 /* TODO: Check for serial != NULL. */
fefc4b85
BV
576 if (devc->serial->fd != -1)
577 serial_close(devc->serial->fd);
578 sr_serial_dev_inst_free(devc->serial);
d3683c42 579 sr_dev_inst_free(sdi);
a1bb33af 580 }
fefc4b85
BV
581 g_slist_free(drvc->instances);
582 drvc->instances = NULL;
57ab7d9f
UH
583
584 return ret;
a1bb33af
UH
585}
586
dddfb3db
BV
587static int hw_info_get(int info_id, const void **data,
588 const struct sr_dev_inst *sdi)
a1bb33af 589{
fefc4b85 590 struct dev_context *devc;
a1bb33af 591
dddfb3db 592 switch (info_id) {
2ca4465b
BV
593 case SR_DI_HWCAPS:
594 *data = hwcaps;
595 break;
5a2326a7 596 case SR_DI_NUM_PROBES:
dddfb3db 597 *data = GINT_TO_POINTER(1);
a1bb33af 598 break;
464d12c7 599 case SR_DI_PROBE_NAMES:
dddfb3db 600 *data = probe_names;
464d12c7 601 break;
5a2326a7 602 case SR_DI_SAMPLERATES:
dddfb3db 603 *data = &samplerates;
a1bb33af 604 break;
5a2326a7 605 case SR_DI_TRIGGER_TYPES:
dddfb3db 606 *data = (char *)TRIGGER_TYPES;
a1bb33af 607 break;
5a2326a7 608 case SR_DI_CUR_SAMPLERATE:
dddfb3db 609 if (sdi) {
fefc4b85
BV
610 devc = sdi->priv;
611 *data = &devc->cur_samplerate;
dddfb3db
BV
612 } else
613 return SR_ERR;
a1bb33af 614 break;
dddfb3db
BV
615 default:
616 return SR_ERR_ARG;
a1bb33af
UH
617 }
618
dddfb3db 619 return SR_OK;
a1bb33af
UH
620}
621
6f4b1868 622static int set_samplerate(const struct sr_dev_inst *sdi, uint64_t samplerate)
a1bb33af 623{
fefc4b85 624 struct dev_context *devc;
a1bb33af 625
fefc4b85
BV
626 devc = sdi->priv;
627 if (devc->max_samplerate) {
628 if (samplerate > devc->max_samplerate)
4fe9a6da
BV
629 return SR_ERR_SAMPLERATE;
630 } else if (samplerate < samplerates.low || samplerate > samplerates.high)
e46b8fb1 631 return SR_ERR_SAMPLERATE;
a1bb33af 632
43fc7885 633 if (samplerate > CLOCK_RATE) {
fefc4b85
BV
634 devc->flag_reg |= FLAG_DEMUX;
635 devc->cur_samplerate_divider = (CLOCK_RATE * 2 / samplerate) - 1;
43fc7885 636 } else {
fefc4b85
BV
637 devc->flag_reg &= ~FLAG_DEMUX;
638 devc->cur_samplerate_divider = (CLOCK_RATE / samplerate) - 1;
a1bb33af 639 }
a1bb33af 640
7583b99d
GM
641 /* Calculate actual samplerate used and complain if it is different
642 * from the requested.
643 */
fefc4b85
BV
644 devc->cur_samplerate = CLOCK_RATE / (devc->cur_samplerate_divider + 1);
645 if (devc->flag_reg & FLAG_DEMUX)
646 devc->cur_samplerate *= 2;
647 if (devc->cur_samplerate != samplerate)
133a37bf 648 sr_err("ols: can't match samplerate %" PRIu64 ", using %"
fefc4b85 649 PRIu64, samplerate, devc->cur_samplerate);
7583b99d 650
e46b8fb1 651 return SR_OK;
a1bb33af
UH
652}
653
6f4b1868
BV
654static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
655 const void *value)
a1bb33af 656{
fefc4b85 657 struct dev_context *devc;
a1bb33af 658 int ret;
1b79df2f 659 const uint64_t *tmp_u64;
a1bb33af 660
fefc4b85 661 devc = sdi->priv;
a1bb33af 662
5a2326a7 663 if (sdi->status != SR_ST_ACTIVE)
e46b8fb1 664 return SR_ERR;
a1bb33af 665
ffedd0bf 666 switch (hwcap) {
5a2326a7 667 case SR_HWCAP_SAMPLERATE:
1b79df2f 668 ret = set_samplerate(sdi, *(const uint64_t *)value);
a803c0db 669 break;
5a2326a7 670 case SR_HWCAP_PROBECONFIG:
fefc4b85 671 ret = configure_probes(devc, (const GSList *)value);
a803c0db 672 break;
5a2326a7 673 case SR_HWCAP_LIMIT_SAMPLES:
2458ea65 674 tmp_u64 = value;
574ce498 675 if (*tmp_u64 < MIN_NUM_SAMPLES)
e46b8fb1 676 return SR_ERR;
fefc4b85 677 if (*tmp_u64 > devc->max_samples)
133a37bf 678 sr_err("ols: sample limit exceeds hw max");
fefc4b85
BV
679 devc->limit_samples = *tmp_u64;
680 sr_info("ols: sample limit %" PRIu64, devc->limit_samples);
e46b8fb1 681 ret = SR_OK;
a803c0db 682 break;
5a2326a7 683 case SR_HWCAP_CAPTURE_RATIO:
fefc4b85
BV
684 devc->capture_ratio = *(const uint64_t *)value;
685 if (devc->capture_ratio < 0 || devc->capture_ratio > 100) {
686 devc->capture_ratio = 0;
e46b8fb1 687 ret = SR_ERR;
43fc7885 688 } else
e46b8fb1 689 ret = SR_OK;
a803c0db 690 break;
3a4d09c0 691 case SR_HWCAP_RLE:
4d436e71 692 if (GPOINTER_TO_INT(value)) {
3a4d09c0 693 sr_info("ols: enabling RLE");
fefc4b85 694 devc->flag_reg |= FLAG_RLE;
3a4d09c0
GM
695 }
696 ret = SR_OK;
697 break;
a803c0db 698 default:
e46b8fb1 699 ret = SR_ERR;
43fc7885 700 }
a1bb33af
UH
701
702 return ret;
703}
704
26bf9d56
BV
705static void abort_acquisition(const struct sr_dev_inst *sdi)
706{
707 struct sr_datafeed_packet packet;
708 struct dev_context *devc;
709
710 devc = sdi->priv;
711 sr_source_remove(devc->serial->fd);
712
713 /* Terminate session */
714 packet.type = SR_DF_END;
715 sr_session_send(sdi, &packet);
716
717}
718
719
720
1f9813eb 721static int receive_data(int fd, int revents, void *cb_data)
a1bb33af 722{
b9c735a2 723 struct sr_datafeed_packet packet;
9c939c51 724 struct sr_datafeed_logic logic;
d68e2d1a 725 struct sr_dev_inst *sdi;
fefc4b85
BV
726 struct drv_context *drvc;
727 struct dev_context *devc;
4fe9a6da 728 GSList *l;
3a4d09c0
GM
729 int num_channels, offset, i, j;
730 unsigned char byte;
a1bb33af 731
fefc4b85
BV
732 drvc = odi->priv;
733
734 /* Find this device's devc struct by its fd. */
735 devc = NULL;
736 for (l = drvc->instances; l; l = l->next) {
4fe9a6da 737 sdi = l->data;
fefc4b85
BV
738 devc = sdi->priv;
739 if (devc->serial->fd == fd) {
4fe9a6da
BV
740 break;
741 }
fefc4b85 742 devc = NULL;
4fe9a6da 743 }
fefc4b85 744 if (!devc)
ea9cfed7 745 /* Shouldn't happen. */
4fe9a6da
BV
746 return TRUE;
747
fefc4b85 748 if (devc->num_transfers++ == 0) {
43fc7885
UH
749 /*
750 * First time round, means the device started sending data,
751 * and will not stop until done. If it stops sending for
752 * longer than it takes to send a byte, that means it's
753 * finished. We'll double that to 30ms to be sure...
a1bb33af 754 */
6f1be0a2 755 sr_source_remove(fd);
1f9813eb 756 sr_source_add(fd, G_IO_IN, 30, receive_data, cb_data);
fefc4b85
BV
757 devc->raw_sample_buf = g_try_malloc(devc->limit_samples * 4);
758 if (!devc->raw_sample_buf) {
759 sr_err("ols: %s: devc->raw_sample_buf malloc failed",
c0a4b971
UH
760 __func__);
761 return FALSE;
762 }
a803c0db 763 /* fill with 1010... for debugging */
fefc4b85 764 memset(devc->raw_sample_buf, 0x82, devc->limit_samples * 4);
a1bb33af
UH
765 }
766
6937bb75 767 num_channels = 0;
43fc7885 768 for (i = 0x20; i > 0x02; i /= 2) {
fefc4b85 769 if ((devc->flag_reg & i) == 0)
6937bb75 770 num_channels++;
43fc7885 771 }
6937bb75 772
3a4d09c0 773 if (revents == G_IO_IN) {
2119ab03 774 if (serial_read(fd, &byte, 1) != 1)
a1bb33af
UH
775 return FALSE;
776
baf1d714 777 /* Ignore it if we've read enough. */
fefc4b85 778 if (devc->num_samples >= devc->limit_samples)
baf1d714 779 return TRUE;
3a4d09c0 780
fefc4b85 781 devc->sample[devc->num_bytes++] = byte;
b08024a8 782 sr_dbg("ols: received byte 0x%.2x", byte);
fefc4b85 783 if (devc->num_bytes == num_channels) {
43fc7885 784 /* Got a full sample. */
b08024a8 785 sr_dbg("ols: received sample 0x%.*x",
fefc4b85
BV
786 devc->num_bytes * 2, *(int *)devc->sample);
787 if (devc->flag_reg & FLAG_RLE) {
43fc7885
UH
788 /*
789 * In RLE mode -1 should never come in as a
790 * sample, because bit 31 is the "count" flag.
43fc7885 791 */
fefc4b85
BV
792 if (devc->sample[devc->num_bytes - 1] & 0x80) {
793 devc->sample[devc->num_bytes - 1] &= 0x7f;
baf1d714
UH
794 /*
795 * FIXME: This will only work on
796 * little-endian systems.
a1bb33af 797 */
fefc4b85
BV
798 devc->rle_count = *(int *)(devc->sample);
799 sr_dbg("ols: RLE count = %d", devc->rle_count);
800 devc->num_bytes = 0;
3a4d09c0 801 return TRUE;
baf1d714 802 }
3a4d09c0 803 }
fefc4b85
BV
804 devc->num_samples += devc->rle_count + 1;
805 if (devc->num_samples > devc->limit_samples) {
baf1d714 806 /* Save us from overrunning the buffer. */
fefc4b85
BV
807 devc->rle_count -= devc->num_samples - devc->limit_samples;
808 devc->num_samples = devc->limit_samples;
a1bb33af
UH
809 }
810
43fc7885
UH
811 if (num_channels < 4) {
812 /*
813 * Some channel groups may have been turned
814 * off, to speed up transfer between the
815 * hardware and the PC. Expand that here before
816 * submitting it over the session bus --
817 * whatever is listening on the bus will be
818 * expecting a full 32-bit sample, based on
819 * the number of probes.
6937bb75
BV
820 */
821 j = 0;
fefc4b85 822 memset(devc->tmp_sample, 0, 4);
43fc7885 823 for (i = 0; i < 4; i++) {
fefc4b85 824 if (((devc->flag_reg >> 2) & (1 << i)) == 0) {
43fc7885
UH
825 /*
826 * This channel group was
827 * enabled, copy from received
828 * sample.
829 */
fefc4b85 830 devc->tmp_sample[i] = devc->sample[j++];
6937bb75
BV
831 }
832 }
fefc4b85
BV
833 memcpy(devc->sample, devc->tmp_sample, 4);
834 sr_dbg("ols: full sample 0x%.8x", *(int *)devc->sample);
6937bb75
BV
835 }
836
a803c0db
BV
837 /* the OLS sends its sample buffer backwards.
838 * store it in reverse order here, so we can dump
839 * this on the session bus later.
840 */
fefc4b85
BV
841 offset = (devc->limit_samples - devc->num_samples) * 4;
842 for (i = 0; i <= devc->rle_count; i++) {
843 memcpy(devc->raw_sample_buf + offset + (i * 4),
844 devc->sample, 4);
baf1d714 845 }
fefc4b85
BV
846 memset(devc->sample, 0, 4);
847 devc->num_bytes = 0;
848 devc->rle_count = 0;
a1bb33af 849 }
43fc7885
UH
850 } else {
851 /*
852 * This is the main loop telling us a timeout was reached, or
853 * we've acquired all the samples we asked for -- we're done.
a803c0db 854 * Send the (properly-ordered) buffer to the frontend.
43fc7885 855 */
fefc4b85 856 if (devc->trigger_at != -1) {
a803c0db
BV
857 /* a trigger was set up, so we need to tell the frontend
858 * about it.
859 */
fefc4b85 860 if (devc->trigger_at > 0) {
a803c0db 861 /* there are pre-trigger samples, send those first */
5a2326a7 862 packet.type = SR_DF_LOGIC;
9c939c51 863 packet.payload = &logic;
fefc4b85 864 logic.length = devc->trigger_at * 4;
9c939c51 865 logic.unitsize = 4;
fefc4b85
BV
866 logic.data = devc->raw_sample_buf +
867 (devc->limit_samples - devc->num_samples) * 4;
1f9813eb 868 sr_session_send(cb_data, &packet);
a803c0db
BV
869 }
870
9c939c51 871 /* send the trigger */
5a2326a7 872 packet.type = SR_DF_TRIGGER;
1f9813eb 873 sr_session_send(cb_data, &packet);
a803c0db 874
9c939c51 875 /* send post-trigger samples */
5a2326a7 876 packet.type = SR_DF_LOGIC;
9c939c51 877 packet.payload = &logic;
fefc4b85 878 logic.length = (devc->num_samples * 4) - (devc->trigger_at * 4);
9c939c51 879 logic.unitsize = 4;
fefc4b85
BV
880 logic.data = devc->raw_sample_buf + devc->trigger_at * 4 +
881 (devc->limit_samples - devc->num_samples) * 4;
1f9813eb 882 sr_session_send(cb_data, &packet);
a803c0db 883 } else {
9c939c51 884 /* no trigger was used */
5a2326a7 885 packet.type = SR_DF_LOGIC;
9c939c51 886 packet.payload = &logic;
fefc4b85 887 logic.length = devc->num_samples * 4;
9c939c51 888 logic.unitsize = 4;
fefc4b85
BV
889 logic.data = devc->raw_sample_buf +
890 (devc->limit_samples - devc->num_samples) * 4;
1f9813eb 891 sr_session_send(cb_data, &packet);
a803c0db 892 }
fefc4b85 893 g_free(devc->raw_sample_buf);
a803c0db 894
06d64eb8 895 serial_flush(fd);
d02a535e 896 serial_close(fd);
26bf9d56
BV
897
898 abort_acquisition(sdi);
a1bb33af
UH
899 }
900
901 return TRUE;
902}
903
5d9ed643
BV
904static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
905 void *cb_data)
a1bb33af 906{
b9c735a2
UH
907 struct sr_datafeed_packet *packet;
908 struct sr_datafeed_header *header;
f366e86c 909 struct sr_datafeed_meta_logic meta;
fefc4b85 910 struct dev_context *devc;
a803c0db 911 uint32_t trigger_config[4];
a1bb33af 912 uint32_t data;
6937bb75
BV
913 uint16_t readcount, delaycount;
914 uint8_t changrp_mask;
22130421 915 int num_channels;
4fe9a6da 916 int i;
a1bb33af 917
fefc4b85 918 devc = sdi->priv;
a1bb33af 919
5a2326a7 920 if (sdi->status != SR_ST_ACTIVE)
e46b8fb1 921 return SR_ERR;
a1bb33af 922
22130421
GM
923 /*
924 * Enable/disable channel groups in the flag register according to the
baf1d714 925 * probe mask. Calculate this here, because num_channels is needed
22130421
GM
926 * to limit readcount.
927 */
928 changrp_mask = 0;
929 num_channels = 0;
930 for (i = 0; i < 4; i++) {
fefc4b85 931 if (devc->probe_mask & (0xff << (i * 8))) {
22130421
GM
932 changrp_mask |= (1 << i);
933 num_channels++;
934 }
935 }
936
baf1d714
UH
937 /*
938 * Limit readcount to prevent reading past the end of the hardware
22130421
GM
939 * buffer.
940 */
fefc4b85 941 readcount = MIN(devc->max_samples / num_channels, devc->limit_samples) / 4;
a803c0db
BV
942
943 memset(trigger_config, 0, 16);
fefc4b85
BV
944 trigger_config[devc->num_stages - 1] |= 0x08;
945 if (devc->trigger_mask[0]) {
946 delaycount = readcount * (1 - devc->capture_ratio / 100.0);
947 devc->trigger_at = (readcount - delaycount) * 4 - devc->num_stages;
a803c0db 948
fefc4b85
BV
949 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_0,
950 reverse32(devc->trigger_mask[0])) != SR_OK)
e46b8fb1 951 return SR_ERR;
fefc4b85
BV
952 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_0,
953 reverse32(devc->trigger_value[0])) != SR_OK)
e46b8fb1 954 return SR_ERR;
fefc4b85 955 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
e46b8fb1
UH
956 trigger_config[0]) != SR_OK)
957 return SR_ERR;
6937bb75 958
fefc4b85
BV
959 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_1,
960 reverse32(devc->trigger_mask[1])) != SR_OK)
e46b8fb1 961 return SR_ERR;
fefc4b85
BV
962 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_1,
963 reverse32(devc->trigger_value[1])) != SR_OK)
e46b8fb1 964 return SR_ERR;
fefc4b85 965 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_1,
e46b8fb1
UH
966 trigger_config[1]) != SR_OK)
967 return SR_ERR;
6937bb75 968
fefc4b85
BV
969 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_2,
970 reverse32(devc->trigger_mask[2])) != SR_OK)
e46b8fb1 971 return SR_ERR;
fefc4b85
BV
972 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_2,
973 reverse32(devc->trigger_value[2])) != SR_OK)
e46b8fb1 974 return SR_ERR;
fefc4b85 975 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_2,
e46b8fb1
UH
976 trigger_config[2]) != SR_OK)
977 return SR_ERR;
a803c0db 978
fefc4b85
BV
979 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_3,
980 reverse32(devc->trigger_mask[3])) != SR_OK)
e46b8fb1 981 return SR_ERR;
fefc4b85
BV
982 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_3,
983 reverse32(devc->trigger_value[3])) != SR_OK)
e46b8fb1 984 return SR_ERR;
fefc4b85 985 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_3,
e46b8fb1
UH
986 trigger_config[3]) != SR_OK)
987 return SR_ERR;
6937bb75 988 } else {
fefc4b85
BV
989 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_MASK_0,
990 devc->trigger_mask[0]) != SR_OK)
e46b8fb1 991 return SR_ERR;
fefc4b85
BV
992 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_VALUE_0,
993 devc->trigger_value[0]) != SR_OK)
e46b8fb1 994 return SR_ERR;
fefc4b85 995 if (send_longcommand(devc->serial->fd, CMD_SET_TRIGGER_CONFIG_0,
e46b8fb1
UH
996 0x00000008) != SR_OK)
997 return SR_ERR;
a803c0db 998 delaycount = readcount;
6937bb75 999 }
a1bb33af 1000
b08024a8 1001 sr_info("ols: setting samplerate to %" PRIu64 " Hz (divider %u, "
fefc4b85
BV
1002 "demux %s)", devc->cur_samplerate, devc->cur_samplerate_divider,
1003 devc->flag_reg & FLAG_DEMUX ? "on" : "off");
1004 if (send_longcommand(devc->serial->fd, CMD_SET_DIVIDER,
1005 reverse32(devc->cur_samplerate_divider)) != SR_OK)
4fe9a6da 1006 return SR_ERR;
a1bb33af 1007
43fc7885 1008 /* Send sample limit and pre/post-trigger capture ratio. */
a803c0db
BV
1009 data = ((readcount - 1) & 0xffff) << 16;
1010 data |= (delaycount - 1) & 0xffff;
fefc4b85 1011 if (send_longcommand(devc->serial->fd, CMD_CAPTURE_SIZE, reverse16(data)) != SR_OK)
e46b8fb1 1012 return SR_ERR;
a1bb33af 1013
43fc7885 1014 /* The flag register wants them here, and 1 means "disable channel". */
fefc4b85
BV
1015 devc->flag_reg |= ~(changrp_mask << 2) & 0x3c;
1016 devc->flag_reg |= FLAG_FILTER;
1017 devc->rle_count = 0;
1018 data = (devc->flag_reg << 24) | ((devc->flag_reg << 8) & 0xff0000);
1019 if (send_longcommand(devc->serial->fd, CMD_SET_FLAGS, data) != SR_OK)
e46b8fb1 1020 return SR_ERR;
a1bb33af 1021
43fc7885 1022 /* Start acquisition on the device. */
fefc4b85 1023 if (send_shortcommand(devc->serial->fd, CMD_RUN) != SR_OK)
e46b8fb1 1024 return SR_ERR;
a1bb33af 1025
fefc4b85 1026 sr_source_add(devc->serial->fd, G_IO_IN, -1, receive_data,
3cd3a20b 1027 cb_data);
a1bb33af 1028
b53738ba
UH
1029 if (!(packet = g_try_malloc(sizeof(struct sr_datafeed_packet)))) {
1030 sr_err("ols: %s: packet malloc failed", __func__);
1031 return SR_ERR_MALLOC;
1032 }
1033
1034 if (!(header = g_try_malloc(sizeof(struct sr_datafeed_header)))) {
1035 sr_err("ols: %s: header malloc failed", __func__);
c0a4b971 1036 g_free(packet);
b53738ba
UH
1037 return SR_ERR_MALLOC;
1038 }
1039
43fc7885 1040 /* Send header packet to the session bus. */
5a2326a7 1041 packet->type = SR_DF_HEADER;
43fc7885 1042 packet->payload = (unsigned char *)header;
a1bb33af
UH
1043 header->feed_version = 1;
1044 gettimeofday(&header->starttime, NULL);
f366e86c
BV
1045 sr_session_send(cb_data, packet);
1046
1047 /* Send metadata about the SR_DF_LOGIC packets to come. */
1048 packet->type = SR_DF_META_LOGIC;
1049 packet->payload = &meta;
fefc4b85 1050 meta.samplerate = devc->cur_samplerate;
f366e86c 1051 meta.num_probes = NUM_PROBES;
3cd3a20b 1052 sr_session_send(cb_data, packet);
c0a4b971 1053
a1bb33af
UH
1054 g_free(header);
1055 g_free(packet);
1056
e46b8fb1 1057 return SR_OK;
a1bb33af
UH
1058}
1059
3cd3a20b 1060/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
5d9ed643
BV
1061static int hw_dev_acquisition_stop(const struct sr_dev_inst *sdi,
1062 void *cb_data)
a1bb33af 1063{
a1bb33af 1064
17e1afcb 1065 /* Avoid compiler warnings. */
26bf9d56 1066 (void)cb_data;
afc8e4de 1067
26bf9d56 1068 abort_acquisition(sdi);
3010f21c
UH
1069
1070 return SR_OK;
a1bb33af
UH
1071}
1072
c09f0b57 1073SR_PRIV struct sr_dev_driver ols_driver_info = {
e519ba86
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1074 .name = "ols",
1075 .longname = "Openbench Logic Sniffer",
1076 .api_version = 1,
1077 .init = hw_init,
1078 .cleanup = hw_cleanup,
61136ea6 1079 .scan = hw_scan,
e7eb703f
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1080 .dev_open = hw_dev_open,
1081 .dev_close = hw_dev_close,
dddfb3db 1082 .info_get = hw_info_get,
a9a245b4 1083 .dev_config_set = hw_dev_config_set,
69040b7c
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1084 .dev_acquisition_start = hw_dev_acquisition_start,
1085 .dev_acquisition_stop = hw_dev_acquisition_stop,
fefc4b85 1086 .priv = NULL,
a1bb33af 1087};