]> sigrok.org Git - libsigrok.git/blame - hardware/asix-sigma/asix-sigma.h
Driver struct cleanups.
[libsigrok.git] / hardware / asix-sigma / asix-sigma.h
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204b1629
UH
1/*
2 * This file is part of the sigrok project.
3 *
4 * Copyright (C) 2010 Håvard Espeland <gus@ping.uio.no>,
5 * Copyright (C) 2010 Martin Stensgård <mastensg@ping.uio.no>
6 * Copyright (C) 2010 Carl Henrik Lunde <chlunde@ping.uio.no>
7 *
8 * This program is free software: you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation, either version 3 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 */
21
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22#ifndef LIBSIGROK_HARDWARE_ASIX_SIGMA_ASIX_SIGMA_H
23#define LIBSIGROK_HARDWARE_ASIX_SIGMA_ASIX_SIGMA_H
28a35d8a 24
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25/* Message logging helpers with driver-specific prefix string. */
26#define DRIVER_LOG_DOMAIN "asix-sigma: "
27#define sr_log(l, s, args...) sr_log(l, DRIVER_LOG_DOMAIN s, ## args)
28#define sr_spew(s, args...) sr_spew(DRIVER_LOG_DOMAIN s, ## args)
29#define sr_dbg(s, args...) sr_dbg(DRIVER_LOG_DOMAIN s, ## args)
30#define sr_info(s, args...) sr_info(DRIVER_LOG_DOMAIN s, ## args)
31#define sr_warn(s, args...) sr_warn(DRIVER_LOG_DOMAIN s, ## args)
32#define sr_err(s, args...) sr_err(DRIVER_LOG_DOMAIN s, ## args)
33
fefa1800 34enum sigma_write_register {
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HE
35 WRITE_CLOCK_SELECT = 0,
36 WRITE_TRIGGER_SELECT0 = 1,
37 WRITE_TRIGGER_SELECT1 = 2,
38 WRITE_MODE = 3,
39 WRITE_MEMROW = 4,
40 WRITE_POST_TRIGGER = 5,
41 WRITE_TRIGGER_OPTION = 6,
42 WRITE_PIN_VIEW = 7,
43
fefa1800 44 WRITE_TEST = 15,
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45};
46
fefa1800 47enum sigma_read_register {
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HE
48 READ_ID = 0,
49 READ_TRIGGER_POS_LOW = 1,
50 READ_TRIGGER_POS_HIGH = 2,
51 READ_TRIGGER_POS_UP = 3,
52 READ_STOP_POS_LOW = 4,
53 READ_STOP_POS_HIGH = 5,
54 READ_STOP_POS_UP = 6,
55 READ_MODE = 7,
56 READ_PIN_CHANGE_LOW = 8,
57 READ_PIN_CHANGE_HIGH = 9,
58 READ_BLOCK_LAST_TS_LOW = 10,
59 READ_BLOCK_LAST_TS_HIGH = 11,
60 READ_PIN_VIEW = 12,
61
fefa1800 62 READ_TEST = 15,
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63};
64
65#define REG_ADDR_LOW (0 << 4)
66#define REG_ADDR_HIGH (1 << 4)
67#define REG_DATA_LOW (2 << 4)
68#define REG_DATA_HIGH_WRITE (3 << 4)
69#define REG_READ_ADDR (4 << 4)
70#define REG_DRAM_WAIT_ACK (5 << 4)
71
72/* Bit (1 << 4) can be low or high (double buffer / cache) */
73#define REG_DRAM_BLOCK (6 << 4)
74#define REG_DRAM_BLOCK_BEGIN (8 << 4)
75#define REG_DRAM_BLOCK_DATA (10 << 4)
76
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77#define LEDSEL0 6
78#define LEDSEL1 7
79
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80#define NEXT_REG 1
81
82#define EVENTS_PER_CLUSTER 7
83
84#define CHUNK_SIZE 1024
85
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HE
86struct clockselect_50 {
87 uint8_t async;
88 uint8_t fraction;
89 uint16_t disabled_probes;
90};
91
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HE
92/* The effect of all these are still a bit unclear. */
93struct triggerinout {
94 uint8_t trgout_resistor_enable : 1;
95 uint8_t trgout_resistor_pullup : 1;
96 uint8_t reserved1 : 1;
97 uint8_t trgout_bytrigger : 1;
98 uint8_t trgout_byevent : 1;
99 uint8_t trgout_bytriggerin : 1;
100 uint8_t reserved2 : 2;
101
102 /* Should be set same as the first two */
103 uint8_t trgout_resistor_enable2 : 1;
104 uint8_t trgout_resistor_pullup2 : 1;
105
106 uint8_t reserved3 : 1;
107 uint8_t trgout_long : 1;
108 uint8_t trgout_pin : 1; /* Use 1k resistor. Pullup? */
109 uint8_t trgin_negate : 1;
110 uint8_t trgout_enable : 1;
111 uint8_t trgin_enable : 1;
112};
113
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114struct triggerlut {
115 /* The actual LUTs. */
116 uint16_t m0d[4], m1d[4], m2d[4];
117 uint16_t m3, m3s, m4;
118
119 /* Paramters should be sent as a single register write. */
120 struct {
121 uint8_t selc : 2;
122 uint8_t selpresc : 6;
123
124 uint8_t selinc : 2;
125 uint8_t selres : 2;
126 uint8_t sela : 2;
127 uint8_t selb : 2;
128
129 uint16_t cmpb;
130 uint16_t cmpa;
131 } params;
132};
133
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134/* Trigger configuration */
135struct sigma_trigger {
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136 /* Only two probes can be used in mask. */
137 uint16_t risingmask;
138 uint16_t fallingmask;
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139
140 /* Simple trigger support (<= 50 MHz). */
141 uint16_t simplemask;
142 uint16_t simplevalue;
143
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144 /* TODO: Advanced trigger support (boolean expressions). */
145};
146
147/* Events for trigger operation. */
148enum triggerop {
149 OP_LEVEL = 1,
150 OP_NOT,
151 OP_RISE,
152 OP_FALL,
153 OP_RISEFALL,
154 OP_NOTRISE,
155 OP_NOTFALL,
156 OP_NOTRISEFALL,
157};
158
159/* Logical functions for trigger operation. */
160enum triggerfunc {
161 FUNC_AND = 1,
162 FUNC_NAND,
163 FUNC_OR,
164 FUNC_NOR,
165 FUNC_XOR,
166 FUNC_NXOR,
167};
168
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169struct sigma_state {
170 enum {
171 SIGMA_UNINITIALIZED = 0,
172 SIGMA_IDLE,
173 SIGMA_CAPTURE,
174 SIGMA_DOWNLOAD,
175 } state;
176
177 uint32_t stoppos, triggerpos;
178 uint16_t lastts;
179 uint16_t lastsample;
180
181 int triggerchunk;
182 int chunks_downloaded;
183};
184
ea9cfed7 185/* Private, per-device-instance driver context. */
0e1357e8 186struct dev_context {
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187 struct ftdi_context ftdic;
188 uint64_t cur_samplerate;
9c939c51 189 uint64_t period_ps;
94ba4bd6 190 uint64_t limit_msec;
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191 struct timeval start_tv;
192 int cur_firmware;
193 int num_probes;
194 int samples_per_event;
195 int capture_ratio;
196 struct sigma_trigger trigger;
5b5ea7c6 197 int use_triggers;
99965709 198 struct sigma_state state;
3cd3a20b 199 void *session_dev_id;
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200};
201
204b1629 202#endif