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1 | // Copyright (C) 2010 Ubixum, Inc. |
2 | // | |
3 | // This library is free software; you can redistribute it and/or | |
4 | // modify it under the terms of the GNU Lesser General Public | |
5 | // License as published by the Free Software Foundation; either | |
6 | // version 2.1 of the License, or (at your option) any later version. | |
7 | // | |
8 | // This library is distributed in the hope that it will be useful, | |
9 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
10 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
11 | // Lesser General Public License for more details. | |
12 | // | |
13 | // You should have received a copy of the GNU Lesser General Public | |
14 | // License along with this library; if not, write to the Free Software | |
15 | // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA | |
16 | ||
17 | /*! \file | |
18 | * Define the standard fx2 interrupts. For int2 and int4 autovector | |
19 | * interrupts see \ref autovector.h | |
20 | * | |
21 | * To enable an interrupt, simply define an interrupt handler function | |
22 | * and use the appropriate ENABLE_* macro. Interrupt enable macros | |
23 | * do not enable interrupts globally. Use EA=1 to enable interrupts. | |
24 | * | |
25 | * \code | |
26 | * void main() { | |
27 | * ENABLE_RESUME(); | |
28 | * EA=1; | |
29 | * ... | |
30 | * } | |
31 | * | |
32 | * void handle_resume() interrupt RESUME_ISR { | |
33 | * CLEAR_RESUME(); | |
34 | * } | |
35 | * \endcode | |
36 | * | |
37 | * */ | |
38 | ||
39 | ||
40 | /** | |
41 | * \brief interrupt numbers for standard fx2 interrupts | |
42 | ||
43 | **/ | |
44 | typedef enum { | |
45 | IE0_ISR=0, ///< External interrupt 0 | |
46 | TF0_ISR, ///< Timer 0 interrupt | |
47 | IE1_ISR, ///< External interrupt 1 | |
48 | TF1_ISR, ///< Timer 1 interrupt | |
49 | TI_0_ISR, ///< Serial port 0 transmit or receive interrupt | |
50 | TF2_ISR, ///< Timer 2 interrupt | |
51 | RESUME_ISR, ///< Resume interrupt | |
52 | TI_1_ISR, ///< Serial port 1 transmit or receive interrupt | |
53 | USBINT_ISR, ///< Usb Interrupt. An interrupt handler for this should only be used if not using auto vectored interrupts with int2 | |
54 | I2CINT_ISR, ///< I2C Bus interrupt | |
55 | IE4_ISR, ///< External interrupt 4. An interrupt handler for this should only be used if not using auto vectored interrupts with int4 | |
56 | IE5_ISR, ///< External interrupt 5 | |
57 | IE6_ISR, ///< External interrupt 6 | |
58 | } FX2_ISR; | |
59 | ||
60 | ||
61 | /** | |
62 | * \brief Enable the timer 0 interrupt. | |
63 | * | |
64 | * There is not CLEAR_TIMER0 because the timer interrupt flag | |
65 | * is automatically cleared when the isr is called. | |
66 | **/ | |
67 | #define ENABLE_TIMER0() ET0=1 | |
68 | ||
69 | /** | |
70 | * \brief Enable timer 1 interrupt | |
71 | * There is no CLEAR_TIMER1 because the timer interrupt flag | |
72 | * is automatically cleared when the isr is called. | |
73 | **/ | |
74 | #define ENABLE_TIMER1() ET1=1 | |
75 | ||
76 | ||
77 | /** | |
78 | * \brief Enable timer 2 interrupt | |
79 | * | |
80 | * This is the same interrupt whether timer 2 overflowed or | |
81 | * for the external EXF2 flag. | |
82 | **/ | |
83 | #define ENABLE_TIMER2() ET2=1 | |
84 | /** | |
85 | * \brief Clear timer 2 interrupt | |
86 | * | |
87 | * Clears both the TF2 AND EXF2 flag | |
88 | **/ | |
89 | #define CLEAR_TIMER2() TF2=0;EXF2=0; | |
90 | ||
91 | /** | |
92 | * \brief Enable the Resume Interrupt. Requires EA=1 separately. | |
93 | **/ | |
94 | #define ENABLE_RESUME() ERESI = 1 | |
95 | ||
96 | /** | |
97 | * \brief Clear the resume interrupt. Use within the resume | |
98 | * interrupt handler. | |
99 | **/ | |
100 | #define CLEAR_RESUME() RESI=0 | |
101 | ||
102 | ||
103 | #define ENABLE_INT4() | |
104 | ||
105 | /** | |
106 | * \brief | |
107 | * Enable external interupt for int5# | |
108 | **/ | |
109 | #define ENABLE_INT5() EIEX5=1 | |
110 | ||
111 | /** | |
112 | * \brief | |
113 | * Clear int5# interrupt | |
114 | **/ | |
115 | #define CLEAR_INT5() EXIF &= ~0x80 | |
116 |