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Commit | Line | Data |
---|---|---|
27130f5d UH |
1 | 149-166 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" |
2 | 170-187 spiflash: bit: "No write operation in progress. | |
3 | Internal write enable latch is not set. | |
4 | Block protection bits (BP3-BP0): 0x0. | |
5 | Device is not in continuously program mode (CP mode). | |
6 | Status register writes are allowed. | |
7 | " | |
8 | 170-187 spiflash: field: "Status register" | |
9 | 149-187 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
10 | 206-223 spiflash: field: "Command: Read identification (RDID)" "Command: Read identification" "Cmd: Read identification" "Cmd: RDID" "RDID" | |
11 | 227-244 spiflash: field: "Manufacturer ID: 0xef" | |
12 | 245-262 spiflash: field: "Memory type: 0x40" | |
13 | 264-280 spiflash: field: "Device ID: 0x14" | |
14 | 206-280 spiflash: rdid: "Read identification (RDID): Device = Winbond Unknown" "Read identification: Device = Winbond Unknown" "RDID: Device = Winbond Unknown" "Device = Winbond Unknown" "Winbond Unknown" | |
15 | 520-537 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
16 | 541-558 spiflash: bit: "No write operation in progress. | |
17 | Internal write enable latch is not set. | |
18 | Block protection bits (BP3-BP0): 0x0. | |
19 | Device is not in continuously program mode (CP mode). | |
20 | Status register writes are allowed. | |
21 | " | |
22 | 541-558 spiflash: field: "Status register" | |
23 | 520-558 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
24 | 579-595 spiflash: wren: "Command: Write enable (WREN)" "Command: Write enable" "Cmd: Write enable" "Cmd: WREN" "WREN" | |
25 | 611-628 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
26 | 631-648 spiflash: bit: "No write operation in progress. | |
27 | Internal write enable latch is set. | |
28 | Block protection bits (BP3-BP0): 0x0. | |
29 | Device is not in continuously program mode (CP mode). | |
30 | Status register writes are allowed. | |
31 | " | |
32 | 631-648 spiflash: field: "Status register" | |
33 | 611-648 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
34 | 712-729 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
35 | 733-750 spiflash: bit: "Write operation in progress. | |
36 | Internal write enable latch is set. | |
37 | Block protection bits (BP3-BP0): 0x0. | |
38 | Device is not in continuously program mode (CP mode). | |
39 | Status register writes are allowed. | |
40 | " | |
41 | 733-750 spiflash: field: "Status register" | |
42 | 712-750 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
43 | 768-786 spiflash: field: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" | |
44 | 788-805 spiflash: bit: "Write operation in progress. | |
45 | Internal write enable latch is set. | |
46 | Block protection bits (BP3-BP0): 0x0. | |
47 | Device is not in continuously program mode (CP mode). | |
48 | Status register writes are allowed. | |
49 | " | |
50 | 788-805 spiflash: field: "Status register" | |
51 | 768-805 spiflash: rdsr: "Command: Read status register (RDSR)" "Command: Read status register" "Cmd: Read status register" "Cmd: RDSR" "RDSR" |