Difference between revisions of "Sysclk LWLA1034"
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The not-installed 10-pin connector between the USB socket and the large capacitor seems to connect to the JTAG pins of the FPGA. | |||
== Software == | == Software == | ||
Revision as of 21:38, 27 December 2013
The Sysclk LWLA1034 is a USB-based, 34-channel logic analyzer with up to 125MHz sampling rate.
See Sysclk LWLA1034/Info for more details (such as lsusb -vvv output) about the device.
Hardware
- Altera EP2C5Q208C8N (Cyclone II) FPGA
- Cypress CY7C68013A-56 (FX2) USB interface chip
- Cypress 256k×36 SRAM (likely a CY7C1361C-133AXC or similar)
Photos
PCB top view
PCB bottom view
PCB close-up
FX2
SRAM (marking removed)
The not-installed 10-pin connector between the USB socket and the large capacitor seems to connect to the JTAG pins of the FPGA.
Software
Firmware
- The FX2 firmware appears to be loaded from an EEPROM on the board, so that the final USB device descriptor is immediately available on power-up.
- End point 4 appears to be used exclusively for loading a new bitstream into the FPGA.
- End point 2 is apparently used for sending commands to the FPGA firmware, with responses (if any) coming in from end point 6.
Reverse engineering of the vendor protocol is currently in progress. See Sysclk LWLA1034/Protocol for a documentation of the findings gathered so far.