Sysclk AX-Pro
Revision as of 00:55, 14 July 2016 by Uwe Hermann (talk | contribs) (fx2lafw/libsigrok now has analog support for this device.)
 | |
| Status | supported |
|---|---|
| Source code | fx2lafw |
| Channels | 8 |
| Samplerate | 24MHz |
| Samplerate (state) | — |
| Triggers | none (SW-only) |
| Min/max voltage |
Digital: -1V — +6V Analog: ±10V (±20V max) |
| Threshold voltage | Fixed: VIH=1.6V, VIL=1.4V |
| Memory | none |
| Compression | none |
| Website | sysclk.taobao.com |
The Sysclk AX-Pro is a USB-based, 8-channel logic analyzer with up to 24MHz sampling rate, and with 2 additional analog channels.
It is a clone of the CWAV USBee AX-Pro.
In sigrok, we use the open-source fx2lafw firmware for this logic analyzer.
See Sysclk AX-Pro/Info for some more details (such as lsusb -v output) on the device.
Hardware
- Main chip: Cypress CY7C68013A-56LTXC (FX2LP)
- I2C EEPROM: Atmel ATML125 24C02N SU27 D
- Auxiliary 8051 chip: STC STC15F104E (purpose is unknown)
- Supply voltage regulator: Advanced Monolithic Systems AMS1117-3.3
- Reference voltage regulator: Advanced Monolithic Systems AMS1117-2.851218
- Analog-to-Digital converter: Texas Instruments TLC5510I
- Analog input amplifiers: Analog Devices AD8065 (SMD marking "HRA")
- Analog amplifiers negative supply: Texas Instruments LMC7660
- Some operational amplifiers: Texas Instruments LM358
- Analog channel switching relay: TQ2-2V
- Crystal: 24MHz
The analog channels are multiplexed by relay or solid-state IC to one ADC.
FX2LP pin mappings
| # | Pin | Destination | Remark |
|---|---|---|---|
| 01 | RDY0/SLRD | TRIG | socket pin |
| 13 | IFCLK | GND | grounded |
| 18..25 | PB0..7 | DCH0..7 | digital input |
| 30 | CTL1/FLAGB | CLK | socket pin |
| 31 | CTL2/FLAGC | ADC_CLK | ADC clock input |
| 33 | PA0 | relay | multiplexing ACH1/ACH2 |
| 35 | PA2 | DCH1 GND | can be isolated from GND and act as aux socket pin |
| 36 | PA3 | DCH2 GND | can be isolated from GND and act as aux socket pin |
| 38 | PA5 | STC_P3.1 | aux 8051 chip |
| 39 | PA6 | STC_P3.3 | aux 8051 chip |
| 42 | RESET# | STC_P3.2 | aux 8051 chip |
| 44 | WAKEUP | NC | not connected |
| 45..52 | PD0..7 | ADC_D1..8 | ADC data output |
Photos
Device, top
PCB, top
PCB, bottom
Protocol
Since we use the open-source fx2lafw firmware for this device, we don't need to know the protocol.