Difference between revisions of "Main Page"

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<div style="margin-top:0.5em; margin-bottom:0.5em; padding:0.5em 0.5em 0.5em 0.5em; background-color:#cfdfff; align:right; border:1px solid #aabbcc;">
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<small>
The '''sigrok''' project aims at creating a '''portable, cross-platform, Free/Libre/Open-Source logic analyzer software''' that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the '''GNU GPL'''. Some of the design goals and features include:
The '''sigrok''' project aims at creating a '''portable, cross-platform, Free/Libre/Open-Source logic analyzer software''' that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the '''GNU GPL'''. Some of the design goals and features include:
* '''Broad hardware support'''. Supports a wide variety of logic analyzers from various vendors with different capabilities.
* '''Broad hardware support'''. Supports a wide variety of logic analyzers from various vendors with different capabilities.
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* '''Scriptable protocol decoding'''. Extendable with [[protocol decoders]] and analyzers written in Python.
* '''Scriptable protocol decoding'''. Extendable with [[protocol decoders]] and analyzers written in Python.
* '''Format support'''. Supports various [[Input output formats|input and output formats]] (raw, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others).
* '''Format support'''. Supports various [[Input output formats|input and output formats]] (raw, ASCII, hex, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others).
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{| border="0" style="font-size: smaller"
{| border="0" style="font-size: smaller"
|- bgcolor="#fafafa" style="padding:6px"
|- bgcolor="#fafafa" style="padding:6px"
| style="width:190px; horizontal-align=center" | [[File:Saleae Logic.jpg|40x25px|link=Saleae Logic]]<small>[[File:Nuvola OK.png|16px]] [[Saleae Logic]]</small>
| style="width:190px; horizontal-align=center" | [[File:Saleae Logic.jpg|40x25px|link=Saleae Logic]]<small>[[File:Nuvola OK.png|16px]]<br />[[Saleae Logic]]</small>
| style="width:190px" | [[File:Eeelec xla esla100.jpg|40x25px|link=EE Electronics XLA ESLA100]]<small>[[File:Nuvola OK.png|16px]] [[EE Electronics XLA ESLA100|EE&nbsp;Eleec.&nbsp;XLA/ESLA100]]</small>
| style="width:190px" | [[File:Eeelec xla esla100.jpg|40x25px|link=EE Electronics XLA ESLA100]]<small>[[File:Nuvola OK.png|16px]]<br />[[EE Electronics XLA ESLA100|EE&nbsp;Eleec.&nbsp;XLA/ESLA100]]</small>
| style="width:190px" | [[File:ASIX SIGMA.jpg|40x25px|link=ASIX SIGMA]]<small>[[File:Nuvola OK.png|16px]] [[ASIX SIGMA]]</small>
| style="width:190px" | [[File:ASIX SIGMA.jpg|40x25px|link=ASIX SIGMA]]<small>[[File:Nuvola OK.png|16px]]<br />[[ASIX SIGMA]]</small>
| style="width:190px" | [[File:Openbench logic sniffer front.jpg|40x25px|link=Openbench Logic Sniffer]]<small>[[File:Nuvola OK.png|16px]] [[Openbench Logic Sniffer]]</small>
| style="width:190px" | [[File:Openbench logic sniffer front.jpg|40x25px|link=Openbench Logic Sniffer]]<small>[[File:Nuvola OK.png|16px]]<br />[[Openbench Logic Sniffer]]</small>
|- bgcolor="#fafafa"
|- bgcolor="#fafafa"
| style="width:190px" | [[File:Zeroplus Logic Cube.jpg|40x25px|link=ZEROPLUS Logic Cube LAP-C]]<small>[[File:Nuvola OK.png|16px]] [[ZEROPLUS Logic Cube LAP-C|Zeroplus Logic Cube LAP-C]]</small>
| style="width:190px" | [[File:Zeroplus Logic Cube.jpg|40x25px|link=ZEROPLUS Logic Cube LAP-C]]<small>[[File:Nuvola OK.png|16px]]<br />[[ZEROPLUS Logic Cube LAP-C|Zeroplus Logic Cube LAP-C]]</small>
| style="width:190px" | [[File:Chronovu la8 device.jpg|40x25px|link=ChronoVu LA8]]<small>[[File:Nuvola OK.png|16px]] [[ChronoVu LA8]]</small>
| style="width:190px" | [[File:Chronovu la8 device.jpg|40x25px|link=ChronoVu LA8]]<small>[[File:Nuvola OK.png|16px]]<br />[[ChronoVu LA8]]</small>
| style="width:190px" | [[File:Robomotic minilogic.jpg|40x25px|link=Robomotic MiniLogic]]<small>[[File:Nuvola OK.png|16px]] [[Robomotic MiniLogic]]</small>
| style="width:190px" | [[File:Robomotic minilogic.jpg|40x25px|link=Robomotic MiniLogic]]<small>[[File:Nuvola OK.png|16px]]<br />[[Robomotic MiniLogic]]</small>
| style="width:190px" | [[File:Cwav usbee sx.jpg|40x25px|link=CWAV USBee SX]]<small>[[File:Nuvola Orange.png|16px]] [[CWAV USBee SX]]</small>
| style="width:190px" | [[File:Cwav usbee sx.jpg|40x25px|link=CWAV USBee SX]]<small>[[File:Nuvola Orange.png|16px]]<br />[[CWAV USBee SX]]</small>
|- bgcolor="#fafafa"
|- bgcolor="#fafafa"
| style="width:190px" | [[File:Braintechnology usb lps.jpg|40x25px|link=Braintechnology USB-LPS]]<small>[[File:Nuvola Orange.png|16px]] [[Braintechnology USB-LPS]]</small>
| style="width:190px" | [[File:Braintechnology usb lps.jpg|40x25px|link=Braintechnology USB-LPS]]<small>[[File:Nuvola Orange.png|16px]]<br />[[Braintechnology USB-LPS]]</small>
| style="width:190px" | [[File:Intronix Logicport.jpg|40x25px|link=Intronix Logicport]]<small>[[File:Nuvola Orange.png|16px]] [[Intronix Logicport]]</small>
| style="width:190px" | [[File:Intronix Logicport.jpg|40x25px|link=Intronix Logicport]]<small>[[File:Nuvola Orange.png|16px]]<br />[[Intronix Logicport]]</small>
| style="width:190px" | [[File:Ant18e closed.jpg|40x25px|link=RockyLogic Ant18e]]<small>[[File:Nuvola Orange.png|16px]] [[RockyLogic Ant18e]]</small>
| style="width:190px" | [[File:Ant18e closed.jpg|40x25px|link=RockyLogic Ant18e]]<small>[[File:Nuvola Orange.png|16px]]<br />[[RockyLogic Ant18e]]</small>
| style="width:190px" | [[File:MSO-19.JPG|40x25px|link=Link Instruments MSO-19]]<small>[[File:Nuvola Orange.png|16px]] [[Link Instruments MSO-19]]</small>
| style="width:190px" | [[File:MSO-19.JPG|40x25px|link=Link Instruments MSO-19]]<small>[[File:Nuvola Orange.png|16px]]<br />[[Link Instruments MSO-19]]</small>
|- bgcolor="#fafafa"
|- bgcolor="#fafafa"
| style="width:190px" | [[File:Buspirate v3 front.jpg|40x25px|link=Buspirate]]<small>[[File:Nuvola Red.png|16px]] [[Buspirate]]</small>
| style="width:190px" | [[File:Buspirate v3 front.jpg|40x25px|link=Buspirate]]<small>[[File:Nuvola Red.png|16px]]<br />[[Buspirate]]</small>
| style="width:190px" | [[File:Picoscope 2203 front.jpg|40x25px|link=Pico Technology PicoScope 2203]]<small>[[File:Nuvola Red.png|16px]] [[Pico Technology PicoScope 2203|Pico Tech PicoScope 2203]]</small>
| style="width:190px" | [[File:Picoscope 2203 front.jpg|40x25px|link=Pico Technology PicoScope 2203]]<small>[[File:Nuvola Red.png|16px]]<br />[[Pico Technology PicoScope 2203|Pico Tech PicoScope 2203]]</small>
| style="width:190px" | [[File:Ikalogic scanalogic2 device with probes.jpg|40x25px|link=Ikalogic SCANALOGIC-2 PRO]]<small>[[File:Nuvola Red.png|16px]] [[Ikalogic SCANALOGIC-2 PRO]]</small>
| style="width:190px" | [[File:Ikalogic scanalogic2 device with probes.jpg|40x25px|link=Ikalogic SCANALOGIC-2 PRO]]<small>[[File:Nuvola Red.png|16px]]<br />[[Ikalogic SCANALOGIC-2 PRO]]</small>
| style="width:190px" | [[File:Microchip pickit2 device front.jpg|40x25px|link=Microchip PICkit2]]<small>[[File:Nuvola Red.png|16px]] [[Microchip PICkit2]]</small>
| style="width:190px" | [[File:Microchip pickit2 device front.jpg|40x25px|link=Microchip PICkit2]]<small>[[File:Nuvola Red.png|16px]]<br />[[Microchip PICkit2]]</small>
|- bgcolor="#fafafa"
|- bgcolor="#fafafa"
| style="width:190px" | [[File:Minila mockup.jpg|40x25px|link=MiniLA Mockup]]<small>[[File:Nuvola Red.png|16px]] [[MiniLA Mockup]]</small>
| style="width:190px" | [[File:Minila mockup.jpg|40x25px|link=MiniLA Mockup]]<small>[[File:Nuvola Red.png|16px]]<br />[[MiniLA Mockup]]</small>
| style="width:190px" | [[File:logic-shrimp-front.png|40x25px|link=Logic Shrimp]]<small>[[File:Nuvola Red.png|16px]] [[Logic Shrimp]]</small>
| style="width:190px" | [[File:logic-shrimp-front.png|40x25px|link=Logic Shrimp]]<small>[[File:Nuvola Red.png|16px]]<br />[[Logic Shrimp]]</small>
|}
|}



Revision as of 22:32, 28 April 2011

The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Some of the design goals and features include:

  • Broad hardware support. Supports a wide variety of logic analyzers from various vendors with different capabilities.
  • Cross-platform. Works on Linux, Mac OS X, Windows, and FreeBSD, and on many architectures including x86, ARM, Sparc and PowerPC.
  • Scriptable protocol decoding. Extendable with protocol decoders and analyzers written in Python.
  • Format support. Supports various input and output formats (raw, ASCII, hex, CSV, gnuplot, VCD, others).

Supported hardware

Saleae Logic.jpgNuvola OK.png
Saleae Logic
Eeelec xla esla100.jpgNuvola OK.png
EE Eleec. XLA/ESLA100
ASIX SIGMA.jpgNuvola OK.png
ASIX SIGMA
Openbench logic sniffer front.jpgNuvola OK.png
Openbench Logic Sniffer
Zeroplus Logic Cube.jpgNuvola OK.png
Zeroplus Logic Cube LAP-C
Chronovu la8 device.jpgNuvola OK.png
ChronoVu LA8
Robomotic minilogic.jpgNuvola OK.png
Robomotic MiniLogic
Cwav usbee sx.jpgNuvola Orange.png
CWAV USBee SX
Braintechnology usb lps.jpgNuvola Orange.png
Braintechnology USB-LPS
Intronix Logicport.jpgNuvola Orange.png
Intronix Logicport
Ant18e closed.jpgNuvola Orange.png
RockyLogic Ant18e
File:MSO-19.JPGNuvola Orange.png
Link Instruments MSO-19
File:Buspirate v3 front.jpgNuvola Red.png
Buspirate
Picoscope 2203 front.jpgNuvola Red.png
Pico Tech PicoScope 2203
Ikalogic scanalogic2 device with probes.jpgNuvola Red.png
Ikalogic SCANALOGIC-2 PRO
Microchip pickit2 device front.jpgNuvola Red.png
Microchip PICkit2
Minila mockup.jpgNuvola Red.png
MiniLA Mockup
Logic-shrimp-front.pngNuvola Red.png
Logic Shrimp

Sigrok stone.png Documentation

Sigrok stone.png Development

Sigrok stone.png Getting in touch

Small logic analyzer collection


Sigrok stone.png News


IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!