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== <span style="font-variant:small-caps">Supported hardware</span> == | == <span style="font-variant:small-caps">Supported hardware</span> == | ||
{| border="0" style="font-size: smaller" | |||
File:Saleae Logic.jpg|<small>[[File:Nuvola OK.png|16px]] [[Saleae Logic]]</small> | |- bgcolor="#fafafa" | ||
File:Eeelec xla esla100.jpg|<small>[[File:Nuvola OK.png|16px]] [[EE Electronics XLA ESLA100|EE Eleec. XLA/ESLA100]]</small> | | [[File:Saleae Logic.jpg|93x70px|link=Saleae Logic]]<br /><small>[[File:Nuvola OK.png|16px]] [[Saleae Logic]]</small> | ||
File:ASIX SIGMA.jpg|<small>[[File:Nuvola OK.png|16px]] [[ASIX SIGMA]]</small> | | [[File:Eeelec xla esla100.jpg|93x70px|link=EE Electronics XLA ESLA100]]<br /><small>[[File:Nuvola OK.png|16px]] [[EE Electronics XLA ESLA100|EE Eleec. XLA/ESLA100]]</small> | ||
File:Openbench logic sniffer front.jpg|<small>[[File:Nuvola OK.png|16px]] [[Openbench Logic Sniffer]]</small> | | [[File:ASIX SIGMA.jpg|93x70px|link=ASIX SIGMA]]<br /><small>[[File:Nuvola OK.png|16px]] [[ASIX SIGMA]]</small> | ||
File:Zeroplus Logic Cube.jpg|<small>[[File:Nuvola OK.png|16px]] [[ZEROPLUS Logic Cube LAP-C|Zeroplus Logic Cube LAP-C]]</small> | | [[File:Openbench logic sniffer front.jpg|93x70px|link=Openbench Logic Sniffer]]<br /><small>[[File:Nuvola OK.png|16px]] [[Openbench Logic Sniffer]]</small> | ||
File:Chronovu la8 device.jpg|<small>[[File:Nuvola OK.png|16px]] [[ChronoVu LA8]]</small> | | [[File:Zeroplus Logic Cube.jpg|93x70px|link=ZEROPLUS Logic Cube LAP-C]]<br /><small>[[File:Nuvola OK.png|16px]] [[ZEROPLUS Logic Cube LAP-C|Zeroplus Logic Cube LAP-C]]</small> | ||
File:Cwav usbee sx.jpg|<small>[[File:Nuvola Orange.png|16px]] [[CWAV USBee SX]]</small> | |- bgcolor="#fafafa" | ||
File:Braintechnology usb lps.jpg|<small>[[File:Nuvola Orange.png|16px]] [[Braintechnology USB-LPS]]</small> | | [[File:Chronovu la8 device.jpg|93x70px|link=ChronoVu LA8]]<br /><small>[[File:Nuvola OK.png|16px]] [[ChronoVu LA8]]</small> | ||
File:Intronix Logicport.jpg|<small>[[File:Nuvola Orange.png|16px]] [[Intronix Logicport]]</small> | | [[File:Cwav usbee sx.jpg|93x70px|link=CWAV USBee SX]]<br /><small>[[File:Nuvola Orange.png|16px]] [[CWAV USBee SX]]</small> | ||
File:MSO-19.JPG|<small>[[File:Nuvola Orange.png|16px]] [[Link Instruments MSO-19]]</small> | | [[File:Braintechnology usb lps.jpg|93x70px|link=Braintechnology USB-LPS]]<br /><small>[[File:Nuvola Orange.png|16px]] [[Braintechnology USB-LPS]]</small> | ||
File: | | [[File:Intronix Logicport.jpg|93x70px|link=Intronix Logicport]]<br /><small>[[File:Nuvola Orange.png|16px]] [[Intronix Logicport]]</small> | ||
File: | | [[File:MSO-19.JPG|93x70px|link=Link Instruments MSO-19]]<br /><small>[[File:Nuvola Orange.png|16px]] [[Link Instruments MSO-19]]</small> | ||
File:Ikalogic scanalogic2 device with probes.jpg|<small>[[File:Nuvola Red.png|16px]] [[Ikalogic SCANALOGIC-2 PRO]]</small> | |- bgcolor="#fafafa" | ||
File:Ant18e closed.jpg|<small>[[File:Nuvola Orange.png|16px]] [[RockyLogic Ant18e]]</small> | | [[File:Picoscope 2203 front.jpg|93x70px|link=Pico Technology PicoScope 2203]]<br /><small>[[File:Nuvola Red.png|16px]] [[Pico Technology PicoScope 2203|Pico Tech PicoScope 2203]]</small> | ||
File:Microchip pickit2 device front.jpg|<small>[[File:Nuvola Red.png|16px]] [[Microchip PICkit2]]</small> | | [[File:Buspirate v3 front.jpg|93x70px|link=Buspirate]]<br /><small>[[File:Nuvola Red.png|16px]] [[Buspirate]]</small> | ||
| [[File:Ikalogic scanalogic2 device with probes.jpg|93x70px|link=Ikalogic SCANALOGIC-2 PRO]]<br /><small>[[File:Nuvola Red.png|16px]] [[Ikalogic SCANALOGIC-2 PRO]]</small> | |||
| [[File:Ant18e closed.jpg|93x70px|link=RockyLogic Ant18e]]<br /><small>[[File:Nuvola Orange.png|16px]] [[RockyLogic Ant18e]]</small> | |||
| [[File:Microchip pickit2 device front.jpg|93x70px|link=Microchip PICkit2]]<br /><small>[[File:Nuvola Red.png|16px]] [[Microchip PICkit2]]</small> | |||
|} | |||
<table width="100%"> | <table width="100%"> | ||
Revision as of 18:21, 25 April 2011
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The sigrok project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the GNU GPL. Some of the design goals and features include:
Supported hardware
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 News
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IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released under the CC-BY-SA 3.0 license. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!