Difference between revisions of "Hantek 1008C"
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=== Sample of initialization cycle === | === Sample of initialization cycle === | ||
B0 | * B0 | ||
F3 | * F3 | ||
* B901BF040000 | |||
* B700 | |||
* BB0800 | |||
B5 | * B5 | ||
B6 | * B6 | ||
E5 | * E5 | ||
F7 | * F7 | ||
F8 | * F8 | ||
FA | * FA | ||
F5 | * F5 | ||
A008 | * A008 | ||
* AA0101010101010101 | |||
* A311 | |||
* C10000 | |||
* A70000 | |||
* AC01F40009C50009C5 | |||
=== Start of waiting cycle for data to be ready into the buffers === | === Start of waiting cycle for data to be ready into the buffers === | ||
Revision as of 15:15, 20 November 2017
 | |
| Status | planned |
|---|---|
| Channels | 8 |
| Samplerate | 2.4MS/s (see notes) |
| Samplerate (state) | ? |
| Triggers | ? |
| Min/max voltage | ? |
| Memory | ? |
| Compression | ? |
| Website | hantek.com |
The Hantek 1008C is a USB-based 8-channel oscilloscope, with 8 channel digital pattern generator.
See Hantek 1008C/Info for some more details (such as lsusb -vvv output) on the device.
Hardware
- CPU: ST Microelectronics STM32F103C6T6A
- Low-dropout voltage regulator: Advanced Monolithic Systems AMS1117-3.3
- 8-channel analog multiplexer/demultiplexer: NXP Semiconductor 74HCT4051D (1 per analog channel)
- Octal 3-state buffer: Fairchild Semiconductor MM74HC244SJ (in the path of digital outputs)
- 8-bit shift register with 3-state output: 74HC595 (3 total)
- Dual opamp: in MSOP-8 package, Texas Instruments unknown model (chip markings "TI 25 AVG") (1 per analog channel)
Photos
Device, top
Device, bottom
Package contents
Device, front
Device, back
Front inputs
Void if removed sticker
Top cover
Top cover removed
PCB, top
PCB, bottom
PCB revision, v1.00.4
Main CPU, STM32F1
74HC4051D
AMS1117 3.3V LDO
HC224SJ
HC595
TI25AVG
Analog input circuit
Protocol
Need to continuously send commands to the OUT Endpoint, and for each command receive the result from the IN Endpoint (both Endpoints can transfer max 64 bytes). The device got logically disconnected automatically if not receive any command after 7 seconds.
List of commands (incomplete)
- AA -> set which channel to enable (ie. AA 01 01 00 00 00 00 00 00 enable channel 1 and 2)
- A2 -> set voltage level for each channel (ie. A2 03 03 03 03 03 03 03 03 apply +-15V range on each channel)
- A3 -> set sampling rate (ie. A3 11)
Sample of initialization cycle
- B0
- F3
- B901BF040000
- B700
- BB0800
- B5
- B6
- E5
- F7
- F8
- FA
- F5
- A008
- AA0101010101010101
- A311
- C10000
- A70000
- AC01F40009C50009C5
Start of waiting cycle for data to be ready into the buffers
F3 A2 01 01 01 01 01 01 01 01 A4 01 C0 C2 A5 5A A5 5A
Buffers Reading Cycle
- C6 02 (return Buffer 1 size)
- A6 02 (acquire 64 bytes, 32 samples of 12 bits each, repeated 60 times get 2000 samples)
- C6 03 (return Buffer 2 size)
- A6 03 (acquire 64 bytes, 32 samples of 12 bits each, repeated 60 times get 2000 samples)
Notes
- Sample rate: maximum measured 2.4MS/s if enable just 1 channel. Drop down to 1.2MS/s if enable 2 channels.
- Acquisition: on each scan acquire 4000 samples from 2 buffers (2000 samples each buffer)