sigrok - User contributions [en]

Intronix Logicport LA1034

2010-04-04T20:11:20Z

Xunil:

[[File:Intronix_Logicport.jpg|thumb|right|Intronix Logicport]]
[[File:Intronix_Logicport_with_probes.jpg|thumb|right|Intronix Logicport with probes connector attached]]
[[File:Intronix_Logicport_PCB_Front.jpg|thumb|right|PCB front view]]
[[File:Intronix_Logicport_PCB_Back.jpg|thumb|right|PCB back view]]
[[File:Intronix_Logicport_Circuit_Detail.jpg|thumb|right|Circuit detail]]

The [http://www.pctestinstruments.com/ Intronix Logicport LA1034] is an FPGA-based logic analyzer, capable of sampling data on 34 channels at up to 500MHz. It has very limited memory, however, and can only use compression at rates up to 200MHz.

The board is mostly composed of the following components:
* Altera EP1C4F324C6 (FPGA)
* FTDI FT245BM (USB interface)
* AT93C46 (small EEPROM, for storing the FTDI's USB vendor and product ID)

See [[Intronix_Logicport/Info]].
== Resources ==

* [http://lostscrews.com/viewtopic.php?f=8&t=40 LostScrews: Intronix Logicport]
* More [http://xunil.net/~xunil/intronix/ Intronix Logicport] photos

Intronix Logicport/Info

2010-04-04T20:10:39Z

Xunil:

== lsusb output ==
For reasons which are not entirely clear, the Logicport identifies as an FTDI device (despite having an EEPROM in which to store a unique VID/PID).

$ '''sudo lsusb -vvv -d 0403:dc48'''
Bus 002 Device 020: ID 0403:dc48 Future Technology Devices International, Ltd
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 1.10
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 8
idVendor 0x0403 Future Technology Devices International, Ltd
idProduct 0xdc48
bcdDevice 4.00
iManufacturer 1 Intronix
iProduct 2 LogicPort Logic Analyzer
iSerial 3 19991909
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 32
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 0
bmAttributes 0x80
(Bus Powered)
MaxPower 200mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 2 LogicPort Logic Analyzer
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02 EP 2 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Device Status: 0x0000
(Bus Powered)

Intronix Logicport/Info

2010-04-04T20:09:36Z

Xunil: Created page with ' $ '''sudo lsusb -vvv -d 0403:dc48''' Bus 002 Device 020: ID 0403:dc48 Future Technology Devices International, Ltd Device Descriptor: bLength 18 bDe…'

$ '''sudo lsusb -vvv -d 0403:dc48'''

Bus 002 Device 020: ID 0403:dc48 Future Technology Devices International, Ltd
Device Descriptor:
bLength 18
bDescriptorType 1
bcdUSB 1.10
bDeviceClass 0 (Defined at Interface level)
bDeviceSubClass 0
bDeviceProtocol 0
bMaxPacketSize0 8
idVendor 0x0403 Future Technology Devices International, Ltd
idProduct 0xdc48
bcdDevice 4.00
iManufacturer 1 Intronix
iProduct 2 LogicPort Logic Analyzer
iSerial 3 19991909
bNumConfigurations 1
Configuration Descriptor:
bLength 9
bDescriptorType 2
wTotalLength 32
bNumInterfaces 1
bConfigurationValue 1
iConfiguration 0
bmAttributes 0x80
(Bus Powered)
MaxPower 200mA
Interface Descriptor:
bLength 9
bDescriptorType 4
bInterfaceNumber 0
bAlternateSetting 0
bNumEndpoints 2
bInterfaceClass 255 Vendor Specific Class
bInterfaceSubClass 255 Vendor Specific Subclass
bInterfaceProtocol 255 Vendor Specific Protocol
iInterface 2 LogicPort Logic Analyzer
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x81 EP 1 IN
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Endpoint Descriptor:
bLength 7
bDescriptorType 5
bEndpointAddress 0x02 EP 2 OUT
bmAttributes 2
Transfer Type Bulk
Synch Type None
Usage Type Data
wMaxPacketSize 0x0040 1x 64 bytes
bInterval 0
Device Status: 0x0000
(Bus Powered)

File:Intronix Logicport Circuit Detail.jpg

2010-04-01T15:33:30Z

Xunil: /* Source: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==
Author: [[User:Xunil|Robert Liesenfeld]]

File:Intronix Logicport Circuit Detail.jpg

2010-04-01T15:33:14Z

Xunil: /* Copyright status: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==

File:Intronix Logicport PCB Back.jpg

2010-04-01T15:32:47Z

Xunil: /* Source: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==
Author: [[User:Xunil|Robert Liesenfeld]]

File:Intronix Logicport PCB Back.jpg

2010-04-01T15:32:38Z

Xunil: /* Copyright status: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==

File:Intronix Logicport PCB Front.jpg

2010-04-01T15:32:16Z

Xunil: /* Source: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==
Author: [[User:Xunil|Robert Liesenfeld]]

File:Intronix Logicport PCB Front.jpg

2010-04-01T15:32:08Z

Xunil: /* Copyright status: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==

File:Intronix Logicport with probes.jpg

2010-04-01T15:31:34Z

Xunil: /* Source: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==
Author: [[User:Xunil|Robert Liesenfeld]]

File:Intronix Logicport with probes.jpg

2010-04-01T15:31:05Z

Xunil: /* Copyright status: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==

File:Intronix Logicport.jpg

2010-04-01T15:30:43Z

Xunil: /* Source: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==
Author: [[User:Xunil|Robert Liesenfeld]]

File:Intronix Logicport.jpg

2010-04-01T15:28:22Z

Xunil: /* Copyright status: */

== Summary ==

== Copyright status: ==
CC-BY-SA 3.0

== Source: ==

Main Page

2010-04-01T15:27:03Z

Xunil:

<div style="margin-top:0.5em; margin-bottom:0.5em; padding:0.5em 0.5em 0.5em 0.5em; background-color:#cfdfff; align:right; border:1px solid #aabbcc;">
The '''sigrok''' project aims at creating a portable, cross-platform, Free/Libre/Open-Source logic analyzer software that supports various (usually USB-based) logic analyzer hardware products. The code is licensed under the terms of the '''GNU GPL'''.
</div>

== Design goals ==

* '''Hardware support'''. Supports a wide variety of logic analyzer hardware from various vendors with different capabilities.
* '''Cross-platform'''. Works on Linux, Mac OS X and Windows, and on architectures including x86, ARM, Sparc and PowerPC.
* '''Scriptable'''. Extendable with protocol decoders and analyzers written in Python.
* '''Format support'''. Supports various input and output formats (raw, CSV, gnuplot, [http://en.wikipedia.org/wiki/Value_change_dump VCD], others).

== Supported hardware ==

<gallery widths="120px" heights="70px">
File:Saleae Logic.jpg|'''[[Saleae Logic]]''' (supported)
File:Open workbench logic sniffer.jpg|'''[[Openbench Logic Sniffer]]''' (work in progress)
File:Cwav usbee sx.jpg|'''[[CWAV USBee SX]]''' (coming up)
File:Braintechnology usb lps.jpg|'''[[Braintechnology USB-LPS]]''' (planned)
File:Zeroplus Logic Cube.jpg|'''[[Zeroplus Logic Cube]]''' (planned)
File:Buspirate v3.jpg|'''[[Buspirate]]''' (planned)
File:Intronix Logicport.jpg|'''[[Intronix Logicport]]''' (planned)
</gallery>

<table width="100%">
<tr style="vertical-align:top">
<td style="vertical-align:top">

== Development ==

* [[TODO]]
* [[Status]]
* [[Design Ideas]]
* [[Protocol Decoders]]
* Build information:
** [[Linux]]
** [[Mac OS X]]
** [[Windows]]

</td><td style="vertical-align:top">

== Documentation ==

* [[Command-line]]
* [[GUI|Cross-platform GUI]]
* [[Formats and structures]]
* [[Hardware plugin API]]
* [[Output API]]

</td><td style="vertical-align:top">

== Getting in touch ==

* Mailing lists: [https://lists.sourceforge.net/lists/listinfo/sigrok-devel sigrok-devel], [https://lists.sourceforge.net/lists/listinfo/sigrok-commits sigrok-commits].
* IRC: '''[irc://chat.freenode.net/sigrok #sigrok]''' on [http://www.freenode.net Freenode].
* identi.ca: [http://www.identi.ca/group/sigrok sigrok group]
* [[Press]]

</td>
</tr>
</table>

----

'''IMPORTANT: Please note that (unless explicitly specified otherwise) all contents in this wiki (including text and images) are released to the CC-BY-SA 3.0. If you don't want that, please explicitly specify another free-ish license when adding pages or images to the wiki!'''

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File:Intronix Logicport Circuit Detail.jpg

2010-04-01T15:25:07Z

Xunil:

== Summary ==

== Copyright status: ==

== Source: ==

File:Intronix Logicport PCB Back.jpg

2010-04-01T15:24:35Z

Xunil:

== Summary ==

== Copyright status: ==

== Source: ==

File:Intronix Logicport PCB Front.jpg

2010-04-01T15:24:14Z

Xunil:

== Summary ==

== Copyright status: ==

== Source: ==

File:Intronix Logicport with probes.jpg

2010-04-01T15:23:57Z

Xunil:

== Summary ==

== Copyright status: ==

== Source: ==

File:Intronix Logicport.jpg

2010-04-01T15:23:31Z

Xunil:

== Summary ==

== Copyright status: ==

== Source: ==

Intronix Logicport LA1034

2010-04-01T15:23:02Z

Xunil:

[[File:Intronix_Logicport.jpg|thumb|right|Intronix Logicport]]
[[File:Intronix_Logicport_with_probes.jpg|thumb|right|Intronix Logicport with probes connector attached]]
[[File:Intronix_Logicport_PCB_Front.jpg|thumb|right|Intronix Logicport, PCB front view]]
[[File:Intronix_Logicport_PCB_Back.jpg|thumb|right|Intronix Logicport, PCB back view]]
[[File:Intronix_Logicport_Circuit_Detail.jpg|thumb|right|Intronix Logicport, circuit detail]]

The Intronix Logicport LA1034 is an FPGA-based logic analyzer, capable of sampling data on 34 channels at up to 500Mhz. It has very limited memory, however, and can only use compression at rates up to 200Mhz. It is available from [http://www.pctestinstruments.com/ http://www.pctestinstruments.com/].

The board is mostly composed of the following components:
* Altera EP1C4F324C6 (FPGA)
* FTDI FT245BM (USB interface)
* AT93C46 (small EEPROM, for storing the FTDI's USB vendor and product ID)