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	<id>https://sigrok.org/w/api.php?action=feedcontributions&amp;feedformat=atom&amp;user=FFY00</id>
	<title>sigrok - User contributions [en]</title>
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	<link rel="alternate" type="text/html" href="https://sigrok.org/wiki/Special:Contributions/FFY00"/>
	<updated>2026-04-09T05:05:04Z</updated>
	<subtitle>User contributions</subtitle>
	<generator>MediaWiki 1.37.1</generator>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-back.jpg&amp;diff=14567</id>
		<title>File:Mcupro-2018-back.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-back.jpg&amp;diff=14567"/>
		<updated>2019-11-13T17:45:26Z</updated>

		<summary type="html">&lt;p&gt;FFY00: FFY00 uploaded a new version of File:Mcupro-2018-back.jpg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-front.jpg&amp;diff=14566</id>
		<title>File:Mcupro-2018-front.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-front.jpg&amp;diff=14566"/>
		<updated>2019-11-13T17:44:55Z</updated>

		<summary type="html">&lt;p&gt;FFY00: FFY00 uploaded a new version of File:Mcupro-2018-front.jpg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-case.jpg&amp;diff=14565</id>
		<title>File:Mcupro-2018-case.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-case.jpg&amp;diff=14565"/>
		<updated>2019-11-13T17:43:47Z</updated>

		<summary type="html">&lt;p&gt;FFY00: FFY00 uploaded a new version of File:Mcupro-2018-case.jpg&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=Mcupro_Logic16_clone&amp;diff=13966</id>
		<title>Mcupro Logic16 clone</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=Mcupro_Logic16_clone&amp;diff=13966"/>
		<updated>2018-12-13T15:25:24Z</updated>

		<summary type="html">&lt;p&gt;FFY00: Add 2018 variant&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;{{DISPLAYTITLE:mcupro Logic16 clone}}&lt;br /&gt;
{{Infobox logic analyzer&lt;br /&gt;
| image            = [[File:Mcupro_Logic16_overview.png|180px]]&lt;br /&gt;
| name             = mcupro Logic16 clone&lt;br /&gt;
| status           = supported&lt;br /&gt;
| source_code_dir  = saleae-logic16&lt;br /&gt;
| channels         = 3/6/9/16&lt;br /&gt;
| samplerate       = 100/50/32/16MHz&lt;br /&gt;
| samplerate_state = &amp;amp;mdash;&lt;br /&gt;
| triggers         = none (SW-only)&lt;br /&gt;
| voltages         = -0.9V &amp;amp;mdash; 6V&lt;br /&gt;
| threshold        = 1.5V (operates with 3.3V logic)&lt;br /&gt;
| memory           = none&lt;br /&gt;
| compression      = yes&lt;br /&gt;
| website          = [https://www.aliexpress.com/item/new-USB-Logic-100MHz-16Ch-Logic-Analyzer-for-ARM-FPGA-E4-004/32931358747.html aliexpress.com]&lt;br /&gt;
}}&lt;br /&gt;
&lt;br /&gt;
The &amp;#039;&amp;#039;&amp;#039;mcupro Logic16 clone&amp;#039;&amp;#039;&amp;#039; is a USB-based, 16-channel logic analyzer with 100/50/32/16MHz sampling rate (at 3/6/9/16 enabled channels).&lt;br /&gt;
&lt;br /&gt;
This is a clone of the [[Saleae Logic16]].&lt;br /&gt;
&lt;br /&gt;
See [[mcupro Logic16 clone/Info]] for more details (such as &amp;#039;&amp;#039;&amp;#039;lsusb -v&amp;#039;&amp;#039;&amp;#039; output) about the device.&lt;br /&gt;
&lt;br /&gt;
== Hardware (Actel variant) ==&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA&amp;#039;&amp;#039;&amp;#039;: [https://www.actel.com/documents/PA3_DS.pdf Actel A3P125]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;USB interface chip&amp;#039;&amp;#039;&amp;#039;: [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;I²C EEPROM&amp;#039;&amp;#039;&amp;#039;: [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;3.3V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;1.5V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal&amp;#039;&amp;#039;&amp;#039;: 24MHz&lt;br /&gt;
&lt;br /&gt;
== Hardware (Cyclone variant) ==&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA&amp;#039;&amp;#039;&amp;#039;: [https://www.altera.com/products/fpga/cyclone-series/cyclone/support.html#Cyclone-Device-Handbook--All-Sections- Altera Cyclone EP1C3T100]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;USB interface chip&amp;#039;&amp;#039;&amp;#039;: [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;I²C EEPROM&amp;#039;&amp;#039;&amp;#039;: [http://www.atmel.com/Images/doc3256.pdf Atmel 24C02N]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;3.3V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-3.3]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;1.5V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://ams-semitech.com/attachments/File/AMS1117_20120314.pdf Advanced Monolithic Systems AMS1117-1.5]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FX2)&amp;#039;&amp;#039;&amp;#039;: 24MHz&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FPGA)&amp;#039;&amp;#039;&amp;#039;: 100MHz&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA bitstream&amp;#039;&amp;#039;&amp;#039;: 25P10 1MBit SPI NOR flash, ST Microelectronics&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Bootstrap controller&amp;#039;&amp;#039;&amp;#039;: [http://www.stcmcu.com/datasheet/stc/STC-AD-PDF/STC15.pdf STCMCU 15F10], 8051 compatible&lt;br /&gt;
&lt;br /&gt;
== Hardware (2018 variant) ==&lt;br /&gt;
&lt;br /&gt;
The PCB is marked &amp;quot;Logic 16 Saleae&amp;quot;. This variant also comes in a case identical to the [[Noname_XL-LOGIC16-100M]].&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA&amp;#039;&amp;#039;&amp;#039;: Markings ground off, but pinout indicates an Altera Cyclone EP1C3T144.&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;USB interface chip&amp;#039;&amp;#039;&amp;#039;: [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;I²C EEPROM&amp;#039;&amp;#039;&amp;#039;: Markings ground off&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;3.3V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;1.5V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FX2)&amp;#039;&amp;#039;&amp;#039;: 24MHz&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FPGA)&amp;#039;&amp;#039;&amp;#039;: 32MHz&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA bitstream&amp;#039;&amp;#039;&amp;#039;: 25P10 1MBit SPI NOR flash, ST Microelectronics&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Bootstrap controller&amp;#039;&amp;#039;&amp;#039;: Not required?&lt;br /&gt;
&lt;br /&gt;
== Hardware (2015-01-08 variant) ==&lt;br /&gt;
&lt;br /&gt;
The PCB is marked &amp;quot;Saleae Logic 16 By MCUPro 2015-1-8&amp;quot;. Readily identifiable by the irregular PCB traces, and switching power supplies. This comes in a different case, identical to the [[Noname_XL-LOGIC16-100M]].&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA&amp;#039;&amp;#039;&amp;#039;: Markings ground off&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;USB interface chip&amp;#039;&amp;#039;&amp;#039;: [http://www.cypress.com/?docID=45142 Cypress CY7C68013A]&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;I²C EEPROM&amp;#039;&amp;#039;&amp;#039;: Markings ground off&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;3.3V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 150k/680k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;1.5V voltage regulator&amp;#039;&amp;#039;&amp;#039;: [http://www.techcodesemi.com/cn/products_info.asp?pid=26 TD 6810] adjustable version + 160k/240k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FX2)&amp;#039;&amp;#039;&amp;#039;: 24MHz&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FPGA)&amp;#039;&amp;#039;&amp;#039;: Looks like 32MHz?&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA bitstream&amp;#039;&amp;#039;&amp;#039;: 25P10 1MBit SPI NOR flash, ST Microelectronics&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Bootstrap controller&amp;#039;&amp;#039;&amp;#039;: Not required?&lt;br /&gt;
&lt;br /&gt;
== Hardware (2014-01-25 variant) ==&lt;br /&gt;
&lt;br /&gt;
The PCB is marked &amp;quot;Saleae Logic 16 mcupro 2014.1.25&amp;quot;.&lt;br /&gt;
&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA&amp;#039;&amp;#039;&amp;#039;: Markings ground off, but pinout and JTAG (IDCODE 0x020810dd) indicate an Altera Cyclone EP1C3T100.&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;USB interface chip&amp;#039;&amp;#039;&amp;#039;: Markings sometimes ground off ? CY7C68013A&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FX2)&amp;#039;&amp;#039;&amp;#039;: marked &amp;quot;DKF 24.000&amp;quot;&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Crystal (FPGA)&amp;#039;&amp;#039;&amp;#039;: marked &amp;quot;RAK32.00&amp;quot;&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;FPGA bitstream&amp;#039;&amp;#039;&amp;#039;: 25P10 1MBit SPI NOR flash, ST Microelectronics (see [https://www.micron.com/~/media/documents/products/data-sheet/nor-flash/serial-nor/m25p/m25p10a.pdf Micron M25P10] too)&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;I²C EEPROM&amp;#039;&amp;#039;&amp;#039;: None ? (CY7C I2C port wired to FPGA pins)&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Bootstrap controller&amp;#039;&amp;#039;&amp;#039;: Markings ground off, pinout could indicate a [http://www.stcmcu.com/datasheet/stc/STC-AD-PDF/STC15.pdf STCMCU 15F10x] 8051-based mcu?&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;3.3V voltage regulator&amp;#039;&amp;#039;&amp;#039;: unknown switching regulator (marked &amp;quot;IC5CJ&amp;quot; ?) + 150k/680k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;1.5V voltage regulator&amp;#039;&amp;#039;&amp;#039;: unknown switching regulator (marked &amp;quot;IC5CJ&amp;quot; ?) + 160k/240k resistors pair&lt;br /&gt;
* &amp;#039;&amp;#039;&amp;#039;Channel input buffering&amp;#039;&amp;#039;&amp;#039;: none, only simple resistor (510R) + TVS diode array protection (possibly [http://www.semtech.com/images/datasheet/srv05-4.pdf Semtech SRV05])&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
The bottom two channels are not GND, but SCK (sample clock out) and HCK (half of SCK out).&lt;br /&gt;
&lt;br /&gt;
== Photos (Actel) ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_case_top.jpeg|&amp;lt;small&amp;gt;Device, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_case_bottom.jpeg|&amp;lt;small&amp;gt;Device, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_top.jpeg|&amp;lt;small&amp;gt;PCB, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_bottom.jpeg|&amp;lt;small&amp;gt;PCB, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Photos (Cyclone) ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_case_top.jpeg|&amp;lt;small&amp;gt;Device, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro_Logic16_case_bottom.jpeg|&amp;lt;small&amp;gt;Device, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro Logic16 Variant2 top.jpg|&amp;lt;small&amp;gt;PCB with Altera Cyclone, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:IMG 0207 v1.JPG|&amp;lt;small&amp;gt;PCB with Altera Cyclone, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro Logic16 Variant2 top flash+uC.jpg|&amp;lt;small&amp;gt;PCB, top, 1MBit flash and STCMCU uC&amp;lt;/small&amp;gt;&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
== Photos (2018 variant) ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Mcupro-2018-case.jpg|&amp;lt;small&amp;gt;Device, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2018-front.jpg|&amp;lt;small&amp;gt;PCB, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2018-back.jpg|&amp;lt;small&amp;gt;PCB, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Photos (2015-01-08 variant) ==&lt;br /&gt;
&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:Xl-logic16-100m-external.jpg|&amp;lt;small&amp;gt;Device, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2015-1-8-top-overview.jpg|&amp;lt;small&amp;gt;PCB, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2015-1-8-bottom-overview.jpg|&amp;lt;small&amp;gt;PCB, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2015-1-8-voltage-regulators.jpg|&amp;lt;small&amp;gt;PCB, 3.3 and 1.5 voltage regulators&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2015-1-8-bottom-markings-intact.jpg|&amp;lt;small&amp;gt;PCB, bottom - chip markings intact&amp;lt;/small&amp;gt;&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Photos (2014-01-25 variant) ==&lt;br /&gt;
&lt;br /&gt;
&amp;lt;gallery&amp;gt;&lt;br /&gt;
File:seleae-logic16-aliexpress-clone.jpg|&amp;lt;small&amp;gt;Device, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2014-1-25-top_ortho.jpg|&amp;lt;small&amp;gt;PCB top detail&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2014-1-25-bottom_ortho.jpg|&amp;lt;small&amp;gt;PCB bottom detail&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2014-1-25-top-overview.jpg|&amp;lt;small&amp;gt;PCB, top&amp;lt;/small&amp;gt;&lt;br /&gt;
File:Mcupro-2014-1-25-bottom-overview.jpg|&amp;lt;small&amp;gt;PCB, bottom&amp;lt;/small&amp;gt;&lt;br /&gt;
&lt;br /&gt;
&amp;lt;/gallery&amp;gt;&lt;br /&gt;
&lt;br /&gt;
== Protocol ==&lt;br /&gt;
&lt;br /&gt;
See [[Saleae_Logic16#Protocol]].&lt;br /&gt;
&lt;br /&gt;
== Firmware ==&lt;br /&gt;
&lt;br /&gt;
;Actel variant&lt;br /&gt;
: This logic analyzer works with unmodified Saleae software. The Actel FPGA has on-chip flash storage, so it only requires an upload of Cypress FX2LP firmware in order to operate.&lt;br /&gt;
;Cyclone variant&lt;br /&gt;
: This logic analyzer works with unmodified Saleae software. The PCB contains an SPI flash chip, so it only requires an upload of Cypress FX2LP firmware in order to operate.&lt;br /&gt;
;2015-01-08 and 2018 variants&lt;br /&gt;
: Only requires an upload of Cypress FX2LP firmware to operate. Open-source binaries from [https://github.com/gregani/la16fw gregani] work, but must be renamed to &amp;#039;&amp;#039;&amp;#039;saleae-logic16-fx2.fw&amp;#039;&amp;#039;&amp;#039;. It also requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).&lt;br /&gt;
;2014-01-25 variant&lt;br /&gt;
: Seems to have the bitstream in internal flash, so it only requires an upload of Cypress FX2LP firmware in order to operate. This requires a [[libsigrok]] more recent than 2014-08-22 to work (see bug [http://sigrok.org/bugzilla/show_bug.cgi?id=680#c4 #680]).&lt;br /&gt;
&lt;br /&gt;
The firmware extraction steps are identical to [[Saleae_Logic16#Firmware|steps for Saleae Logic16]], however you only need to have &amp;#039;&amp;#039;&amp;#039;saleae-logic16-fx2.fw&amp;#039;&amp;#039;&amp;#039; installed.&lt;br /&gt;
&lt;br /&gt;
[[Category:Device]]&lt;br /&gt;
[[Category:Logic analyzer]]&lt;br /&gt;
[[Category:Supported]]&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-back.jpg&amp;diff=13965</id>
		<title>File:Mcupro-2018-back.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-back.jpg&amp;diff=13965"/>
		<updated>2018-12-13T15:17:02Z</updated>

		<summary type="html">&lt;p&gt;FFY00: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-front.jpg&amp;diff=13964</id>
		<title>File:Mcupro-2018-front.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-front.jpg&amp;diff=13964"/>
		<updated>2018-12-13T15:16:46Z</updated>

		<summary type="html">&lt;p&gt;FFY00: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=File:Mcupro-2018-case.jpg&amp;diff=13963</id>
		<title>File:Mcupro-2018-case.jpg</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=File:Mcupro-2018-case.jpg&amp;diff=13963"/>
		<updated>2018-12-13T15:16:28Z</updated>

		<summary type="html">&lt;p&gt;FFY00: &lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;== Licensing ==&lt;br /&gt;
{{PD}}&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=User:FFY00&amp;diff=13962</id>
		<title>User:FFY00</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=User:FFY00&amp;diff=13962"/>
		<updated>2018-12-13T14:50:52Z</updated>

		<summary type="html">&lt;p&gt;FFY00: Add real name and email contact&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;Filipe Laíns (FFY00)&lt;br /&gt;
&lt;br /&gt;
Contact: lains@archlinux.org&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
	<entry>
		<id>https://sigrok.org/w/index.php?title=User:FFY00&amp;diff=13961</id>
		<title>User:FFY00</title>
		<link rel="alternate" type="text/html" href="https://sigrok.org/w/index.php?title=User:FFY00&amp;diff=13961"/>
		<updated>2018-12-13T14:50:05Z</updated>

		<summary type="html">&lt;p&gt;FFY00: Create page&lt;/p&gt;
&lt;hr /&gt;
&lt;div&gt;FFY00&lt;/div&gt;</summary>
		<author><name>FFY00</name></author>
	</entry>
</feed>