X-Git-Url: https://sigrok.org/gitweb/?p=sigrok-test.git;a=blobdiff_plain;f=decoder%2Ftest%2Fpwm%2Ftest.conf;fp=decoder%2Ftest%2Fpwm%2Ftest.conf;h=f3ace8ff79a2c66f1cdeff67a19bdffc76e64016;hp=83f4be4c4be990fb9619861e569d948c9e4084b9;hb=e3615849859e15e54a58984ee61ce3f54c693b83;hpb=e56d386c6187319c9d68496b71ff3338c9428d25 diff --git a/decoder/test/pwm/test.conf b/decoder/test/pwm/test.conf index 83f4be4..f3ace8f 100644 --- a/decoder/test/pwm/test.conf +++ b/decoder/test/pwm/test.conf @@ -3,3 +3,27 @@ test alsa_test_snippet input pwm/alsa_test/pwmtest_snippet.sr output pwm annotation match alsa_test_snippet.output output pwm binary class raw match alsa_test_snippet.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_falling_ok + protocol-decoder pwm channel data=4 option polarity=active-low + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1 + protocol-decoder pwm channel data=4 initial_pin data=1 option polarity=active-low + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_falling_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_falling_ok_initial1.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_rising_ok + protocol-decoder pwm channel data=4 option polarity=active-high + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.bin_raw + +test spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0 + protocol-decoder pwm channel data=4 initial_pin data=0 option polarity=active-high + input spi/allmodes/spi_0x35_cpol0_cpha0_trigger_clk_rising_ok.sr + output pwm annotation match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0.output + output pwm binary class raw match spi_0x35_cpol0_cpha0_trigger_clk_rising_ok_initial0.bin_raw