From bf3d9c4023708cc0e33133f7a91e4e2488e0a2c6 Mon Sep 17 00:00:00 2001
From: Libor Gabaj <libor.gabaj@gmail.com>
Date: Sat, 2 Feb 2019 21:29:36 +0100
Subject: [PATCH] rtc_dallas_ds1307: Add sigrok session file for demonstrating
 bugfixes.

- 12-hours mode
- PM flag
- 32768 Hz SQW
---
 i2c/rtc_dallas_ds1307/README                  |  37 ++++++++++++++++--
 .../rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr  | Bin 0 -> 710 bytes
 2 files changed, 33 insertions(+), 4 deletions(-)
 create mode 100644 i2c/rtc_dallas_ds1307/rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr

diff --git a/i2c/rtc_dallas_ds1307/README b/i2c/rtc_dallas_ds1307/README
index 43971d0..20edc7e 100644
--- a/i2c/rtc_dallas_ds1307/README
+++ b/i2c/rtc_dallas_ds1307/README
@@ -10,8 +10,8 @@ Details:
  - DS1307 datasheet: http://sparkfun.com/datasheets/Components/DS1307.pdf
 
 
-Logic analyzer setup
---------------------
+A. Logic analyzer setup
+-----------------------
 
 The logic analyzer used was Open Bench Logic Sniffer (at 200kHz):
 
@@ -21,8 +21,8 @@ The logic analyzer used was Open Bench Logic Sniffer (at 200kHz):
  1              SDA
 
 
-Data
-----
+rtc_ds1307_200khz_*.sr
+----------------------
 
 This is what the decoded data should look like:
 
@@ -42,3 +42,32 @@ The sigrok command line used was:
   sigrok-cli --driver=ols:conn=/dev/ttyACM0 -d samplerate=200khz \
              --samples=24576 -p 0=SCL,1=SDA --triggers SDA=0 -o <filename>
 
+
+B. Logic analyzer setup
+-----------------------
+
+The logic analyzer used is a Saleae Logic clone (at 500kHz):
+
+ Probe          DS1307 pin
+ -------------------------
+ D0 (CH1)       SCL
+ D1 (CH2)       SDA
+
+The sigrok 0.7.1 command line used:
+
+sigrok-cli --driver fx2lafw --channels D0=CLK,D1=DATA \
+           --config samplerate=500khz:captureratio=1 --samples 1000 \
+           --triggers CLK=1,DATA=f --output-file <filename>
+
+
+rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr
+----------------------------------------
+
+The file provides reading of time keeping registers as well as control register
+of the RTC chip, which was setup to 12-hours mode, time with PM flag, and
+square wave frequency 32768 Hz before in order to demonstrate bugfixes
+in the following GitHub pull request for libsigrokdecode
+(merged as b3f6033022006c8f4ee88a70155f3571bee1a2ca):
+
+  https://github.com/sigrokproject/libsigrokdecode/pull/10
+
diff --git a/i2c/rtc_dallas_ds1307/rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr b/i2c/rtc_dallas_ds1307/rtc_ds1307_500khz_sqw32khz_mode12h_pm.sr
new file mode 100644
index 0000000000000000000000000000000000000000..30cbe7b6ce98ff49e9a41ba144fd28b709cfe199
GIT binary patch
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dXe$P$Mwo5J0p6^j&|+W(LII$}0#H(A005A&!{Pt{

literal 0
HcmV?d00001

-- 
2.30.2