From 5e3b071cec5db246e569d49d48468b2f04da854b Mon Sep 17 00:00:00 2001
From: Kevin Redon <kingkevin@cuvoodoo.info>
Date: Wed, 3 May 2017 21:22:42 +0200
Subject: [PATCH] Add an ST M93C66 Microwire EEPROM dump.

---
 microwire/st_m93c66/README       |  55 +++++++++++++++++++++++++++++++
 microwire/st_m93c66/st_m93c66.sr | Bin 0 -> 1057 bytes
 2 files changed, 55 insertions(+)
 create mode 100644 microwire/st_m93c66/README
 create mode 100644 microwire/st_m93c66/st_m93c66.sr

diff --git a/microwire/st_m93c66/README b/microwire/st_m93c66/README
new file mode 100644
index 0000000..fc50cbc
--- /dev/null
+++ b/microwire/st_m93c66/README
@@ -0,0 +1,55 @@
+-------------------------------------------------------------------------------
+STMicroelectronics M93C66 Microwire EEPROM
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the Microwire traffic from a
+STMicroelectronics M93C66 Microwire EEPROM.
+
+Details:
+http://www.st.com/resource/en/datasheet/m93c86-r.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was an MCU123 Saleae Logic clone (at 4MHz):
+
+  Probe       M93C66 pin
+  ----------------------
+  1           S / CS
+  3           C / SK
+  4           D / SI
+  5           Q / SO
+
+M93C66 pin 6 (ORG) was tied high to use the x16 memory organisation (i.e.,
+16-bit words).
+
+PulseView was used to capture the trace with the following parameters:
+
+  - sample rate: 4 MHz
+  - samples: 50 k
+  - trigger: rising channel 1 (CS)
+  - pre-trigger: 5%
+
+
+st_m93c66.sr
+------------
+
+The M93C66 EEPROM has the same following marking:
+
+      C66WP
+  (ST) K431
+
+The communication is initiated by a custom software implementation for a
+STM32F103C8 using the Microwire protocol as master.
+
+The master performs the following actions:
+
+ - Read 16-bits word 0x4242 at 8-bit address 0x0
+ - Read first words (4x 0x4242) starting at address 0x0
+ - Enable write and erase
+ - Erase word at address 0x0 and wait until ready
+ - Erase complete EEPROM and wait until ready
+ - Write word 0x4242 at address 0x0 and wait until ready
+ - Write word 0x4242 on complete EEPROM and wait until ready
+ - Disable write and erase
diff --git a/microwire/st_m93c66/st_m93c66.sr b/microwire/st_m93c66/st_m93c66.sr
new file mode 100644
index 0000000000000000000000000000000000000000..6b961eeffa9e2b9faaff04558fae10bfda8b5cef
GIT binary patch
literal 1057
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zElEsCEJ@Toy^*iUK;YQNzw;L9GiY+1D4N`TOrpK7<zd6-oe`Ru+|2&#1-Hk4`oHg*
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z=Y2tPvzM+tzb5~hxwOFVdpB=3-1vU{9NUpNVQXoD>bx>Dg>SN(HZyL#ek5)VYgNi`
z@oKBdK8}T*q0eOF_iT5_37q=#(u>T6C#PJMFMM-*`e)X^Qx0Um`1n<D@^b?|ZZFX%
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t*mE943j@QpMl~Q4mJiW&p{IR>u3JDRJSPNrv$BDtn1OH+kj`WV@c_Qe#0LNX

literal 0
HcmV?d00001

-- 
2.30.2