From: Gerhard Sittig Date: Sun, 16 Oct 2016 16:25:31 +0000 (+0200) Subject: uart: add dump files to demonstrate number of data bits X-Git-Url: https://sigrok.org/gitweb/?p=sigrok-dumps.git;a=commitdiff_plain;h=75521c9bb73f586c8655cfbad4ed0300b3088353;hp=55aca15dd789daa407244173a0fdb52ed099b164 uart: add dump files to demonstrate number of data bits Create a "counter" directory, and add captures from UART communication with the number of data bits in the range from 5 to 9. Parity/stopbit is identical across all captures, as other dumps already provide those variants. This set is useful to test how decoders cope with various numbers of databits, while the samples cover all possible bit patterns. Signed-off-by: Gerhard Sittig --- diff --git a/uart/counter/README b/uart/counter/README new file mode 100644 index 0000000..cc891bd --- /dev/null +++ b/uart/counter/README @@ -0,0 +1,38 @@ +------------------------------------------------------------------------------- +UART traffic, 5-9 data bits, counter values in data bits +------------------------------------------------------------------------------- + +This is a collection of example UART communication (TX only). The +data bits in the UART frame contain numeric values from a counter. +There are dumps for various numbers of data bits in the UART frames. + + +Logic analyzer setup +-------------------- + +The capture was taken with an ASIX Sigma2 logic analyzer at a sample +rate of 500kHz. The first three channels were enabled: + + Probe UART + ---------------- + 1 UART TX (counter values) + 2 UART RX (always idle) + 3 high for active UART frames + + +Data +---- + +The hardware sending the data is an Atmel ATmega328P. The bitrate is +always 19200, the frame format is 5n1, 6n1, 7n1, 8n1, 9n1 respectively. + +There is a pause between each UART frame (idle TX line for a few hundred +microseconds), such that decoders will immediately "lock in" to the +content, and manual inspection is simplified. + +Capture was arranged such that at least one full counter period is +covered and all possible data bit patterns are seen. + +The ATmega firmware asserts a GPIO line when a UART frame is being +sent. This is not essential for UART communication, but again is useful +for human inspection, and verification of protocol decoders. diff --git a/uart/counter/uart_count_19200_5n1.sr b/uart/counter/uart_count_19200_5n1.sr new file mode 100644 index 0000000..a735b3d Binary files /dev/null and b/uart/counter/uart_count_19200_5n1.sr differ diff --git a/uart/counter/uart_count_19200_6n1.sr b/uart/counter/uart_count_19200_6n1.sr new file mode 100644 index 0000000..b21f17b Binary files /dev/null and b/uart/counter/uart_count_19200_6n1.sr differ diff --git a/uart/counter/uart_count_19200_7n1.sr b/uart/counter/uart_count_19200_7n1.sr new file mode 100644 index 0000000..1f6a234 Binary files /dev/null and b/uart/counter/uart_count_19200_7n1.sr differ diff --git a/uart/counter/uart_count_19200_8n1.sr b/uart/counter/uart_count_19200_8n1.sr new file mode 100644 index 0000000..78c15d1 Binary files /dev/null and b/uart/counter/uart_count_19200_8n1.sr differ diff --git a/uart/counter/uart_count_19200_9n1.sr b/uart/counter/uart_count_19200_9n1.sr new file mode 100644 index 0000000..9d8ce44 Binary files /dev/null and b/uart/counter/uart_count_19200_9n1.sr differ