avr_isp: add dump for ATmega328/P

diff --git a/Makefile b/Makefile
index 349760d1ba50e759f74704f2a583e41532d98117..9820eaa39a7fdf87c59999e977a9c926c0d6c8c2 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -19,7 +19,42 @@
 
 VERSION = "0.1.0"
 
-DESTDIR ?= /usr/local/share/sigrok-dumps
+# TODO Ideally instructions would use autotools, cmake, or some other
+# higher level abstraction instead of DIY shell commands. Which would
+# improve portability and robustness (by picking the most appropriate
+# install tool that is available on the target), and would transparently
+# enable support for --prefix and DESTDIR et al, including out of source
+# builds when desired.
+PREFIX ?= /usr/local
+INSTALL_DIR = $(PREFIX)/share/sigrok-dumps
+
+# Be explicit about which files or subdirectories to install.
+# Update this list when adding a new top level subdirectory to the
+# set of example captures. It's assumed that this event is rare.
+# The list is phrased such that users can specify additional items
+# when they invoke the 'make install' command.
+FILES_DIRS += ac97 am230x arm_trace aud avr_isp avr_pdi
+FILES_DIRS += caliper can cec
+FILES_DIRS += dac dali dcc dcf77 display dmx512 dsi
+FILES_DIRS += flexray fsk
+FILES_DIRS += gpib graycode
+FILES_DIRS += i2c i2s ir
+FILES_DIRS += jtag
+FILES_DIRS += led lens_mounts lpc
+FILES_DIRS += maple_bus mcs48 mdio microwire miller misc morse mouse_sensors
+FILES_DIRS += nfc nonstandard_eeproms
+FILES_DIRS += onewire ook
+FILES_DIRS += pjon ps2 pwm
+FILES_DIRS += qi
+FILES_DIRS += rc rfid
+FILES_DIRS += sae-j1850 sdcard sdq sht7x signature sle44xx spdif spi
+FILES_DIRS += stepper_motor swd swim
+FILES_DIRS += tdm_audio
+FILES_DIRS += uart usb usb_power_delivery
+FILES_DIRS += vfd
+FILES_DIRS += wiegand
+FILES_DIRS += xy2-100
+FILES_DIRS += z80
 
 all:
        @echo "Run 'make dist' to create a tarball."
@@ -34,7 +69,5 @@ dist: ChangeLog
        @rm -f ChangeLog
 
 install:
-       @mkdir -p $(DESTDIR)
-       @cp -r * $(DESTDIR)
-       @rm -f $(DESTDIR)/Makefile
-
+       @mkdir -p $(DESTDIR)$(INSTALL_DIR)
+       @cp -r $(FILES_DIRS) $(DESTDIR)$(INSTALL_DIR)

diff --git a/README b/README
index c71b143766637b13a0109c03c9eddbeec88f1053..724a738163a23317d8ef4524ecbee18cf1baa5ae 100644 (file)
--- a/README
+++ b/README
@@ -16,6 +16,23 @@ Status
 sigrok-dumps is in a usable state and has had official tarball releases.
 
 
+Installing
+----------
+
+Example captures need not get built or compiled, but can get installed.
+
+  $ git clone git://sigrok.org/sigrok-dumps
+  $ cd sigrok-dumps
+  $ make install
+
+Optional PREFIX or DESTDIR specs are supported as well.
+
+  $ make PREFIX=/usr install
+  $ make PREFIX=${HOME} install
+
+  $ make DESTDIR=$( pwd )/rootfs install
+
+
 Contributing dumps
 ------------------
 
@@ -38,7 +55,7 @@ Mailing list
 IRC
 ---
 
-You can find the sigrok developers in the #sigrok IRC channel on Freenode.
+You can find the sigrok developers in the #sigrok IRC channel on Libera.Chat.
 
 
 Website

diff --git a/ac97/analog_devices_ad1981a/README b/ac97/analog_devices_ad1981a/README
new file mode 100644 (file)
index 0000000..02e105e
--- /dev/null
+++ b/ac97/analog_devices_ad1981a/README
@@ -0,0 +1,39 @@
+-------------------------------------------------------------------------------
+Analog Devices AD1981A: AC'97 data
+-------------------------------------------------------------------------------
+
+This is set of example captures of the AC'97 data on an Analog Devices
+AD1981A AC'97 2.2 audio codec.
+
+Details:
+https://en.wikipedia.org/wiki/AC%2797
+https://www.analog.com/en/products/ad1981a.html
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic16 (at 50/100 MHz):
+
+  Probe       AD1981A
+  -------------------
+  0           BIT_CLK
+  1           SDATA_IN
+  2           SYNC
+  3           RESET# (only in the 50MHz captures)
+
+SDATA_OUT never toggled, so it was omitted.
+
+
+ac97_ad1981a_powerup1*.sr
+-------------------------
+
+The data is the first chunk of traffic that occurs on an random mainboard
+(which contains the AD1981A) during BIOS power-up.
+
+
+ac97_ad1981a_powerup2*.sr
+-------------------------
+
+Same as above, but this is a snippet of the second chunk of data that occurs
+a few seconds after the first chunk.

diff --git a/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1.sr b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1.sr
new file mode 100644 (file)
index 0000000..3ce0db0
Binary files /dev/null and b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1.sr differ

diff --git a/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1_100mhz.sr b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1_100mhz.sr
new file mode 100644 (file)
index 0000000..f2cc670
Binary files /dev/null and b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup1_100mhz.sr differ

diff --git a/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2.sr b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2.sr
new file mode 100644 (file)
index 0000000..6f30767
Binary files /dev/null and b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2.sr differ

diff --git a/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2_100mhz.sr b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2_100mhz.sr
new file mode 100644 (file)
index 0000000..366b341
Binary files /dev/null and b/ac97/analog_devices_ad1981a/ac97_ad1981a_powerup2_100mhz.sr differ

diff --git a/avr_isp/atmega328p/README.txt b/avr_isp/atmega328p/README.txt
new file mode 100644 (file)
index 0000000..8c9c366
--- /dev/null
+++ b/avr_isp/atmega328p/README.txt
@@ -0,0 +1,32 @@
+-------------------------------------------------------------------------------
+AVR ISP / Atmel ATmega328/P
+-------------------------------------------------------------------------------
+
+This is an example capture of the AVR in-system programming (ISP) protocol.
+
+The device used for ISP was a Bus Pirate v3.5 with firmware v6.1.
+
+The target was an Arduino UNO board with an Atmel ATmega328/P chip.
+
+The PC software used for controlling the programmer was avrdude 7.1.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic Clone (at 4MHz):
+
+  Probe       AVR ISP header
+  -------------------------
+  1           MOSI
+  2           MISO
+  3           SCK
+  4           RST
+
+
+Data
+----
+
+The following avrdude commands were captured:
+
+    avrdude -p atmega328p -c buspirate -P /dev/ttyUSB0 -v

diff --git a/avr_isp/atmega328p/isp_atmega328p_buspirate_scan.sr b/avr_isp/atmega328p/isp_atmega328p_buspirate_scan.sr
new file mode 100644 (file)
index 0000000..5b611d2
Binary files /dev/null and b/avr_isp/atmega328p/isp_atmega328p_buspirate_scan.sr differ

diff --git a/avr_isp/atmega8L/README.txt b/avr_isp/atmega8L/README.txt
new file mode 100644 (file)
index 0000000..af48863
--- /dev/null
+++ b/avr_isp/atmega8L/README.txt
@@ -0,0 +1,22 @@
+-------------------------------------------------------------------------------
+AVR ISP / Atmel ATmega8L
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the AVR in-system programming (ISP)
+protocol. The target was a board with an Atmel ATmega8L chip, and another
+microcontroller was used as master for the ISP process.
+
+Details:
+http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2486-8-bit-AVR-microcontroller-ATmega8_L_datasheet.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic (at 4MHz):
+
+  Probe       AVR ISP header
+  -------------------------
+  5 (green)   MOSI
+  6 (blue)    CLK
+  7 (violet)  MOSI

diff --git a/avr_isp/atmega8L/isp_atmega8L_load_program_page.sr b/avr_isp/atmega8L/isp_atmega8L_load_program_page.sr
new file mode 100644 (file)
index 0000000..b30a127
Binary files /dev/null and b/avr_isp/atmega8L/isp_atmega8L_load_program_page.sr differ

diff --git a/avr_isp/atmega8L/isp_atmega8L_read_eeprom.sr b/avr_isp/atmega8L/isp_atmega8L_read_eeprom.sr
new file mode 100644 (file)
index 0000000..f1d3fa8
Binary files /dev/null and b/avr_isp/atmega8L/isp_atmega8L_read_eeprom.sr differ

diff --git a/avr_isp/atmega8L/isp_atmega8L_read_lock.sr b/avr_isp/atmega8L/isp_atmega8L_read_lock.sr
new file mode 100644 (file)
index 0000000..4600014
Binary files /dev/null and b/avr_isp/atmega8L/isp_atmega8L_read_lock.sr differ

diff --git a/avr_isp/atmega8L/isp_atmega8L_read_program.sr b/avr_isp/atmega8L/isp_atmega8L_read_program.sr
new file mode 100644 (file)
index 0000000..5042714
Binary files /dev/null and b/avr_isp/atmega8L/isp_atmega8L_read_program.sr differ

diff --git a/avr_isp/atmega8L/isp_atmega8L_write_program_page.sr b/avr_isp/atmega8L/isp_atmega8L_write_program_page.sr
new file mode 100644 (file)
index 0000000..9d2a8d6
Binary files /dev/null and b/avr_isp/atmega8L/isp_atmega8L_write_program_page.sr differ

diff --git a/caliper/caliper-123.45mm.sr b/caliper/caliper-123.45mm.sr
new file mode 100644 (file)
index 0000000..f05298f
Binary files /dev/null and b/caliper/caliper-123.45mm.sr differ

diff --git a/caliper/caliper-1mm.sr b/caliper/caliper-1mm.sr
new file mode 100644 (file)
index 0000000..720b650
Binary files /dev/null and b/caliper/caliper-1mm.sr differ

diff --git a/caliper/caliper0.0005in.sr b/caliper/caliper0.0005in.sr
new file mode 100644 (file)
index 0000000..a3ec0a0
Binary files /dev/null and b/caliper/caliper0.0005in.sr differ

diff --git a/caliper/caliper0.5555in.sr b/caliper/caliper0.5555in.sr
new file mode 100644 (file)
index 0000000..a9b4848
Binary files /dev/null and b/caliper/caliper0.5555in.sr differ

diff --git a/caliper/caliper0.55mm.sr b/caliper/caliper0.55mm.sr
new file mode 100644 (file)
index 0000000..47db862
Binary files /dev/null and b/caliper/caliper0.55mm.sr differ

diff --git a/caliper/caliper0.5in.sr b/caliper/caliper0.5in.sr
new file mode 100644 (file)
index 0000000..e56af68
Binary files /dev/null and b/caliper/caliper0.5in.sr differ

diff --git a/caliper/caliper0.5mm.sr b/caliper/caliper0.5mm.sr
new file mode 100644 (file)
index 0000000..e42a792
Binary files /dev/null and b/caliper/caliper0.5mm.sr differ

diff --git a/caliper/caliper0in.sr b/caliper/caliper0in.sr
new file mode 100644 (file)
index 0000000..d558e45
Binary files /dev/null and b/caliper/caliper0in.sr differ

diff --git a/caliper/caliper0mm.sr b/caliper/caliper0mm.sr
new file mode 100644 (file)
index 0000000..d37ac3d
Binary files /dev/null and b/caliper/caliper0mm.sr differ

diff --git a/caliper/caliper100mm.sr b/caliper/caliper100mm.sr
new file mode 100644 (file)
index 0000000..6d149c6
Binary files /dev/null and b/caliper/caliper100mm.sr differ

diff --git a/caliper/caliper10mm.sr b/caliper/caliper10mm.sr
new file mode 100644 (file)
index 0000000..5e346f7
Binary files /dev/null and b/caliper/caliper10mm.sr differ

diff --git a/caliper/caliper123.45mm.sr b/caliper/caliper123.45mm.sr
new file mode 100644 (file)
index 0000000..ad927e6
Binary files /dev/null and b/caliper/caliper123.45mm.sr differ

diff --git a/caliper/caliper55.55mm.sr b/caliper/caliper55.55mm.sr
new file mode 100644 (file)
index 0000000..a4f5c2b
Binary files /dev/null and b/caliper/caliper55.55mm.sr differ

diff --git a/caliper/caliper5in.sr b/caliper/caliper5in.sr
new file mode 100644 (file)
index 0000000..04d4dcc
Binary files /dev/null and b/caliper/caliper5in.sr differ

diff --git a/can/can_fd/arbitrary_traffic/can_fd_without_brs_8.sr b/can/can_fd/arbitrary_traffic/can_fd_without_brs_8.sr
deleted file mode 100644 (file)
index ab98528..0000000
Binary files a/can/can_fd/arbitrary_traffic/can_fd_without_brs_8.sr and /dev/null differ

diff --git a/dac/ad5626/README b/dac/ad5626/README
new file mode 100644 (file)
index 0000000..32d18da
--- /dev/null
+++ b/dac/ad5626/README
@@ -0,0 +1,34 @@
+-------------------------------------------------------------------------------
+Analog Devices AD5626
+-------------------------------------------------------------------------------
+
+This is a set of example captures of an Analog Devices AD5626 12-bit nanoDAC.
+
+Details:
+https://www.analog.com/media/en/technical-documentation/data-sheets/AD5626.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was ADALM2000 (at 5MHz):
+
+  Probe       AD5626
+  ------------------
+  0           SCLK
+  1           SDIN
+  2           CS#
+
+
+Probing
+-------
+
+The sigrok command line used was:
+
+  sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -C 0-2 -o <file>
+
+
+ad5626_write_dac.sr
+-------------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=5000000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -o ad5626_write_dac.sr -C 0-2

diff --git a/dac/ad5626/ad5626_write_dac.sr b/dac/ad5626/ad5626_write_dac.sr
new file mode 100644 (file)
index 0000000..dd8a8b5
Binary files /dev/null and b/dac/ad5626/ad5626_write_dac.sr differ

diff --git a/dcc/easycontrol/README b/dcc/easycontrol/README
new file mode 100644 (file)
index 0000000..72699c3
--- /dev/null
+++ b/dcc/easycontrol/README
@@ -0,0 +1,34 @@
+-------------------------------------------------------------------------------
+DCC model train captures
+-------------------------------------------------------------------------------
+
+These captures contain data that was recorded on a model railway setup that
+is based on the tams elektronik EasyControl controller. The booster used was
+a self-built tams elektronik B-2 booster.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic clone (samplerate 1MHz). The
+signal was captured via a simple voltage clamping circuit.
+
+  Probe       DCC
+  -------------------
+  1           Data
+
+
+Captures
+--------
+
+Since the controller continuously resends the data, the captures do
+contain more than what is stated here.
+
+  Capture                      Action
+  ----------------------------------------------------------------------
+  decoder_2_light.sr           switch light on train with address 2
+  decoder_45_light.sr          switch light on train with address 45
+  decoder_120_121.sr           switch state of decoder 120, 121
+  decoder_133.sr               switch state of decoder 133
+  decoder_140.sr               switch state of decoder 140
+  decoder_310.sr               switch state of decoder 310

diff --git a/dcc/easycontrol/decoder_120_121.sr b/dcc/easycontrol/decoder_120_121.sr
new file mode 100644 (file)
index 0000000..ad3242e
Binary files /dev/null and b/dcc/easycontrol/decoder_120_121.sr differ

diff --git a/dcc/easycontrol/decoder_133.sr b/dcc/easycontrol/decoder_133.sr
new file mode 100644 (file)
index 0000000..9b0a9f8
Binary files /dev/null and b/dcc/easycontrol/decoder_133.sr differ

diff --git a/dcc/easycontrol/decoder_140.sr b/dcc/easycontrol/decoder_140.sr
new file mode 100644 (file)
index 0000000..651b80d
Binary files /dev/null and b/dcc/easycontrol/decoder_140.sr differ

diff --git a/dcc/easycontrol/decoder_2_light.sr b/dcc/easycontrol/decoder_2_light.sr
new file mode 100644 (file)
index 0000000..70a02ab
Binary files /dev/null and b/dcc/easycontrol/decoder_2_light.sr differ

diff --git a/dcc/easycontrol/decoder_310.sr b/dcc/easycontrol/decoder_310.sr
new file mode 100644 (file)
index 0000000..d304efa
Binary files /dev/null and b/dcc/easycontrol/decoder_310.sr differ

diff --git a/dcc/easycontrol/decoder_45_light.sr b/dcc/easycontrol/decoder_45_light.sr
new file mode 100644 (file)
index 0000000..fb0605b
Binary files /dev/null and b/dcc/easycontrol/decoder_45_light.sr differ

diff --git a/display/hd44780/README b/display/hd44780/README
index 9dc2e293d0ded3873a2c1d690cf693043281e116..611228568f460faabb3e5ad9c93937ead4d7f37b 100644 (file)
--- a/display/hd44780/README
+++ b/display/hd44780/README
@@ -11,8 +11,8 @@ means that data gets communicated on lined D4-D7 only, and D0-D3 are
 not connected.
 
 
-Logic analyzer setup
---------------------
+Logic analyzer setup (hd44780-reset-init-hello.sr)
+--------------------------------------------------
 
 The capture was taken with an ASIX Sigma2 logic analyzer, sampling 8
 logic channels at a rate of 50MHz:
@@ -29,8 +29,8 @@ logic channels at a rate of 50MHz:
   8           D7
 
 
-Data
-----
+hd44780-reset-init-hello.sr
+---------------------------
 
 See https://en.wikipedia.org/wiki/Hitachi_HD44780_LCD_controller for a
 list of display controller commands, and especially the 'Mode Selection'
@@ -49,3 +49,122 @@ can extract the most basic information: Clock on E (falling edge), D4-D7
 of the display corresponds to D0-D3 of the decoder (D4-D7 of the decoder
 are not connected). Words consist of 8 bits (span 2 bus cycles), and are
 in big endian format.
+
+
+Logic analyzer setup (other files)
+----------------------------------
+
+The capture was taken with a Saleae Logic clone (mostly at 200kHz):
+
+  Probe       HD44780
+  -------------------
+  0           RS (selects "commands" and "display data" mode)
+  1           E (enable, falling edge clocks data transfers)
+  2           D4 (data lines...)
+  3           D5
+  4           D6
+  5           D7
+
+
+hd44780-blink.sr
+----------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "hello, world!"
+ - toggle blinking every 3 seconds
+
+
+hd44780-cursor.sr
+-----------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "hello, world!"
+ - toggle cursor every 0.5 seconds
+
+
+hd44780-customcharacter.sr
+--------------------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - define special characters: heart, smiling face, unhappy face, stickman
+   with arms low, stickman with arms up
+ - write "I {heart} Arduino {smiling face}" and "    {stickman with arms low}"
+ - toggle second line between "    {stickman with arms low}" and
+   "    {stickman with arms up}" about (!) every 0.9 seconds
+
+
+hd44780-font.sr
+---------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - define special characters: heart, smiling face, unhappy face, stickman
+   with arms low, stickman with arms up
+ - every about 250ms a set of 2 * 16 characters are written to the display,
+   starting at 0
+
+
+hd44780-power.sr
+----------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "hello, world!"
+ - toggle display power every 0.5 seconds
+
+
+hd44780-shift.sr
+----------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "hello, world!"
+ - repeats:
+   - shift text to the left until it is outside the view
+   - shift text to the right until it is outside the view
+   - shift text to the left until it is where it was before shifting
+
+
+hd44780-shiftcursor_204.sr
+--------------------------
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "hello, world!"
+ - using cursor shifts it replaces the ! by ?, w by W and h by H, so it is
+   "Hello, World?" in the end
+
+
+hd44780-textdirection.sr
+------------------------
+
+Arduino firmware based on the LiquidCrystal example Arduino Sketch.
+
+This is what the decoded data should look like:
+
+ - initialization
+ - write "abcdefghijklm"
+ - continue to the left until "s"
+ - continue to the right until "z"

diff --git a/display/hd44780/hd44780-blink.sr b/display/hd44780/hd44780-blink.sr
new file mode 100644 (file)
index 0000000..403966c
Binary files /dev/null and b/display/hd44780/hd44780-blink.sr differ

diff --git a/display/hd44780/hd44780-cursor.sr b/display/hd44780/hd44780-cursor.sr
new file mode 100644 (file)
index 0000000..2e5b1f8
Binary files /dev/null and b/display/hd44780/hd44780-cursor.sr differ

diff --git a/display/hd44780/hd44780-customcharacter.sr b/display/hd44780/hd44780-customcharacter.sr
new file mode 100644 (file)
index 0000000..7ca62a8
Binary files /dev/null and b/display/hd44780/hd44780-customcharacter.sr differ

diff --git a/display/hd44780/hd44780-font.sr b/display/hd44780/hd44780-font.sr
new file mode 100644 (file)
index 0000000..e0d4dc2
Binary files /dev/null and b/display/hd44780/hd44780-font.sr differ

diff --git a/display/hd44780/hd44780-power.sr b/display/hd44780/hd44780-power.sr
new file mode 100644 (file)
index 0000000..6935ea5
Binary files /dev/null and b/display/hd44780/hd44780-power.sr differ

diff --git a/display/hd44780/hd44780-scroll.sr b/display/hd44780/hd44780-scroll.sr
new file mode 100644 (file)
index 0000000..c56965b
Binary files /dev/null and b/display/hd44780/hd44780-scroll.sr differ

diff --git a/display/hd44780/hd44780-shiftcursor.sr b/display/hd44780/hd44780-shiftcursor.sr
new file mode 100644 (file)
index 0000000..cf41c0a
Binary files /dev/null and b/display/hd44780/hd44780-shiftcursor.sr differ

diff --git a/display/hd44780/hd44780-test_204.sr b/display/hd44780/hd44780-test_204.sr
new file mode 100644 (file)
index 0000000..2035ccc
Binary files /dev/null and b/display/hd44780/hd44780-test_204.sr differ

diff --git a/display/hd44780/hd44780-textdirection.sr b/display/hd44780/hd44780-textdirection.sr
new file mode 100644 (file)
index 0000000..1ad5be5
Binary files /dev/null and b/display/hd44780/hd44780-textdirection.sr differ

diff --git a/display/seven_segment/README b/display/seven_segment/README
new file mode 100644 (file)
index 0000000..434ce89
--- /dev/null
+++ b/display/seven_segment/README
@@ -0,0 +1,56 @@
+-------------------------------------------------------------------------------
+Generic 7-segment display
+-------------------------------------------------------------------------------
+
+These are files containing data to test the function of the seven_segment
+protocol decoder.
+
+
+Logic analyzer setup
+--------------------
+
+Two files were generated without logic analyzer.
+
+For the last file a Saleae Logic clone was used (at 20kHz).
+
+  Probe          Display pin
+  --------------------------
+  0              A
+  1              B
+  2              C
+  3              D
+  4              E
+  5              F
+  6              G
+  7              DP
+
+
+test_7_segment_0-9.sr
+---------------------
+
+Cycles through the numbers 0 to 9.
+
+
+test_7_segment_0-f.sr
+---------------------
+
+Cycles through the numbers 0 to F.
+
+
+test_7_segment_slow.sr
+----------------------
+
+Cycles through the numbers 0 to F with alternating dot.
+
+
+test_7_segment_all_alphabet.sr
+------------------------------
+
+Covers more combinations of LED segments, including alphanumeric codes
+(letters, punctuation).
+
+
+mystery_message.sr
+------------------
+
+Contains LED segment combinations that are not known to the decoder.

diff --git a/display/seven_segment/mystery_message.sr b/display/seven_segment/mystery_message.sr
new file mode 100644 (file)
index 0000000..60eb84a
Binary files /dev/null and b/display/seven_segment/mystery_message.sr differ

diff --git a/display/seven_segment/test_7_segment_0-9.sr b/display/seven_segment/test_7_segment_0-9.sr
new file mode 100644 (file)
index 0000000..977bf80
Binary files /dev/null and b/display/seven_segment/test_7_segment_0-9.sr differ

diff --git a/display/seven_segment/test_7_segment_0-F.sr b/display/seven_segment/test_7_segment_0-F.sr
new file mode 100644 (file)
index 0000000..7cf0302
Binary files /dev/null and b/display/seven_segment/test_7_segment_0-F.sr differ

diff --git a/display/seven_segment/test_7_segment_all_alphabet.sr b/display/seven_segment/test_7_segment_all_alphabet.sr
new file mode 100644 (file)
index 0000000..b644933
Binary files /dev/null and b/display/seven_segment/test_7_segment_all_alphabet.sr differ

diff --git a/display/seven_segment/test_7_segment_slow.sr b/display/seven_segment/test_7_segment_slow.sr
new file mode 100644 (file)
index 0000000..2b9e7c6
Binary files /dev/null and b/display/seven_segment/test_7_segment_slow.sr differ

diff --git a/display/st7735/README b/display/st7735/README
index 0c761110e6c725e6c5f5f01bbfdb56979d5202f7..44755a243ccbd9b7b5cbec5e2e1297acb2b7ca79 100644 (file)
--- a/display/st7735/README
+++ b/display/st7735/README
@@ -37,3 +37,28 @@ Long pauses are caused be sleeps for a few hundreds of milliseconds, which are
 required by the spec. Other oddities like frequent changes of CS are caused by
 specific library implementation.
 
+
+Dump with unknown command
+-------------------------
+
+Taken with the same setup as above on a 128x160 display with Arduino TFT library
+and the following code:
+
+  #include <TFT.h>
+  #include <SPI.h>
+
+  #define cs   10
+  #define dc   9   // A0
+  #define rst  8
+
+  TFT TFTscreen = TFT(cs, dc, rst);
+
+  void setup()
+  {
+    TFTscreen.begin();
+    TFTscreen.background(0, 255, 0);
+  }
+
+  void loop()
+  {
+  }

diff --git a/display/st7735/st7735_unknown_command.sr b/display/st7735/st7735_unknown_command.sr
new file mode 100644 (file)
index 0000000..33f3d5e
Binary files /dev/null and b/display/st7735/st7735_unknown_command.sr differ

diff --git a/display/st7735/st7735_unknown_command_snippet.sr b/display/st7735/st7735_unknown_command_snippet.sr
new file mode 100644 (file)
index 0000000..24d8052
Binary files /dev/null and b/display/st7735/st7735_unknown_command_snippet.sr differ

diff --git a/dmx512/dmx4all_mini_usb_dmx/README b/dmx512/dmx4all_mini_usb_dmx/README
index a37205fb0ea6f2e36eeb8972b2da0294ab91eba1..0021b671fb132c7e11241c578716e61f38c372d3 100644 (file)
--- a/dmx512/dmx4all_mini_usb_dmx/README
+++ b/dmx512/dmx4all_mini_usb_dmx/README
@@ -1,9 +1,9 @@
 -------------------------------------------------------------------------------
-DMX512-A
+DMX512-A / DMX4ALL Mini-USB-DMX-Interface
 -------------------------------------------------------------------------------
 
-This is a set of example captures of DMX512 packets from a USB
-interface (DMX4ALL Mini interface), driven by a lighting control
+This is a set of example captures of DMX512 packets from a
+DMX4ALL Mini-USB-DMX-Interface, driven by a lighting control
 software loaded with 10 basic dimmer fixtures located at DMX addresses
 1, 2, 101, 102, 201, 202, 301, 302, 401 and 402.
 
@@ -11,9 +11,11 @@ The signal was grabbed directly at the interface without any actual
 fixtures attached to the bus.
 
 Details:
-http://www.dmx512-online.com/packt.html
-http://www.erwinrol.com/dmx512/
+https://en.wikipedia.org/wiki/DMX512
+http://www.dmx512-online.com/dmx512_packet.html
+https://www.erwinrol.com/page/articles/dmx512/
 https://wiki.openlighting.org/index.php/DMX512-A
+https://www.dmx4all.de/produkt-archiv/
 
 
 Logic analyzer setup

diff --git a/dmx512/ma_lighting/README b/dmx512/ma_lighting/README
new file mode 100644 (file)
index 0000000..484af6f
--- /dev/null
+++ b/dmx512/ma_lighting/README
@@ -0,0 +1,27 @@
+-------------------------------------------------------------------------------
+DMX512-A / MA Lighting dot2
+-------------------------------------------------------------------------------
+
+This is a set of example captures of DMX512 packets from an MA Lighting
+dot2 lightining desk.
+
+The signal was grabbed directly at the interface without any actual
+fixtures attached to the bus.
+
+Details:
+https://en.wikipedia.org/wiki/DMX512
+https://www.malighting.com/dot2/
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic clone (at 1MHz):
+
+  Probe       3-pin XLR DMX connector
+  -----------------------------------
+  0           DMX+ (3)
+  1           DMX- (2)
+
+The files are named <interfacename>_<dmxvalue>.sr, with <dmxvalue> being
+the dimmerlevel of the first 255 channels. Any other channel will be at 0.

diff --git a/dmx512/ma_lighting/dot2_0-255.sr b/dmx512/ma_lighting/dot2_0-255.sr
new file mode 100644 (file)
index 0000000..45c09b9
Binary files /dev/null and b/dmx512/ma_lighting/dot2_0-255.sr differ

diff --git a/dmx512/ma_lighting/dot2_0.sr b/dmx512/ma_lighting/dot2_0.sr
new file mode 100644 (file)
index 0000000..b5a98db
Binary files /dev/null and b/dmx512/ma_lighting/dot2_0.sr differ

diff --git a/dmx512/nicolaudie/README b/dmx512/nicolaudie/README
new file mode 100644 (file)
index 0000000..ed10f3d
--- /dev/null
+++ b/dmx512/nicolaudie/README
@@ -0,0 +1,28 @@
+-------------------------------------------------------------------------------
+DMX512-A / Nicolaudie/Sunlite Suite 2 BC
+-------------------------------------------------------------------------------
+
+This is a set of example captures of DMX512 packets from a
+Nicolaudie/Sunlite Suite 2 BC (Basic Class) USB interface.
+
+The signal was grabbed directly at the interface without any actual
+fixtures attached to the bus.
+
+Details:
+https://en.wikipedia.org/wiki/DMX512
+https://www.nicolaudie.com/
+https://www.sunlitepro.com/en/hardware.htm
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic clone (at 1MHz):
+
+  Probe       3-pin XLR DMX connector
+  -----------------------------------
+  0           DMX+ (3)
+  1           DMX- (2)
+
+The files are named <interfacename>_<dmxvalue>.sr, with <dmxvalue> being
+the dimmerlevel of the first 255 channels. Any other channel will be at 0.

diff --git a/dmx512/nicolaudie/sunlitesuite2bc_0-255.sr b/dmx512/nicolaudie/sunlitesuite2bc_0-255.sr
new file mode 100644 (file)
index 0000000..7daa5b2
Binary files /dev/null and b/dmx512/nicolaudie/sunlitesuite2bc_0-255.sr differ

diff --git a/dmx512/nicolaudie/sunlitesuite2bc_0.sr b/dmx512/nicolaudie/sunlitesuite2bc_0.sr
new file mode 100644 (file)
index 0000000..ec097c1
Binary files /dev/null and b/dmx512/nicolaudie/sunlitesuite2bc_0.sr differ

diff --git a/dmx512/sgm/README b/dmx512/sgm/README
new file mode 100644 (file)
index 0000000..a869e81
--- /dev/null
+++ b/dmx512/sgm/README
@@ -0,0 +1,27 @@
+-------------------------------------------------------------------------------
+DMX512-A / SGM Regia 256
+-------------------------------------------------------------------------------
+
+This is a set of example captures of DMX512 packets from an SGM Regia 256
+lightining desk.
+
+The signal was grabbed directly at the interface without any actual
+fixtures attached to the bus.
+
+Details:
+https://en.wikipedia.org/wiki/DMX512
+https://sgmlight.com/products
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic clone (at 1MHz):
+
+  Probe       3-pin XLR DMX connector
+  -----------------------------------
+  0           DMX+ (3)
+  1           DMX- (2)
+  
+The files are named <interfacename>_<dmxvalue>.sr, with <dmxvalue> being
+the dimmerlevel of the first 255 channels. Any other channel will be at 0.

diff --git a/dmx512/sgm/regia_0.sr b/dmx512/sgm/regia_0.sr
new file mode 100644 (file)
index 0000000..2447f4f
Binary files /dev/null and b/dmx512/sgm/regia_0.sr differ

diff --git a/dmx512/u_dmx/README b/dmx512/u_dmx/README
new file mode 100644 (file)
index 0000000..10260f2
--- /dev/null
+++ b/dmx512/u_dmx/README
@@ -0,0 +1,27 @@
+-------------------------------------------------------------------------------
+DMX512-A / anyma µDMX
+-------------------------------------------------------------------------------
+
+This is a set of example captures of DMX512 packets from an anyma uDMX
+USB interface.
+
+The signal was grabbed directly at the interface without any actual
+fixtures attached to the bus.
+
+Details:
+https://en.wikipedia.org/wiki/DMX512
+https://www.anyma.ch/research/udmx/
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic clone (at 1MHz):
+
+  Probe       3-pin XLR DMX connector
+  -----------------------------------
+  0           DMX+ (3)
+  1           DMX- (2)
+  
+The files are named <interfacename>_<dmxvalue>.sr, with <dmxvalue> being
+the dimmerlevel of the first 255 channels. Any other channel will be at 0.

diff --git a/dmx512/u_dmx/u-dmx_0-255.sr b/dmx512/u_dmx/u-dmx_0-255.sr
new file mode 100644 (file)
index 0000000..d10f976
Binary files /dev/null and b/dmx512/u_dmx/u-dmx_0-255.sr differ

diff --git a/dmx512/u_dmx/u-dmx_0.sr b/dmx512/u_dmx/u-dmx_0.sr
new file mode 100644 (file)
index 0000000..20f8b57
Binary files /dev/null and b/dmx512/u_dmx/u-dmx_0.sr differ

diff --git a/gpib/hp1631d/README b/gpib/hp1631d/README
index bebc979cc829dc9712e976a608497e0e50d5c739..9adda050c1c246233464fff503031a185af054c4 100644 (file)
--- a/gpib/hp1631d/README
+++ b/gpib/hp1631d/README
@@ -1,5 +1,5 @@
 -------------------------------------------------------------------------------
-GPIB
+GPIB / HP 1631D
 -------------------------------------------------------------------------------
 
 This is an example capture of some GPIB traffic on an HP 1631D LA/scope.

diff --git a/gpib/hp33120a/README b/gpib/hp33120a/README
new file mode 100644 (file)
index 0000000..08f7df9
--- /dev/null
+++ b/gpib/hp33120a/README
@@ -0,0 +1,38 @@
+-------------------------------------------------------------------------------
+GPIB / HP 33120A
+-------------------------------------------------------------------------------
+
+This is an example capture of a *idn query to an HP33120A AWG using an
+AR488 (Arduino bitbang GPIB adapter).
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a generic FX2 board (at 500kHz):
+
+
+  Probe       GPIB
+  ----------------
+  0           DIO1
+  1           DIO2
+  2           DIO3
+  3           DIO4
+  4           DIO5
+  5           DIO6
+  6           DIO7
+  7           DIO8
+  8           EOI
+  9           DAV
+  10          NRFD
+  11          NDAC
+  12          IFC
+  13          SRQ
+  14          ATN
+  15          REN
+
+
+Data
+----
+
+Send *idn? and receive instrument ident string.

diff --git a/gpib/hp33120a/hp33120a-idn.sr b/gpib/hp33120a/hp33120a-idn.sr
new file mode 100644 (file)
index 0000000..f9b2d8f
Binary files /dev/null and b/gpib/hp33120a/hp33120a-idn.sr differ

diff --git a/gpib/hp53131a/README b/gpib/hp53131a/README
new file mode 100644 (file)
index 0000000..fc5c2b8
--- /dev/null
+++ b/gpib/hp53131a/README
@@ -0,0 +1,54 @@
+-------------------------------------------------------------------------------
+GPIB / HP 53131A
+-------------------------------------------------------------------------------
+
+This is a set of captures of traffic with an HP53131A counter using an
+AR488 (Arduino bitbang GPIB adapter).
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a generic FX2 board (at 500kHz):
+
+  Probe       GPIB
+  ----------------
+  0           DIO1
+  1           DIO2
+  2           DIO3
+  3           DIO4
+  4           DIO5
+  5           DIO6
+  6           DIO7
+  7           DIO8
+  8           EOI
+  9           DAV
+  10          NRFD
+  11          NDAC
+  12          IFC
+  13          SRQ
+  14          ATN
+  15          REN
+
+
+hp53131a-idn-read.sr
+--------------------
+
+Send *idn? and receive instrument ident string.
+Send 'read?', wait for acquisition and receive a measurement (10MHz frequency).
+
+
+hp53131a-ton.sr
+---------------
+
+Set HP53131A to period measurement and talk-only mode and AR488 to
+listen-only mode.
+
+This setup is specifically useful for recording long logfiles of timing data
+for use in ADEV measurements by "time-nuts":
+
+  http://www.ke5fx.com/timelab/readme.htm 
+
+Note: the regular NRFD/NDAC handshake occurring before and after the LON
+transfer is related to the AR488 timing out non-existent transfers and may
+be incorrect.

diff --git a/gpib/hp53131a/hp53131a-idn-read.sr b/gpib/hp53131a/hp53131a-idn-read.sr
new file mode 100644 (file)
index 0000000..e0edb3e
Binary files /dev/null and b/gpib/hp53131a/hp53131a-idn-read.sr differ

diff --git a/gpib/hp53131a/hp53131a-ton.sr b/gpib/hp53131a/hp53131a-ton.sr
new file mode 100644 (file)
index 0000000..79bdcde
Binary files /dev/null and b/gpib/hp53131a/hp53131a-ton.sr differ

diff --git a/gpib/keithley2015/README b/gpib/keithley2015/README
new file mode 100644 (file)
index 0000000..99e00a3
--- /dev/null
+++ b/gpib/keithley2015/README
@@ -0,0 +1,37 @@
+-------------------------------------------------------------------------------
+GPIB / Keithley 2015
+-------------------------------------------------------------------------------
+
+This is an example capture of a *idn query to a Keithley 2015 DMM using
+an AR488 (Arduino bitbang GPIB adapter).
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a generic FX2 board (at 500kHz):
+
+  Probe       GPIB
+  ----------------
+  0           DIO1
+  1           DIO2
+  2           DIO3
+  3           DIO4
+  4           DIO5
+  5           DIO6
+  6           DIO7
+  7           DIO8
+  8           EOI
+  9           DAV
+  10          NRFD
+  11          NDAC
+  12          IFC
+  13          SRQ
+  14          ATN
+  15          REN
+
+
+Data
+----
+
+Send *idn? and receive instrument ident string.

diff --git a/gpib/keithley2015/keithley2015-idn.sr b/gpib/keithley2015/keithley2015-idn.sr
new file mode 100644 (file)
index 0000000..bd6c6bf
Binary files /dev/null and b/gpib/keithley2015/keithley2015-idn.sr differ

diff --git a/i2c/hdcp/unknown_device/hdcp.sr b/i2c/hdcp/unknown_device/hdcp.sr
new file mode 100644 (file)
index 0000000..3ffb417
Binary files /dev/null and b/i2c/hdcp/unknown_device/hdcp.sr differ

diff --git a/i2c/ltc2607/README b/i2c/ltc2607/README
new file mode 100644 (file)
index 0000000..73087d6
--- /dev/null
+++ b/i2c/ltc2607/README
@@ -0,0 +1,33 @@
+-------------------------------------------------------------------------------
+Linear Technology Corporation LTC2607
+-------------------------------------------------------------------------------
+
+This is a set of example captures of LTC2607 16-bit rail-to-rail DACs.
+
+Details:
+https://www.analog.com/media/en/technical-documentation/data-sheets/26071727fa.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was ADALM2000 (at 500kHz):
+
+  Probe       LTC2607
+  -------------------
+  0           SCL
+  1           SDA
+
+
+Probing
+-------
+
+The sigrok command line used was:
+
+  sigrok-cli -i - -I binary:numchannels=16:samplerate=500khz -C 0,1 -o <file>
+
+
+ltc2607_write_dac.sr
+--------------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=5000000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=500khz -o ltc2607_write_dac.sr -C 0,1

diff --git a/i2c/ltc2607/ltc2607_write_dac.sr b/i2c/ltc2607/ltc2607_write_dac.sr
new file mode 100644 (file)
index 0000000..46a8422
Binary files /dev/null and b/i2c/ltc2607/ltc2607_write_dac.sr differ

diff --git a/i2c/microchip_mcp23017/README.md b/i2c/microchip_mcp23017/README.md
new file mode 100644 (file)
index 0000000..9543798
--- /dev/null
+++ b/i2c/microchip_mcp23017/README.md
@@ -0,0 +1,53 @@
+-------------------------------------------------------------------------------
+Microchip MCP23017 I/O expander with I2C interface
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the MCP23017 16-bit I/O expander with
+an I2C interface. For details see the MCP23017/MCP23S17 datasheet which is
+titled "16-Bit I/O Expander with Serial Interface":
+
+  http://ww1.microchip.com/downloads/en/DeviceDoc/20001952C.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae clone (samplerate 1MHz). In addition
+to the I2C datalines, 6 output pins are captured too.
+
+The host was a Raspberry Pi using Python to access the I2C port. The bitrate
+decreased after a few 100ms.
+
+  Probe       MCP23017
+  -------------------
+  0           A0
+  1           A1
+  2           A2
+  3           B0 / A3
+  4           B1 / A4
+  5           B2 / A5
+  6           SDA
+  7           SCL
+
+
+mcp23017_counter_a_write.sr
+---------------------------
+
+Count the Registers OLATA ascending. The lowest 6 bits of the Output A Port
+are captured too (A0 - A5).
+
+
+mcp23017_counter_init_ab_write.sr
+---------------------------------
+
+Reset all registers, then count the registers OLATA ascending and OLATB
+descending. Both registers are set using one word write operation. The
+lowest 3 bits of both output ports are captured too (A0 - A2, B0 - B2).
+
+
+mcp23017_counter_init_ab_write_read.sr
+-------------------------------------
+
+Reset all registers, then count the registers OLATA ascending and OLATB
+descending. Both registers are set and read using one word write operations.
+The lowest 3 bits of both output ports are captured too (A0 - A2, B0 - B2).

diff --git a/i2c/microchip_mcp23017/mcp23017_counter_a_write.sr b/i2c/microchip_mcp23017/mcp23017_counter_a_write.sr
new file mode 100644 (file)
index 0000000..9a12416
Binary files /dev/null and b/i2c/microchip_mcp23017/mcp23017_counter_a_write.sr differ

diff --git a/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write.sr b/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write.sr
new file mode 100644 (file)
index 0000000..9b9caf4
Binary files /dev/null and b/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write.sr differ

diff --git a/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write_read.sr b/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write_read.sr
new file mode 100644 (file)
index 0000000..8324e37
Binary files /dev/null and b/i2c/microchip_mcp23017/mcp23017_counter_init_ab_write_read.sr differ

diff --git a/i2c/rtc_dallas_ds3231/README b/i2c/rtc_dallas_ds3231/README
new file mode 100644 (file)
index 0000000..12c783e
--- /dev/null
+++ b/i2c/rtc_dallas_ds3231/README
@@ -0,0 +1,48 @@
+-------------------------------------------------------------------------------
+Maxim Integrated DS3231 RTC
+-------------------------------------------------------------------------------
+
+Details:
+ - DS3231 datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was Geeetech Mini Board Cypress FX2(LP) eval board
+with fx2lafw firmware (at 4MHz):
+
+ Probe          DS3231 pin
+ -------------------------
+ 0              SCL
+ 1              SDA
+
+
+ds3231_ex1.sr
+----------------------
+
+The file provides reading/writing of time keeping registers as well as
+control, control/status and temperature registers of the RTC chip, which
+was setup to 24-hours mode:
+
+- Read Control register
+- Write Control register - disable alarms
+- Read Control/Status register
+- Write Control/Status register - clear alarm's flags
+- Write Alarm 1 registers - set Alarm 1 at every 1st date
+- Write Alarm 2 registers - set Alarm 2 at every minute
+- Read date/time
+- Read temperature (MSB)
+
+
+ds3231_ex2.sr
+----------------------
+
+The file provides reading/writing of time keeping registers as well as
+control/status and temperature registers of the RTC chip, which was setup
+to 24-hours mode and after Alarm 2 occured:
+
+- Read Control/Status register
+- Write Control/Status register - clear alarm flag
+- Read date/time
+- Read temperature (MSB)

diff --git a/i2c/rtc_dallas_ds3231/ds3231_ex1.sr b/i2c/rtc_dallas_ds3231/ds3231_ex1.sr
new file mode 100644 (file)
index 0000000..4c21d1b
Binary files /dev/null and b/i2c/rtc_dallas_ds3231/ds3231_ex1.sr differ

diff --git a/i2c/rtc_dallas_ds3231/ds3231_ex2.sr b/i2c/rtc_dallas_ds3231/ds3231_ex2.sr
new file mode 100644 (file)
index 0000000..4bcd8db
Binary files /dev/null and b/i2c/rtc_dallas_ds3231/ds3231_ex2.sr differ

diff --git a/ir/nec/extended/README b/ir/nec/extended/README
new file mode 100644 (file)
index 0000000..3ea43c3
--- /dev/null
+++ b/ir/nec/extended/README
@@ -0,0 +1,16 @@
+------------------------------------------------------------------------
+Extended NEC infrared protocol
+------------------------------------------------------------------------
+
+See https://www.sbprojects.net/knowledge/ir/nec.php for a description of the
+NEC protocol including the extended protocol.
+
+These are random button presses, including a few repeat signals. The remote
+in question is unmarked and used for remote controlling ceiling lights.
+
+Logic analyzer setup
+--------------------
+
+  Probe  NEC
+  -----------
+  0      IR

diff --git a/ir/nec/extended/unknown_ceiling_light.sr b/ir/nec/extended/unknown_ceiling_light.sr
new file mode 100644 (file)
index 0000000..7e3df84
Binary files /dev/null and b/ir/nec/extended/unknown_ceiling_light.sr differ

diff --git a/ir/nec/joy-it_sbc-irc01/README b/ir/nec/joy-it_sbc-irc01/README
new file mode 100644 (file)
index 0000000..b6abef3
--- /dev/null
+++ b/ir/nec/joy-it_sbc-irc01/README
@@ -0,0 +1,24 @@
+------------------------------------------------------------------------
+NEC infrared protocol
+------------------------------------------------------------------------
+
+These captures were taken with the "Joy-IT SBC IR01" remote control. File
+joy_it_sbc_irc01_all.sr contains data for all the buttons of that remote.
+File joy_it_sbc_irc01_enter_no_repeat.sr contains a single button that gets
+pressed repeatedly, but for a short period of time such that the remote
+won't send a repeat signal (each button press is new).
+
+There are several interesting aspects to these files:
+- The signal would not decode with 5% tolerance. A wider limit is needed
+  because this remote control's signal is outside of that narrow window.
+- The absence of IR frames for repeated button press could reveal an issue
+  with earlier decoder implementations, where the emission of annotations
+  for an IR frame was deferred until the start of the next IR frame.
+
+Logic analyzer setup
+--------------------
+
+  Probe  NEC
+  -----------
+  0      IR (carrier removed)
+  1      RAW (includes carrier)

diff --git a/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_all.sr b/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_all.sr
new file mode 100644 (file)
index 0000000..4dabcae
Binary files /dev/null and b/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_all.sr differ

diff --git a/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_enter_no_repeat.sr b/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_enter_no_repeat.sr
new file mode 100644 (file)
index 0000000..c993e75
Binary files /dev/null and b/ir/nec/joy-it_sbc-irc01/joy_it_sbc_irc01_enter_no_repeat.sr differ

diff --git a/ir/rc-6/kathrein/README b/ir/rc-6/kathrein/README
new file mode 100644 (file)
index 0000000..6b50fe6
--- /dev/null
+++ b/ir/rc-6/kathrein/README
@@ -0,0 +1,30 @@
+-------------------------------------------------------------------------------
+Philips RC-6 remote control captures
+-------------------------------------------------------------------------------
+
+These captures contain the IR data sent by various remote controls.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic (at 1MHz):
+
+  Probe       RC-6
+  ----------------
+  0           IR
+  1           Raw
+
+The data was captured using a TSOP1736 directly connected to channel 0.
+For comparison a phototransistor is connected to channel 1. Only channel 0
+should be used for decoding.
+
+
+kathrein_RC674_numbers.sr
+-------------------------
+
+This capture was taken with a Kathrein RC(U)674 remote control. The
+sequence of keys is "power", 1, 2, ..., 9, 0.
+
+Note that this remote uses Mode 6B and does not make use of the 
+integrated toggle bit, but uses the first data bit for that purpose.

diff --git a/ir/rc-6/kathrein/kathrein_rc674_numbers.sr b/ir/rc-6/kathrein/kathrein_rc674_numbers.sr
new file mode 100644 (file)
index 0000000..7dcdb9b
Binary files /dev/null and b/ir/rc-6/kathrein/kathrein_rc674_numbers.sr differ

diff --git a/ir/rc-6/philips/README b/ir/rc-6/philips/README
new file mode 100644 (file)
index 0000000..3d85749
--- /dev/null
+++ b/ir/rc-6/philips/README
@@ -0,0 +1,37 @@
+-------------------------------------------------------------------------------
+Philips RC-6 remote control captures
+-------------------------------------------------------------------------------
+
+These captures contain the IR data sent by various remote controls.
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic (at 1MHz):
+
+  Probe       RC-6
+  ----------------
+  0           IR
+  1           Raw
+
+The data was captured using a TSOP1736 directly connected to channel 0.
+For comparison a phototransistor is connected to channel 1. Only channel 0
+should be used for decoding.
+
+
+philips_RC2143604_numbers.sr
+----------------------------
+
+This capture was taken with a Philips RC2143604 remote control. The
+sequence of keys is "power", 1, 2, ..., 9, 0.
+
+Note that this remote uses Mode 0.
+
+
+philips_unknown_numbers.sr
+--------------------------
+
+This capture was taken with an unknown Philips remote control. The
+sequence of keys is "power", 1, 2, ..., 9.
+
+Note that this remote uses Mode 0.

diff --git a/ir/rc-6/philips/philips_rc2143604_numbers.sr b/ir/rc-6/philips/philips_rc2143604_numbers.sr
new file mode 100644 (file)
index 0000000..6e3efaa
Binary files /dev/null and b/ir/rc-6/philips/philips_rc2143604_numbers.sr differ

diff --git a/ir/rc-6/philips/philips_unknown_numbers.sr b/ir/rc-6/philips/philips_unknown_numbers.sr
new file mode 100644 (file)
index 0000000..d793eb8
Binary files /dev/null and b/ir/rc-6/philips/philips_unknown_numbers.sr differ

diff --git a/ir/sirc/README b/ir/sirc/README
new file mode 100644 (file)
index 0000000..dbccb6c
--- /dev/null
+++ b/ir/sirc/README
@@ -0,0 +1,13 @@
+------------------------------------------------------------------------
+Sony infrared remote control (SIRC)
+------------------------------------------------------------------------
+
+See https://www.sbprojects.net/knowledge/ir/sirc.php for a description
+of the SIRC protocol.
+
+Logic analyzer setup
+--------------------
+
+  Probe  SIRC
+  -----------
+  0      IR

diff --git a/ir/sirc/sirc-1.sr b/ir/sirc/sirc-1.sr
new file mode 100644 (file)
index 0000000..0c177ba
Binary files /dev/null and b/ir/sirc/sirc-1.sr differ

diff --git a/ir/sirc/sirc-2.sr b/ir/sirc/sirc-2.sr
new file mode 100644 (file)
index 0000000..5a13630
Binary files /dev/null and b/ir/sirc/sirc-2.sr differ

diff --git a/jtag/cjtag/cjtag_n305_sba.sr b/jtag/cjtag/cjtag_n305_sba.sr
new file mode 100644 (file)
index 0000000..bb7c81e
Binary files /dev/null and b/jtag/cjtag/cjtag_n305_sba.sr differ

diff --git a/jtag/cjtag/cjtag_n305_sba_snippet.sr b/jtag/cjtag/cjtag_n305_sba_snippet.sr
new file mode 100644 (file)
index 0000000..ae61e2c
Binary files /dev/null and b/jtag/cjtag/cjtag_n305_sba_snippet.sr differ

diff --git a/jtag/cjtag/cjtag_n307_sba_test.sr b/jtag/cjtag/cjtag_n307_sba_test.sr
new file mode 100644 (file)
index 0000000..9e863f7
Binary files /dev/null and b/jtag/cjtag/cjtag_n307_sba_test.sr differ

diff --git a/jtag/cjtag/cjtag_n307_sba_test_snippet.sr b/jtag/cjtag/cjtag_n307_sba_test_snippet.sr
new file mode 100644 (file)
index 0000000..f7f6491
Binary files /dev/null and b/jtag/cjtag/cjtag_n307_sba_test_snippet.sr differ

diff --git a/led/ws281x_rgbw/README b/led/ws281x_rgbw/README
new file mode 100644 (file)
index 0000000..92cd6e8
--- /dev/null
+++ b/led/ws281x_rgbw/README
@@ -0,0 +1,19 @@
+-------------------------------------------------------------------------------
+WS281x-based RGBW LED Strip
+-------------------------------------------------------------------------------
+
+This is for testing purposes a short sequence for 4 LEDs showing different colors and values
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Clone (at 4MHz)
+
+
+Data
+----
+Decoded it shows:
+red (Led0: 0, Led1: 63, Led2: 127, Led3: 255)
+green (0, 63, 127, 255)
+blue (0, 63, 127, 255)
+white (0, 63, 127, 255)

diff --git a/led/ws281x_rgbw/ws281x_RGBW_4MHz_snippet.sr b/led/ws281x_rgbw/ws281x_RGBW_4MHz_snippet.sr
new file mode 100644 (file)
index 0000000..55ac2a7
Binary files /dev/null and b/led/ws281x_rgbw/ws281x_RGBW_4MHz_snippet.sr differ

diff --git a/lpc/h55/README b/lpc/h55/README
new file mode 100644 (file)
index 0000000..dba8d95
--- /dev/null
+++ b/lpc/h55/README
@@ -0,0 +1,30 @@
+-------------------------------------------------------------------------------
+Intel H55 LPC (low pin count) traffic
+-------------------------------------------------------------------------------
+
+This capture is an LPC (low pin count) I/O read transaction from an Intel H55
+chipset on a Foxconn H55MXV motherboard.
+
+Details:
+http://en.wikipedia.org/wiki/Low_Pin_Count
+
+
+Hardware setup
+--------------
+
+The capture was taken with an FPGA sampling at 200 MHz and imported into sigrok
+as 8bit binary data.
+
+  Probe  LPC
+  ----------
+  2      LCLK
+  3      LFRAME#
+  4      LAD0
+  5      LAD1
+  6      LAD2
+  7      LAD3
+
+
+h55_lpc_io_write.sr
+---------------
+An I/O write to 0x2e (super IO index register) of 0x55.

diff --git a/lpc/h55/h55_lpc_io_write.sr b/lpc/h55/h55_lpc_io_write.sr
new file mode 100644 (file)
index 0000000..c4dab93
Binary files /dev/null and b/lpc/h55/h55_lpc_io_write.sr differ

diff --git a/lpc/power9/README b/lpc/power9/README
new file mode 100644 (file)
index 0000000..abab953
--- /dev/null
+++ b/lpc/power9/README
@@ -0,0 +1,46 @@
+-------------------------------------------------------------------------------
+IBM POWER9 LPC (low pin count) traffic
+-------------------------------------------------------------------------------
+
+These captures are examples of various transaction types from an IBM POWER9 LPC
+(low pin count) interface.
+
+Details:
+http://en.wikipedia.org/wiki/Low_Pin_Count
+
+
+Hardware setup
+--------------
+
+The logic analyser used was a DreamSourceLab DSLogic U3Pro32. As support for
+this is not yet in sigrok, the traces were captured externally and imported.
+
+  Probe  LPC
+  ----------
+  0      LAD0
+  1      LAD1
+  2      LAD2
+  3      LAD3
+  4      LFRAME#
+  5      LCLK
+
+
+power9_lpc_io_read.sr
+--------------
+An I/O read from 0x3fd (serial port) which returns 0x60.
+
+power9_lpc_io_write.sr
+---------------
+An I/O write to 0x3f8 (serial port) of 0x73.
+
+power9_lpc_firmware_read.sr
+--------------------
+A firmware read from 0xfff7000 which returns 0x54524150.
+
+power9_lpc_firmware_write.sr
+---------------------
+A firmware write to 0xc031360 of 0x0000.
+
+power9_lpc_io_write_abort.sr
+---------------------
+An I/O read that gets aborted because the peripheral never responded.

diff --git a/lpc/power9/power9_lpc_firmware_read.sr b/lpc/power9/power9_lpc_firmware_read.sr
new file mode 100644 (file)
index 0000000..df5bca9
Binary files /dev/null and b/lpc/power9/power9_lpc_firmware_read.sr differ

diff --git a/lpc/power9/power9_lpc_firmware_write.sr b/lpc/power9/power9_lpc_firmware_write.sr
new file mode 100644 (file)
index 0000000..07d642c
Binary files /dev/null and b/lpc/power9/power9_lpc_firmware_write.sr differ

diff --git a/lpc/power9/power9_lpc_io_read.sr b/lpc/power9/power9_lpc_io_read.sr
new file mode 100644 (file)
index 0000000..d50b0a8
Binary files /dev/null and b/lpc/power9/power9_lpc_io_read.sr differ

diff --git a/lpc/power9/power9_lpc_io_write.sr b/lpc/power9/power9_lpc_io_write.sr
new file mode 100644 (file)
index 0000000..bf64713
Binary files /dev/null and b/lpc/power9/power9_lpc_io_write.sr differ

diff --git a/lpc/power9/power9_lpc_io_write_abort.sr b/lpc/power9/power9_lpc_io_write_abort.sr
new file mode 100644 (file)
index 0000000..6e3c396
Binary files /dev/null and b/lpc/power9/power9_lpc_io_write_abort.sr differ

diff --git a/microwire/microchip_93lc46b/README b/microwire/microchip_93lc46b/README
new file mode 100644 (file)
index 0000000..773da8e
--- /dev/null
+++ b/microwire/microchip_93lc46b/README
@@ -0,0 +1,27 @@
+-------------------------------------------------------------------------------
+Microchip 93LC46B Microwire EEPROM
+-------------------------------------------------------------------------------
+
+This is a set of example captures of the Microwire traffic from a
+Microchip 93LC46B Microwire EEPROM to an FTDI FT232* chip on a random
+unknown eval board.
+
+Details:
+https://www.microchip.com/wwwproducts/en/93LC46B
+http://ww1.microchip.com/downloads/en/DeviceDoc/20001749K.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a CWAV USBee SX (at 8MHz):
+
+  Probe       93LC46B pin
+  -----------------------
+  0           CS
+  1           CLK
+  2           DI
+  3           DO
+  4           ORG
+
+The ORG pin is tied high to use the x16 memory organisation (16-bit words).

diff --git a/microwire/microchip_93lc46b/microchip_93lc46b.sr b/microwire/microchip_93lc46b/microchip_93lc46b.sr
new file mode 100644 (file)
index 0000000..43d609a
Binary files /dev/null and b/microwire/microchip_93lc46b/microchip_93lc46b.sr differ

diff --git a/misc/vcd/real-analog.vcd b/misc/vcd/real-analog.vcd
new file mode 100644 (file)
index 0000000..1716de4
--- /dev/null
+++ b/misc/vcd/real-analog.vcd
@@ -0,0 +1,1030 @@
+$date Thu Jan  2 20:39:07 2020 $end
+$version libsigrok 0.6.0-git-2826441d6f05 $end
+$comment
+  Acquisition with 13/13 channels at 200 kHz
+  generated by means of this command:
+    sigrok-cli -d demo --samples 1000 -O vcd -o file.vcd
+  demonstrates: mixed signal (logic and analog channels),
+    input samplerate (200kHz) cannot get expressed in VCD,
+    which results in "stair case" artifacts on re-import
+$end
+$timescale 1 us $end
+$scope module libsigrok $end
+$var wire 1 ! D0 $end
+$var wire 1 " D1 $end
+$var wire 1 # D2 $end
+$var wire 1 $ D3 $end
+$var wire 1 % D4 $end
+$var wire 1 & D5 $end
+$var wire 1 ' D6 $end
+$var wire 1 ( D7 $end
+$var real 64 ) A0 $end
+$var real 64 * A1 $end
+$var real 64 + A2 $end
+$var real 64 , A3 $end
+$var real 64 - A4 $end
+$upscope $end
+$enddefinitions $end
+
+#0 1! 0" 0# 1$ 1% 0& 1' 1( r-10 ) r0 * r0 + r-2.340000152587891 - r0 ,
+#5 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r7.719999313354492 - r1 ,
+#10 r5.877852439880371 * r4 + r5.539999961853027 - r2 ,
+#15 r8.090169906616211 * r6 + r8.299999237060547 - r3 ,
+#20 1! 0" 1$ 0% 0& 1' r9.510564804077148 * r8 + r5.859999656677246 - r4 ,
+#25 1" 1% 1& r10 ) r10 * r10 + r-3.300000190734863 - r5 ,
+#30 r9.510564804077148 * r8 + r-2.28000020980835 - r6 ,
+#35 r8.090169906616211 * r6 + r-0.1599998474121094 - r7 ,
+#40 0! 0' r5.877852439880371 * r4 + r2.979999542236328 - r8 ,
+#45 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r-1.579999923706055 - r9 ,
+#50 r-10 ) r-3.216245298855018e-15 * r-2.047525331859532e-15 + r-2.760000228881836 - r-10 ,
+#55 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r-9.460000038146973 - r-9 ,
+#60 1! 1' r-5.877852439880371 * r-4 + r3.799999237060547 - r-8 ,
+#65 r-8.090169906616211 * r-6 + r-8.819999694824219 - r-7 ,
+#70 r-9.510564804077148 * r-8 + r5.25999927520752 - r-6 ,
+#75 r10 ) r-10 * r-10 + r8.520000457763672 - r-5 ,
+#80 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r0.8000001907348633 - r-4 ,
+#85 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-1.480000495910645 - r-3 ,
+#90 r-5.877852439880371 * r-4 + r-6.560000419616699 - r-2 ,
+#95 0$ r-3.090169906616211 * r-2 + r4.719999313354492 - r-1 ,
+#100 1! 0" 0% 0& 1' r-10 ) r6.432490597710035e-15 * r4.095050663719063e-15 + r-5.78000020980835 - r0 ,
+#105 1" 1$ 1% 1& r3.090169906616211 * r2 + r-2.640000343322754 - r1 ,
+#110 r5.877852439880371 * r4 + r1.340000152587891 - r2 ,
+#115 r8.090169906616211 * r6 + r-1.420000076293945 - r3 ,
+#120 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r5.639999389648438 - r4 ,
+#125 1" 1# 1% 1& 1' r10 ) r10 * r10 + r0.5999994277954102 - r5 ,
+#130 r9.510564804077148 * r8 + r7.239999771118164 - r6 ,
+#135 0% r8.090169906616211 * r6 + r-7.539999961853027 - r7 ,
+#140 1! 0" 0# 1$ 1% 0& 0' r5.877852439880371 * r4 + r-8.659999847412109 - r8 ,
+#145 1" 1# 1& 1' r3.090169906616211 * r2 + r-7.300000190734863 - r9 ,
+#150 r-10 ) r3.673940187178589e-15 * r2.338903183407353e-15 + r8.579999923706055 - r10 ,
+#155 r-3.090169906616211 * r-2 + r6.039999008178711 - r-9 ,
+#160 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r-9.560000419616699 - r-8 ,
+#165 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-8.840000152587891 - r-7 ,
+#170 r-9.510564804077148 * r-8 + r-8.619999885559082 - r-6 ,
+#175 r10 ) r-10 * r-10 + r-6.659999847412109 - r-5 ,
+#180 1! 0" 0# 0$ 0% 0& 1' r-9.510564804077148 * r-8 + r-2.140000343322754 - r-4 ,
+#185 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r-0.880000114440918 - r-3 ,
+#190 r-5.877852439880371 * r-4 + r-9.779999732971191 - r-2 ,
+#195 r-3.090169906616211 * r-2 + r-9.159999847412109 - r-1 ,
+#200 0! 0" 0# 0$ 0% 0& 0' r-10 ) r1.286498119542007e-14 * r8.190101327438127e-15 + r-5.420000076293945 - r0 ,
+#205 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r-2.539999961853027 - r1 ,
+#210 0# 1$ 0% r5.877852439880371 * r4 + r-1.579999923706055 - r2 ,
+#215 0" 1# 1% 0& r8.090169906616211 * r6 + r8.379999160766602 - r3 ,
+#220 0! 1" 1& 0' r9.510564804077148 * r8 + r5.679999351501465 - r4 ,
+#225 1! 1' r10 ) r10 * r10 + r0.7399997711181641 - r5 ,
+#230 r9.510564804077148 * r8 + r-6.039999961853027 - r6 ,
+#235 r8.090169906616211 * r6 + r-3.519999980926514 - r7 ,
+#240 r5.877852439880371 * r4 + r-3.700000286102295 - r8 ,
+#245 r3.090169906616211 * r2 + r-2.600000381469727 - r9 ,
+#250 r-10 ) r6.123233786469806e-15 * r3.898171831173431e-15 + r-1.739999771118164 - r-10 ,
+#255 r-3.090169906616211 * r-2 + r0.5199995040893555 - r-9 ,
+#260 r-5.877852439880371 * r-4 + r-8.180000305175781 - r-8 ,
+#265 r-8.090169906616211 * r-6 + r9.600000381469727 - r-7 ,
+#270 r-9.510564804077148 * r-8 + r9.119998931884766 - r-6 ,
+#275 r10 ) r-10 * r-10 + r7.459999084472656 - r-5 ,
+#280 0! 0" 0# 0$ 0% 0' r-9.510564804077148 * r-8 + r7.239999771118164 - r-4 ,
+#285 r-8.090169906616211 * r-6 + r-6.600000381469727 - r-3 ,
+#290 1! 1" 1# 1$ 1% 1' r-5.877852439880371 * r-4 + r9.920000076293945 - r-2 ,
+#295 r-3.090169906616211 * r-2 + r-4.380000114440918 - r-1 ,
+#300 r-10 ) r-7.347880374357178e-15 * r-4.677806366814707e-15 + r-3.900000095367432 - r-8.881784197001252e-15 ,
+#305 r3.090169906616211 * r2 + r8.5 - r1 ,
+#310 r5.877852439880371 * r4 + r-8.319999694824219 - r2 ,
+#315 r8.090169906616211 * r6 + r-3.460000038146973 - r3 ,
+#320 0" 0# 0& r9.510564804077148 * r8 + r-3.28000020980835 - r4 ,
+#325 0! 1" 1# 0$ 1& 0' r10 ) r10 * r10 + r0.09999942779541016 - r5 ,
+#330 r9.510564804077148 * r8 + r6.920000076293945 - r6 ,
+#335 r8.090169906616211 * r6 + r4.579999923706055 - r7 ,
+#340 1! 0" 1$ 0% 0& 1' r5.877852439880371 * r4 + r-3.740000247955322 - r8 ,
+#345 1" 1% 1& r3.090169906616211 * r2 + r7.139999389648438 - r9 ,
+#350 r-10 ) r8.572527385761024e-15 * r5.457440478939509e-15 + r-7.519999980926514 - r-10 ,
+#355 r-3.090169906616211 * r-2 + r7.899999618530273 - r-9 ,
+#360 0! 0' r-5.877852439880371 * r-4 + r1.639999389648438 - r-8 ,
+#365 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r0.8999996185302734 - r-7 ,
+#370 r-9.510564804077148 * r-8 + r6.279998779296875 - r-6 ,
+#375 1" 1# 1$ 1% 1& r10 ) r-10 * r-10 + r-2.660000324249268 - r-5 ,
+#380 1! 1' r-9.510564804077148 * r-8 + r-1.320000648498535 - r-4 ,
+#385 r-8.090169906616211 * r-6 + r-2.720000267028809 - r-3 ,
+#390 r-5.877852439880371 * r-4 + r-9.140000343322754 - r-2 ,
+#395 r-3.090169906616211 * r-2 + r5 - r-1 ,
+#400 0" 0# 0$ 0% 0& r-10 ) r2.572996239084014e-14 * r1.638020265487625e-14 + r-8.260000228881836 - r0 ,
+#405 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r6.159999847412109 - r1 ,
+#410 r5.877852439880371 * r4 + r-4.480000019073486 - r2 ,
+#415 0$ r8.090169906616211 * r6 + r-6.440000057220459 - r3 ,
+#420 1! 0" 0% 0& 1' r9.510564804077148 * r8 + r5.75999927520752 - r4 ,
+#425 1" 1$ 1% 1& r10 ) r10 * r10 + r1.679999351501465 - r5 ,
+#430 r9.510564804077148 * r8 + r-1.940000534057617 - r6 ,
+#435 r8.090169906616211 * r6 + r3.019999504089355 - r7 ,
+#440 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r5.079999923706055 - r8 ,
+#445 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r-2.019999980926514 - r9 ,
+#450 r-10 ) r1.102182140856871e-14 * r7.016709126705586e-15 + r8.639999389648438 - r-10 ,
+#455 0% r-3.090169906616211 * r-2 + r-8.800000190734863 - r-9 ,
+#460 1! 0" 0# 1$ 1% 0& 0' r-5.877852439880371 * r-4 + r3.519999504089355 - r-8 ,
+#465 1" 1# 1& 1' r-8.090169906616211 * r-6 + r-2.640000343322754 - r-7 ,
+#470 r-9.510564804077148 * r-8 + r4.779999732971191 - r-6 ,
+#475 r10 ) r-10 * r-10 + r-9.760000228881836 - r-5 ,
+#480 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r-5.480000019073486 - r-4 ,
+#485 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r1.719999313354492 - r-3 ,
+#490 r-5.877852439880371 * r-4 + r-8.119999885559082 - r-2 ,
+#495 r-3.090169906616211 * r-2 + r0.7799997329711914 - r-1 ,
+#500 1! 0" 0# 0$ 0% 0& 1' r-10 ) r-1.224646757293961e-14 * r-7.796343662346862e-15 + r5.899999618530273 - r0 ,
+#505 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r1.399999618530273 - r1 ,
+#510 r5.877852439880371 * r4 + r-1.320000648498535 - r2 ,
+#515 r8.090169906616211 * r6 + r-2.440000057220459 - r3 ,
+#520 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r-0.6599998474121094 - r4 ,
+#525 1! 1" 1# 1% 1& 1' r10 ) r10 * r10 + r2.019999504089355 - r5 ,
+#530 0# 1$ 0% r9.510564804077148 * r8 + r-8.060000419616699 - r6 ,
+#535 0" 1# 1% 0& r8.090169906616211 * r6 + r8.039999008178711 - r7 ,
+#540 0! 1" 1& 0' r5.877852439880371 * r4 + r-3.660000324249268 - r8 ,
+#545 1! 1' r3.090169906616211 * r2 + r-0.1599998474121094 - r9 ,
+#550 r-10 ) r-2.20560213566286e-14 * r-1.404129989498537e-14 + r3.039999961853027 - r-10 ,
+#555 r-3.090169906616211 * r-2 + r5.119999885559082 - r-9 ,
+#560 r-5.877852439880371 * r-4 + r-3.980000019073486 - r-8 ,
+#565 r-8.090169906616211 * r-6 + r-4.400000095367432 - r-7 ,
+#570 r-9.510564804077148 * r-8 + r-4.28000020980835 - r-6 ,
+#575 r10 ) r-10 * r-10 + r-1.180000305175781 - r-5 ,
+#580 r-9.510564804077148 * r-8 + r7.299999237060547 - r-4 ,
+#585 r-8.090169906616211 * r-6 + r3.779999732971191 - r-3 ,
+#590 r-5.877852439880371 * r-4 + r-1.119999885559082 - r-2 ,
+#595 r-3.090169906616211 * r-2 + r2.380000114440918 - r-1 ,
+#600 0! 0" 0# 0$ 0% 0' r-10 ) r-1.469576074871436e-14 * r-9.355612733629413e-15 + r-1.199999809265137 - r-1.77635683940025e-14 ,
+#605 r3.090169906616211 * r2 + r4.579999923706055 - r1 ,
+#610 1! 1" 1# 1$ 1% 1' r5.877852439880371 * r4 + r-9.380000114440918 - r2 ,
+#615 r8.090169906616211 * r6 + r-7.659999847412109 - r3 ,
+#620 r9.510564804077148 * r8 + r-8.060000419616699 - r4 ,
+#625 r10 ) r10 * r10 + r5.420000076293945 - r5 ,
+#630 r9.510564804077148 * r8 + r-0.380000114440918 - r6 ,
+#635 r8.090169906616211 * r6 + r3.5 - r7 ,
+#640 0" 0# 0& r5.877852439880371 * r4 + r4.179999351501465 - r8 ,
+#645 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r8.539999008178711 - r9 ,
+#650 r-10 ) r5.144754454812321e-14 * r3.275252451521125e-14 + r1.340000152587891 - r-10 ,
+#655 r-3.090169906616211 * r-2 + r7.119998931884766 - r-9 ,
+#660 1! 0" 1$ 0% 0& 1' r-5.877852439880371 * r-4 + r-0.06000041961669922 - r-8 ,
+#665 1" 1% 1& r-8.090169906616211 * r-6 + r-2.940000057220459 - r-7 ,
+#670 r-9.510564804077148 * r-8 + r1.719999313354492 - r-6 ,
+#675 r10 ) r-10 * r-10 + r9.299999237060547 - r-5 ,
+#680 0! 0' r-9.510564804077148 * r-8 + r-3.880000114440918 - r-4 ,
+#685 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r3.659999847412109 - r-3 ,
+#690 r-5.877852439880371 * r-4 + r-5.619999885559082 - r-2 ,
+#695 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r2.479999542236328 - r-1 ,
+#700 1! 1' r-10 ) r-1.714505477152205e-14 * r-1.091488095787902e-14 + r0.5599994659423828 - r0 ,
+#705 r3.090169906616211 * r2 + r7.420000076293945 - r1 ,
+#710 r5.877852439880371 * r4 + r4.639999389648438 - r2 ,
+#715 r8.090169906616211 * r6 + r6.579999923706055 - r3 ,
+#720 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r0.05999946594238281 - r4 ,
+#725 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r-9.619999885559082 - r5 ,
+#730 r9.510564804077148 * r8 + r-4.599999904632568 - r6 ,
+#735 0$ r8.090169906616211 * r6 + r-2.640000343322754 - r7 ,
+#740 1! 0" 0% 0& 1' r5.877852439880371 * r4 + r4.159999847412109 - r8 ,
+#745 1" 1$ 1% 1& r3.090169906616211 * r2 + r4.299999237060547 - r9 ,
+#750 r-10 ) r-1.715743500507912e-14 * r-1.092276259945322e-14 + r-3.200000286102295 - r-10 ,
+#755 r-3.090169906616211 * r-2 + r-7.019999980926514 - r-9 ,
+#760 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r5.920000076293945 - r-8 ,
+#765 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r4.460000038146973 - r-7 ,
+#770 r-9.510564804077148 * r-8 + r2.359999656677246 - r-6 ,
+#775 0% r10 ) r-10 * r-10 + r-5.099999904632568 - r-5 ,
+#780 1! 0" 0# 1$ 1% 0& 0' r-9.510564804077148 * r-8 + r6.920000076293945 - r-4 ,
+#785 1" 1# 1& 1' r-8.090169906616211 * r-6 + r-0.9800004959106445 - r-3 ,
+#790 r-5.877852439880371 * r-4 + r8.420000076293945 - r-2 ,
+#795 r-3.090169906616211 * r-2 + r1.09999942779541 - r-1 ,
+#800 0" 0# 0$ 0% 0& r-10 ) r5.145992478168028e-14 * r3.276040530975251e-14 + r-2.420000076293945 - r0 ,
+#805 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r-0.2399997711181641 - r1 ,
+#810 r5.877852439880371 * r4 + r5.279999732971191 - r2 ,
+#815 r8.090169906616211 * r6 + r-5.440000057220459 - r3 ,
+#820 1! 0" 0# 0$ 0% 0& 1' r9.510564804077148 * r8 + r6.819999694824219 - r4 ,
+#825 1" 1# 1$ 1% 1& r10 ) r10 * r10 + r-3 - r5 ,
+#830 r9.510564804077148 * r8 + r-6.140000343322754 - r6 ,
+#835 r8.090169906616211 * r6 + r0 - r7 ,
+#840 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r-9.319999694824219 - r8 ,
+#845 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r5.279999732971191 - r9 ,
+#850 0# 1$ 0% r-10 ) r5.634613259373859e-14 * r3.587106265777636e-14 + r-7.519999980926514 - r-10 ,
+#855 0" 1# 1% 0& r-3.090169906616211 * r-2 + r8.279998779296875 - r-9 ,
+#860 0! 1" 1& 0' r-5.877852439880371 * r-4 + r9.739999771118164 - r-8 ,
+#865 1! 1' r-8.090169906616211 * r-6 + r7.119998931884766 - r-7 ,
+#870 r-9.510564804077148 * r-8 + r4.859999656677246 - r-6 ,
+#875 r10 ) r-10 * r-10 + r-0.1800003051757812 - r-5 ,
+#880 r-9.510564804077148 * r-8 + r-5.460000038146973 - r-4 ,
+#885 r-8.090169906616211 * r-6 + r-2.700000286102295 - r-3 ,
+#890 r-5.877852439880371 * r-4 + r7.180000305175781 - r-2 ,
+#895 r-3.090169906616211 * r-2 + r8.719999313354492 - r-1 ,
+#900 r-10 ) r-2.204364281713743e-14 * r-1.403341825341117e-14 + r-1.360000610351562 - r0 ,
+#905 r3.090169906616211 * r2 + r1.019999504089355 - r1 ,
+#910 r5.877852439880371 * r4 + r-1.260000228881836 - r2 ,
+#915 r8.090169906616211 * r6 + r-5.440000057220459 - r3 ,
+#920 0! 0" 0# 0$ 0% 0' r9.510564804077148 * r8 + r-4.5 - r4 ,
+#925 r10 ) r10 * r10 + r-1.860000610351562 - r5 ,
+#930 1! 1" 1# 1$ 1% 1' r9.510564804077148 * r8 + r-0.5200004577636719 - r6 ,
+#935 r8.090169906616211 * r6 + r-7.579999923706055 - r7 ,
+#940 r5.877852439880371 * r4 + r7.159999847412109 - r8 ,
+#945 r3.090169906616211 * r2 + r-2.100000381469727 - r9 ,
+#950 r-10 ) r-1.225884780649668e-14 * r-7.804224456888116e-15 + r-9.420000076293945 - r-10 ,
+#955 r-3.090169906616211 * r-2 + r-5.260000228881836 - r-9 ,
+#960 0" 0# 0& r-5.877852439880371 * r-4 + r-5.300000190734863 - r-8 ,
+#965 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r5.859999656677246 - r-7 ,
+#970 r-9.510564804077148 * r-8 + r6.35999870300293 - r-6 ,
+#975 r10 ) r-10 * r-10 + r-1.440000534057617 - r-5 ,
+#980 1! 0" 1$ 0% 0& 1' r-9.510564804077148 * r-8 + r-7.140000343322754 - r-4 ,
+#985 1" 1% 1& r-8.090169906616211 * r-6 + r-9.779999732971191 - r-3 ,
+#990 r-5.877852439880371 * r-4 + r8.559999465942383 - r-2 ,
+#995 r-3.090169906616211 * r-2 + r0.5799999237060547 - r-1 ,
+#1000 0! 0' r-10 ) r-2.449293514587923e-14 * r-1.559268732469372e-14 + r5.519999504089355 - r0 ,
+#1005 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r-1.920000076293945 - r1 ,
+#1010 r5.877852439880371 * r4 + r-1.140000343322754 - r2 ,
+#1015 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r5.25999927520752 - r3 ,
+#1020 1! 1' r9.510564804077148 * r8 + r2.25999927520752 - r4 ,
+#1025 r10 ) r10 * r10 + r0.7600002288818359 - r5 ,
+#1030 r9.510564804077148 * r8 + r2.119999885559082 - r6 ,
+#1035 r8.090169906616211 * r6 + r6.799999237060547 - r7 ,
+#1040 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r8.079999923706055 - r8 ,
+#1045 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r6.35999870300293 - r9 ,
+#1050 r-10 ) r-9.809553783688991e-15 * r-6.244956232638512e-15 + r-7.440000057220459 - r-10 ,
+#1055 0$ r-3.090169906616211 * r-2 + r3.75999927520752 - r-9 ,
+#1060 1! 0" 0% 0& 1' r-5.877852439880371 * r-4 + r-2.62000036239624 - r-8 ,
+#1065 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r8.340000152587891 - r-7 ,
+#1070 r-9.510564804077148 * r-8 + r-6 ,
+#1075 r10 ) r-10 * r-10 + r9.920000076293945 - r-5 ,
+#1080 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r-3.519999980926514 - r-4 ,
+#1085 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r4.859999656677246 - r-3 ,
+#1090 r-5.877852439880371 * r-4 + r-0.6000003814697266 - r-2 ,
+#1095 0% r-3.090169906616211 * r-2 + r-6.340000152587891 - r-1 ,
+#1100 1! 0" 0# 1$ 1% 0& 0' r-10 ) r4.411204271325721e-14 * r2.808259978997075e-14 + r-0.1999998092651367 - r0 ,
+#1105 1" 1# 1& 1' r3.090169906616211 * r2 + r-0.02000045776367188 - r1 ,
+#1110 r5.877852439880371 * r4 + r5.439999580383301 - r2 ,
+#1115 r8.090169906616211 * r6 + r4.5 - r3 ,
+#1120 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r2.880000114440918 - r4 ,
+#1125 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r1.800000190734863 - r5 ,
+#1130 r9.510564804077148 * r8 + r0.09999942779541016 - r6 ,
+#1135 r8.090169906616211 * r6 + r-7.220000267028809 - r7 ,
+#1140 1! 0" 0# 0$ 0% 0& 1' r5.877852439880371 * r4 + r9.079999923706055 - r8 ,
+#1145 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r5.719999313354492 - r9 ,
+#1150 r-10 ) r6.369401127402988e-14 * r4.054886648349222e-14 + r3.380000114440918 - r-10 ,
+#1155 r-3.090169906616211 * r-2 + r-8.359999656677246 - r-9 ,
+#1160 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r0.8400001525878906 - r-8 ,
+#1165 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-0.7200002670288086 - r-7 ,
+#1170 0# 1$ 0% r-9.510564804077148 * r-8 + r-6.060000419616699 - r-6 ,
+#1175 0" 1# 1% 0& r10 ) r-10 * r-10 + r0.1399993896484375 - r-5 ,
+#1180 0! 1" 1& 0' r-9.510564804077148 * r-8 + r-2.900000095367432 - r-4 ,
+#1185 1! 1' r-8.090169906616211 * r-6 + r6.079999923706055 - r-3 ,
+#1190 r-5.877852439880371 * r-4 + r-3.039999961853027 - r-2 ,
+#1195 r-3.090169906616211 * r-2 + r2.219999313354492 - r-1 ,
+#1200 r-10 ) r-2.939152149742871e-14 * r-1.871122546725883e-14 + r2.439999580383301 - r-3.552713678800501e-14 ,
+#1205 r3.090169906616211 * r2 + r6.559999465942383 - r1 ,
+#1210 r5.877852439880371 * r4 + r-4.019999980926514 - r2 ,
+#1215 r8.090169906616211 * r6 + r-3.140000343322754 - r3 ,
+#1220 r9.510564804077148 * r8 + r4.920000076293945 - r4 ,
+#1225 r10 ) r10 * r10 + r1.359999656677246 - r5 ,
+#1230 r9.510564804077148 * r8 + r-3.200000286102295 - r6 ,
+#1235 r8.090169906616211 * r6 + r-1.560000419616699 - r7 ,
+#1240 0! 0" 0# 0$ 0% 0' r5.877852439880371 * r4 + r-3.78000020980835 - r8 ,
+#1245 r3.090169906616211 * r2 + r6.19999885559082 - r9 ,
+#1250 1! 1" 1# 1$ 1% 1' r-10 ) r-4.91096700862303e-15 * r-3.126418513589883e-15 + r2.09999942779541 - r-10 ,
+#1255 r-3.090169906616211 * r-2 + r6.020000457763672 - r-9 ,
+#1260 r-5.877852439880371 * r-4 + r3.219999313354492 - r-8 ,
+#1265 r-8.090169906616211 * r-6 + r4.59999942779541 - r-7 ,
+#1270 r-9.510564804077148 * r-8 + r7.559999465942383 - r-6 ,
+#1275 r10 ) r-10 * r-10 + r-3.900000095367432 - r-5 ,
+#1280 0" 0# 0& r-9.510564804077148 * r-8 + r-3.600000381469727 - r-4 ,
+#1285 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r4.719999313354492 - r-3 ,
+#1290 r-5.877852439880371 * r-4 + r-1.119999885559082 - r-2 ,
+#1295 r-3.090169906616211 * r-2 + r2.519999504089355 - r-1 ,
+#1300 1! 0" 1$ 0% 0& 1' r-10 ) r-1.028950890962464e-13 * r-6.550504903042251e-14 + r0.4399995803833008 - r0 ,
+#1305 1" 1% 1& r3.090169906616211 * r2 + r-0.6999998092651367 - r1 ,
+#1310 r5.877852439880371 * r4 + r4.159999847412109 - r2 ,
+#1315 r8.090169906616211 * r6 + r-1.680000305175781 - r3 ,
+#1320 0! 0' r9.510564804077148 * r8 + r-4.360000133514404 - r4 ,
+#1325 0" 0# 0$ 0% 0& r10 ) r10 * r10 + r-4.840000152587891 - r5 ,
+#1330 r9.510564804077148 * r8 + r8.479999542236328 - r6 ,
+#1335 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r2.739999771118164 - r7 ,
+#1340 1! 1' r5.877852439880371 * r4 + r-8.760000228881836 - r8 ,
+#1345 r3.090169906616211 * r2 + r2.479999542236328 - r9 ,
+#1350 r-10 ) r-7.351594783237478e-14 * r-4.680170435770493e-14 + r2 - r-10 ,
+#1355 r-3.090169906616211 * r-2 + r-9.279999732971191 - r-9 ,
+#1360 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r-0.9600000381469727 - r-8 ,
+#1365 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r7.979999542236328 - r-7 ,
+#1370 r-9.510564804077148 * r-8 + r-2.420000076293945 - r-6 ,
+#1375 0$ r10 ) r-10 * r-10 + r1 - r-5 ,
+#1380 1! 0" 0% 0& 1' r-9.510564804077148 * r-8 + r-0.6400003433227539 - r-4 ,
+#1385 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r-8.579999923706055 - r-3 ,
+#1390 r-5.877852439880371 * r-4 + r9.459999084472656 - r-2 ,
+#1395 r-3.090169906616211 * r-2 + r-7.380000114440918 - r-1 ,
+#1400 0! 0" 0# 0$ 0% 0& 0' r-10 ) r-3.429010954304409e-14 * r-2.182976191575803e-14 + r7.619998931884766 - r0 ,
+#1405 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r8.600000381469727 - r1 ,
+#1410 r5.877852439880371 * r4 + r8.659999847412109 - r2 ,
+#1415 0% r8.090169906616211 * r6 + r7.879999160766602 - r3 ,
+#1420 1! 0" 0# 1$ 1% 0& 0' r9.510564804077148 * r8 + r3.199999809265137 - r4 ,
+#1425 1" 1# 1& 1' r10 ) r10 * r10 + r-6.739999771118164 - r5 ,
+#1430 r9.510564804077148 * r8 + r-6.019999980926514 - r6 ,
+#1435 r8.090169906616211 * r6 + r9.619998931884766 - r7 ,
+#1440 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r7.979999542236328 - r8 ,
+#1445 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r9.920000076293945 - r9 ,
+#1450 r-10 ) r1.420961736947265e-13 * r9.0461228189221e-14 + r9.180000305175781 - r10 ,
+#1455 r-3.090169906616211 * r-2 + r5.460000038146973 - r-9 ,
+#1460 1! 0" 0# 0$ 0% 0& 1' r-5.877852439880371 * r-4 + r6.260000228881836 - r-8 ,
+#1465 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r3.359999656677246 - r-7 ,
+#1470 r-9.510564804077148 * r-8 + r-6.199999809265137 - r-6 ,
+#1475 r10 ) r-10 * r-10 + r-8.100000381469727 - r-5 ,
+#1480 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r8.520000457763672 - r-4 ,
+#1485 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-0.6800003051757812 - r-3 ,
+#1490 0# 1$ 0% r-5.877852439880371 * r-4 + r-8.319999694824219 - r-2 ,
+#1495 0" 1# 1% 0& r-3.090169906616211 * r-2 + r-3.200000286102295 - r-1 ,
+#1500 0! 1" 1& 0' r-10 ) r3.431487001015823e-14 * r2.184552519890644e-14 + r-8.199999809265137 - r0 ,
+#1505 1! 1' r3.090169906616211 * r2 + r3.679999351501465 - r1 ,
+#1510 r5.877852439880371 * r4 + r-2.480000019073486 - r2 ,
+#1515 r8.090169906616211 * r6 + r0.8400001525878906 - r3 ,
+#1520 r9.510564804077148 * r8 + r8.719999313354492 - r4 ,
+#1525 r10 ) r10 * r10 + r-7.860000133514404 - r5 ,
+#1530 r9.510564804077148 * r8 + r-1.100000381469727 - r6 ,
+#1535 r8.090169906616211 * r6 + r5.119999885559082 - r7 ,
+#1540 r5.877852439880371 * r4 + r-6.420000076293945 - r8 ,
+#1545 r3.090169906616211 * r2 + r-1.640000343322754 - r9 ,
+#1550 r-10 ) r7.349118736526064e-14 * r4.678594276862243e-14 + r7.739999771118164 - r-10 ,
+#1555 r-3.090169906616211 * r-2 + r-1.760000228881836 - r-9 ,
+#1560 0! 0" 0# 0$ 0% 0' r-5.877852439880371 * r-4 + r-3.039999961853027 - r-8 ,
+#1565 r-8.090169906616211 * r-6 + r-6.560000419616699 - r-7 ,
+#1570 1! 1" 1# 1$ 1% 1' r-9.510564804077148 * r-8 + r3.179999351501465 - r-6 ,
+#1575 r10 ) r-10 * r-10 + r-9.819999694824219 - r-5 ,
+#1580 r-9.510564804077148 * r-8 + r-3.28000020980835 - r-4 ,
+#1585 r-8.090169906616211 * r-6 + r-5.800000190734863 - r-3 ,
+#1590 r-5.877852439880371 * r-4 + r-3.160000324249268 - r-2 ,
+#1595 r-3.090169906616211 * r-2 + r1.739999771118164 - r-1 ,
+#1600 0" 0# 0& r-10 ) r1.029198495633606e-13 * r6.552081061950502e-14 + r-5.880000114440918 - r0 ,
+#1605 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r-3.980000019073486 - r1 ,
+#1610 r5.877852439880371 * r4 + r4.25999927520752 - r2 ,
+#1615 r8.090169906616211 * r6 + r-2.559999942779541 - r3 ,
+#1620 1! 0" 1$ 0% 0& 1' r9.510564804077148 * r8 + r-3.579999923706055 - r4 ,
+#1625 1" 1% 1& r10 ) r10 * r10 + r-4.900000095367432 - r5 ,
+#1630 r9.510564804077148 * r8 + r6.379999160766602 - r6 ,
+#1635 r8.090169906616211 * r6 + r1.979999542236328 - r7 ,
+#1640 0! 0' r5.877852439880371 * r4 + r4.420000076293945 - r8 ,
+#1645 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r8.079999923706055 - r9 ,
+#1650 r-10 ) r4.886207388541839e-15 * r3.110656289232665e-15 + r8.779998779296875 - r-10 ,
+#1655 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r6.219999313354492 - r-9 ,
+#1660 1! 1' r-5.877852439880371 * r-4 + r8.799999237060547 - r-8 ,
+#1665 r-8.090169906616211 * r-6 + r3.340000152587891 - r-7 ,
+#1670 r-9.510564804077148 * r-8 + r4.09999942779541 - r-6 ,
+#1675 r10 ) r-10 * r-10 + r-5.440000057220459 - r-5 ,
+#1680 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r-7.460000038146973 - r-4 ,
+#1685 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-7 - r-3 ,
+#1690 r-5.877852439880371 * r-4 + r9.680000305175781 - r-2 ,
+#1695 0$ r-3.090169906616211 * r-2 + r3.159999847412109 - r-1 ,
+#1700 1! 0" 0% 0& 1' r-10 ) r-1.126922651874772e-13 * r-7.174212531555271e-14 + r8.399999618530273 - r0 ,
+#1705 1" 1$ 1% 1& r3.090169906616211 * r2 + r-5.519999980926514 - r1 ,
+#1710 r5.877852439880371 * r4 + r-1.560000419616699 - r2 ,
+#1715 r8.090169906616211 * r6 + r-4.619999885559082 - r3 ,
+#1720 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r-2.080000400543213 - r4 ,
+#1725 1" 1# 1% 1& 1' r10 ) r10 * r10 + r-8.380000114440918 - r5 ,
+#1730 r9.510564804077148 * r8 + r2.59999942779541 - r6 ,
+#1735 0% r8.090169906616211 * r6 + r-8.319999694824219 - r7 ,
+#1740 1! 0" 0# 1$ 1% 0& 0' r5.877852439880371 * r4 + r-4.160000324249268 - r8 ,
+#1745 1" 1# 1& 1' r3.090169906616211 * r2 + r9.439998626708984 - r9 ,
+#1750 r-10 ) r-6.371877174114401e-14 * r-4.056463146070652e-14 + r3.439999580383301 - r-10 ,
+#1755 r-3.090169906616211 * r-2 + r7 - r-9 ,
+#1760 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r2.5 - r-8 ,
+#1765 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-2.300000190734863 - r-7 ,
+#1770 r-9.510564804077148 * r-8 + r-5.559999942779541 - r-6 ,
+#1775 r10 ) r-10 * r-10 + r-4.019999980926514 - r-5 ,
+#1780 1! 0" 0# 0$ 0% 0& 1' r-9.510564804077148 * r-8 + r2.799999237060547 - r-4 ,
+#1785 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r-9.159999847412109 - r-3 ,
+#1790 r-5.877852439880371 * r-4 + r7.959999084472656 - r-2 ,
+#1795 r-3.090169906616211 * r-2 + r4.25999927520752 - r-1 ,
+#1800 0! 0" 0# 0$ 0% 0& 0' r-10 ) r-4.408728563427486e-14 * r-2.806683650682235e-14 + r-4.039999961853027 - r0 ,
+#1805 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r-6.199999809265137 - r1 ,
+#1810 0# 1$ 0% r5.877852439880371 * r4 + r0.4799995422363281 - r2 ,
+#1815 0" 1# 1% 0& r8.090169906616211 * r6 + r1.800000190734863 - r3 ,
+#1820 0! 1" 1& 0' r9.510564804077148 * r8 + r-5.820000171661377 - r4 ,
+#1825 1! 1' r10 ) r10 * r10 + r1.619999885559082 - r5 ,
+#1830 r9.510564804077148 * r8 + r6.379999160766602 - r6 ,
+#1835 r8.090169906616211 * r6 + r-3.28000020980835 - r7 ,
+#1840 r5.877852439880371 * r4 + r4.639999389648438 - r8 ,
+#1845 r3.090169906616211 * r2 + r-6.900000095367432 - r9 ,
+#1850 r-10 ) r9.784795010640748e-15 * r6.229193796523057e-15 + r9.879999160766602 - r-10 ,
+#1855 r-3.090169906616211 * r-2 + r-9.920000076293945 - r-9 ,
+#1860 r-5.877852439880371 * r-4 + r-2.420000076293945 - r-8 ,
+#1865 r-8.090169906616211 * r-6 + r5.380000114440918 - r-7 ,
+#1870 r-9.510564804077148 * r-8 + r-4.539999961853027 - r-6 ,
+#1875 r10 ) r-10 * r-10 + r5.519999504089355 - r-5 ,
+#1880 0! 0" 0# 0$ 0% 0' r-9.510564804077148 * r-8 + r7 - r-4 ,
+#1885 r-8.090169906616211 * r-6 + r-4.900000095367432 - r-3 ,
+#1890 1! 1" 1# 1$ 1% 1' r-5.877852439880371 * r-4 + r7.19999885559082 - r-2 ,
+#1895 r-3.090169906616211 * r-2 + r-7.159999847412109 - r-1 ,
+#1900 r-10 ) r2.451769561299336e-14 * r1.560844891377623e-14 + r1.579999923706055 - r0 ,
+#1905 r3.090169906616211 * r2 + r7.680000305175781 - r1 ,
+#1910 r5.877852439880371 * r4 + r9.85999870300293 - r2 ,
+#1915 r8.090169906616211 * r6 + r-5.900000095367432 - r3 ,
+#1920 0" 0# 0& r9.510564804077148 * r8 + r2.420000076293945 - r4 ,
+#1925 0! 1" 1# 0$ 1& 0' r10 ) r10 * r10 + r1.340000152587891 - r5 ,
+#1930 r9.510564804077148 * r8 + r0.07999992370605469 - r6 ,
+#1935 r8.090169906616211 * r6 + r2.25999927520752 - r7 ,
+#1940 1! 0" 1$ 0% 0& 1' r5.877852439880371 * r4 + r9.219999313354492 - r8 ,
+#1945 1" 1% 1& r3.090169906616211 * r2 + r5.079999923706055 - r9 ,
+#1950 r-10 ) r8.32883634564914e-14 * r5.302301905375263e-14 + r-3.480000019073486 - r-10 ,
+#1955 r-3.090169906616211 * r-2 + r-4.820000171661377 - r-9 ,
+#1960 0! 0' r-5.877852439880371 * r-4 + r8.879999160766602 - r-8 ,
+#1965 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r-5.960000038146973 - r-7 ,
+#1970 r-9.510564804077148 * r-8 + r-6 ,
+#1975 1" 1# 1$ 1% 1& r10 ) r-10 * r-10 + r0.119999885559082 - r-5 ,
+#1980 1! 1' r-9.510564804077148 * r-8 + r5.679999351501465 - r-4 ,
+#1985 r-8.090169906616211 * r-6 + r-9.579999923706055 - r-3 ,
+#1990 r-5.877852439880371 * r-4 + r6.840000152587891 - r-2 ,
+#1995 r-3.090169906616211 * r-2 + r7.35999870300293 - r-1 ,
+#2000 0" 0# 0$ 0% 0& r-10 ) r-4.898587029175845e-14 * r-3.118537464938745e-14 + r0.5599994659423828 - r0 ,
+#2005 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r-6.220000267028809 - r1 ,
+#2010 r5.877852439880371 * r4 + r7.440000534057617 - r2 ,
+#2015 0$ r8.090169906616211 * r6 + r8.159999847412109 - r3 ,
+#2020 1! 0" 0% 0& 1' r9.510564804077148 * r8 + r9.159999847412109 - r4 ,
+#2025 1" 1$ 1% 1& r10 ) r10 * r10 + r-0.03999996185302734 - r5 ,
+#2030 r9.510564804077148 * r8 + r-9.279999732971191 - r6 ,
+#2035 r8.090169906616211 * r6 + r6.159999847412109 - r7 ,
+#2040 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r5.059999465942383 - r8 ,
+#2045 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r-5.039999961853027 - r9 ,
+#2050 r-10 ) r-1.274251700249945e-13 * r-8.112138212687178e-14 + r-3.940000057220459 - r-10 ,
+#2055 0% r-3.090169906616211 * r-2 + r-3.340000152587891 - r-9 ,
+#2060 1! 0" 0# 1$ 1% 0& 0' r-5.877852439880371 * r-4 + r-7.340000152587891 - r-8 ,
+#2065 1" 1# 1& 1' r-8.090169906616211 * r-6 + r2.960000038146973 - r-7 ,
+#2070 r-9.510564804077148 * r-8 + r7.799999237060547 - r-6 ,
+#2075 r10 ) r-10 * r-10 + r5.079999923706055 - r-5 ,
+#2080 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r1.340000152587891 - r-4 ,
+#2085 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r4.920000076293945 - r-3 ,
+#2090 r-5.877852439880371 * r-4 + r-2.640000343322754 - r-2 ,
+#2095 r-3.090169906616211 * r-2 + r0.5799999237060547 - r-1 ,
+#2100 1! 0" 0# 0$ 0% 0& 1' r-10 ) r1.961910756737798e-14 * r1.248991246527702e-14 + r0 - r0 ,
+#2105 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r-9.079999923706055 - r1 ,
+#2110 r5.877852439880371 * r4 + r5.75999927520752 - r2 ,
+#2115 r8.090169906616211 * r6 + r5.939999580383301 - r3 ,
+#2120 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r-5.019999980926514 - r4 ,
+#2125 1! 1" 1# 1% 1& 1' r10 ) r10 * r10 + r9.799999237060547 - r5 ,
+#2130 0# 1$ 0% r9.510564804077148 * r8 + r-3.940000057220459 - r6 ,
+#2135 0" 1# 1% 0& r8.090169906616211 * r6 + r-9.340000152587891 - r7 ,
+#2140 0! 1" 1& 0' r5.877852439880371 * r4 + r-2.740000247955322 - r8 ,
+#2145 1! 1' r3.090169906616211 * r2 + r-0.06000041961669922 - r9 ,
+#2150 r-10 ) r8.818695150210679e-14 * r5.614155380818595e-14 + r-4.940000057220459 - r-10 ,
+#2155 r-3.090169906616211 * r-2 + r7.840000152587891 - r-9 ,
+#2160 r-5.877852439880371 * r-4 + r3.719999313354492 - r-8 ,
+#2165 r-8.090169906616211 * r-6 + r-7.5 - r-7 ,
+#2170 r-9.510564804077148 * r-8 + r-6.960000038146973 - r-6 ,
+#2175 r10 ) r-10 * r-10 + r9.920000076293945 - r-5 ,
+#2180 r-9.510564804077148 * r-8 + r9.5 - r-4 ,
+#2185 r-8.090169906616211 * r-6 + r-6.239999771118164 - r-3 ,
+#2190 r-5.877852439880371 * r-4 + r-6.860000133514404 - r-2 ,
+#2195 r-3.090169906616211 * r-2 + r4.579999923706055 - r-1 ,
+#2200 0! 0" 0# 0$ 0% 0' r-10 ) r8.822408542651441e-14 * r5.61651995799415e-14 + r-1.279999732971191 - r0 ,
+#2205 r3.090169906616211 * r2 + r-0.8000001907348633 - r1 ,
+#2210 1! 1" 1# 1$ 1% 1' r5.877852439880371 * r4 + r-1.720000267028809 - r2 ,
+#2215 r8.090169906616211 * r6 + r8.420000076293945 - r3 ,
+#2220 r9.510564804077148 * r8 + r-0.8000001907348633 - r4 ,
+#2225 r10 ) r10 * r10 + r-3.920000076293945 - r5 ,
+#2230 r9.510564804077148 * r8 + r-9.439999580383301 - r6 ,
+#2235 r8.090169906616211 * r6 + r-9.460000038146973 - r7 ,
+#2240 0" 0# 0& r5.877852439880371 * r4 + r-9 - r8 ,
+#2245 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r4.960000038146973 - r9 ,
+#2250 r-10 ) r1.958196856077267e-14 * r1.246626838758737e-14 + r1.119999885559082 - r-10 ,
+#2255 r-3.090169906616211 * r-2 + r8.039999008178711 - r-9 ,
+#2260 1! 0" 1$ 0% 0& 1' r-5.877852439880371 * r-4 + r5.880000114440918 - r-8 ,
+#2265 1" 1% 1& r-8.090169906616211 * r-6 + r3.939999580383301 - r-7 ,
+#2270 r-9.510564804077148 * r-8 + r3.979999542236328 - r-6 ,
+#2275 r10 ) r-10 * r-10 + r-9.140000343322754 - r-5 ,
+#2280 0! 0' r-9.510564804077148 * r-8 + r-9.220000267028809 - r-4 ,
+#2285 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r-9.960000038146973 - r-3 ,
+#2290 r-5.877852439880371 * r-4 + r-1.440000534057617 - r-2 ,
+#2295 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r-1.940000534057617 - r-1 ,
+#2300 1! 1' r-10 ) r-1.273880225480598e-13 * r-8.109773296698444e-14 + r0 - r0 ,
+#2305 r3.090169906616211 * r2 + r3.619999885559082 - r1 ,
+#2310 r5.877852439880371 * r4 + r2.939999580383301 - r2 ,
+#2315 r8.090169906616211 * r6 + r0.7600002288818359 - r3 ,
+#2320 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r-6.820000171661377 - r4 ,
+#2325 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r-6.980000019073486 - r5 ,
+#2330 r9.510564804077148 * r8 + r0.6999998092651367 - r6 ,
+#2335 0$ r8.090169906616211 * r6 + r-7.320000171661377 - r7 ,
+#2340 1! 0" 0% 0& 1' r5.877852439880371 * r4 + r-3.220000267028809 - r8 ,
+#2345 1" 1$ 1% 1& r3.090169906616211 * r2 + r3.840000152587891 - r9 ,
+#2350 r-10 ) r-4.902301099242966e-14 * r-3.120901703301121e-14 + r-5.700000286102295 - r-10 ,
+#2355 r-3.090169906616211 * r-2 + r-7.460000038146973 - r-9 ,
+#2360 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r0.07999992370605469 - r-8 ,
+#2365 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r2.579999923706055 - r-7 ,
+#2370 r-9.510564804077148 * r-8 + r-9.020000457763672 - r-6 ,
+#2375 0% r10 ) r-10 * r-10 + r9.279998779296875 - r-5 ,
+#2380 1! 0" 0# 1$ 1% 0& 0' r-9.510564804077148 * r-8 + r-4.300000190734863 - r-4 ,
+#2385 1" 1# 1& 1' r-8.090169906616211 * r-6 + r-1.420000076293945 - r-3 ,
+#2390 r-5.877852439880371 * r-4 + r-3.140000343322754 - r-2 ,
+#2395 r-3.090169906616211 * r-2 + r-3.300000190734863 - r-1 ,
+#2400 0" 0# 0$ 0% 0& r-10 ) r-5.878304299485743e-14 * r-3.742245093451765e-14 + r-6.460000038146973 - r-7.105427357601002e-14 ,
+#2405 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r8 - r1 ,
+#2410 r5.877852439880371 * r4 + r-5.240000247955322 - r2 ,
+#2415 r8.090169906616211 * r6 + r9.420000076293945 - r3 ,
+#2420 1! 0" 0# 0$ 0% 0& 1' r9.510564804077148 * r8 + r8.979999542236328 - r4 ,
+#2425 1" 1# 1$ 1% 1& r10 ) r10 * r10 + r-4.220000267028809 - r5 ,
+#2430 r9.510564804077148 * r8 + r-2.660000324249268 - r6 ,
+#2435 r8.090169906616211 * r6 + r9.760000228881836 - r7 ,
+#2440 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r-4.160000324249268 - r8 ,
+#2445 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r5.899999618530273 - r9 ,
+#2450 0# 1$ 0% r-10 ) r1.665891003702763e-13 * r1.060539189020465e-13 + r4.859999656677246 - r-10 ,
+#2455 0" 1# 1% 0& r-3.090169906616211 * r-2 + r-7.119999885559082 - r-9 ,
+#2460 0! 1" 1& 0' r-5.877852439880371 * r-4 + r6.579999923706055 - r-8 ,
+#2465 1! 1' r-8.090169906616211 * r-6 + r-2.200000286102295 - r-7 ,
+#2470 r-9.510564804077148 * r-8 + r3.639999389648438 - r-6 ,
+#2475 r10 ) r-10 * r-10 + r-3.200000286102295 - r-5 ,
+#2480 r-9.510564804077148 * r-8 + r0.8199996948242188 - r-4 ,
+#2485 r-8.090169906616211 * r-6 + r1.380000114440918 - r-3 ,
+#2490 r-5.877852439880371 * r-4 + r6.520000457763672 - r-2 ,
+#2495 r-3.090169906616211 * r-2 + r-5.360000133514404 - r-1 ,
+#2500 r-10 ) r9.82193401724606e-15 * r6.252837027179766e-15 + r-4.78000020980835 - r0 ,
+#2505 r3.090169906616211 * r2 + r-9.159999847412109 - r1 ,
+#2510 r5.877852439880371 * r4 + r-2.800000190734863 - r2 ,
+#2515 r8.090169906616211 * r6 + r-7.659999847412109 - r3 ,
+#2520 0! 0" 0# 0$ 0% 0' r9.510564804077148 * r8 + r-9.539999961853027 - r4 ,
+#2525 r10 ) r10 * r10 + r5.219999313354492 - r5 ,
+#2530 1! 1" 1# 1$ 1% 1' r9.510564804077148 * r8 + r-8.380000114440918 - r6 ,
+#2535 r8.090169906616211 * r6 + r-3.820000171661377 - r7 ,
+#2540 r5.877852439880371 * r4 + r-6.199999809265137 - r8 ,
+#2545 r3.090169906616211 * r2 + r-1.5 - r9 ,
+#2550 r-10 ) r-1.862329734869661e-13 * r-1.185595946504719e-13 + r9.920000076293945 - r-10 ,
+#2555 r-3.090169906616211 * r-2 + r-2.660000324249268 - r-9 ,
+#2560 0" 0# 0& r-5.877852439880371 * r-4 + r3.539999961853027 - r-8 ,
+#2565 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r-5.320000171661377 - r-7 ,
+#2570 r-9.510564804077148 * r-8 + r3.799999237060547 - r-6 ,
+#2575 r10 ) r-10 * r-10 + r2.519999504089355 - r-5 ,
+#2580 1! 0" 1$ 0% 0& 1' r-9.510564804077148 * r-8 + r0.4799995422363281 - r-4 ,
+#2585 1" 1% 1& r-8.090169906616211 * r-6 + r-8.859999656677246 - r-3 ,
+#2590 r-5.877852439880371 * r-4 + r2.279999732971191 - r-2 ,
+#2595 r-3.090169906616211 * r-2 + r-6.640000343322754 - r-1 ,
+#2600 0! 0' r-10 ) r-2.057901781924928e-13 * r-1.31010098060845e-13 + r-5.900000095367432 - r0 ,
+#2605 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r-2.840000152587891 - r1 ,
+#2610 r5.877852439880371 * r4 + r-3.760000228881836 - r2 ,
+#2615 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r-2.28000020980835 - r3 ,
+#2620 1! 1' r9.510564804077148 * r8 + r-8 - r4 ,
+#2625 r10 ) r10 * r10 + r-3.079999923706055 - r5 ,
+#2630 r9.510564804077148 * r8 + r4.519999504089355 - r6 ,
+#2635 r8.090169906616211 * r6 + r9.879999160766602 - r7 ,
+#2640 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r8.319999694824219 - r8 ,
+#2645 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r1.039999961853027 - r9 ,
+#2650 r-10 ) r2.937914465200343e-14 * r1.870334297865168e-14 + r1.559999465942383 - r-10 ,
+#2655 0$ r-3.090169906616211 * r-2 + r0.5799999237060547 - r-9 ,
+#2660 1! 0" 0% 0& 1' r-5.877852439880371 * r-4 + r8.920000076293945 - r-8 ,
+#2665 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r-4.200000286102295 - r-7 ,
+#2670 r-9.510564804077148 * r-8 + r2.939999580383301 - r-6 ,
+#2675 r10 ) r-10 * r-10 + r9.399999618530273 - r-5 ,
+#2680 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r-8.979999542236328 - r-4 ,
+#2685 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-8.399999618530273 - r-3 ,
+#2690 r-5.877852439880371 * r-4 + r2.619999885559082 - r-2 ,
+#2695 0% r-3.090169906616211 * r-2 + r1.859999656677246 - r-1 ,
+#2700 1! 0" 0# 1$ 1% 0& 0' r-10 ) r1.470318956647496e-13 * r9.360340871540987e-14 + r7.139999389648438 - r0 ,
+#2705 1" 1# 1& 1' r3.090169906616211 * r2 + r2.539999961853027 - r1 ,
+#2710 r5.877852439880371 * r4 + r-3.760000228881836 - r2 ,
+#2715 r8.090169906616211 * r6 + r7.719999313354492 - r3 ,
+#2720 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r-5.720000267028809 - r4 ,
+#2725 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r-2.900000095367432 - r5 ,
+#2730 r9.510564804077148 * r8 + r0.2399997711181641 - r6 ,
+#2735 r8.090169906616211 * r6 + r-8.199999809265137 - r7 ,
+#2740 1! 0" 0# 0$ 0% 0& 1' r5.877852439880371 * r4 + r-1.760000228881836 - r8 ,
+#2745 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r-0.4200000762939453 - r9 ,
+#2750 r-10 ) r2.449912560147094e-13 * r1.559662772196435e-13 + r2.199999809265137 - r-10 ,
+#2755 r-3.090169906616211 * r-2 + r9.379999160766602 - r-9 ,
+#2760 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r-6.220000267028809 - r-8 ,
+#2765 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-4.519999980926514 - r-7 ,
+#2770 0# 1$ 0% r-9.510564804077148 * r-8 + r-2.900000095367432 - r-6 ,
+#2775 0" 1# 1% 0& r10 ) r-10 * r-10 + r2.819999694824219 - r-5 ,
+#2780 0! 1" 1& 0' r-9.510564804077148 * r-8 + r2.399999618530273 - r-4 ,
+#2785 1! 1' r-8.090169906616211 * r-6 + r-1.340000152587891 - r-3 ,
+#2790 r-5.877852439880371 * r-4 + r9.739999771118164 - r-2 ,
+#2795 r-3.090169906616211 * r-2 + r7.760000228881836 - r-1 ,
+#2800 r-10 ) r-6.858021908608819e-14 * r-4.365952383151607e-14 + r-3.240000247955322 - r0 ,
+#2805 r3.090169906616211 * r2 + r1.319999694824219 - r1 ,
+#2810 r5.877852439880371 * r4 + r5.399999618530273 - r2 ,
+#2815 r8.090169906616211 * r6 + r-4.320000171661377 - r3 ,
+#2820 r9.510564804077148 * r8 + r7.119998931884766 - r4 ,
+#2825 r10 ) r10 * r10 + r-1.659999847412109 - r5 ,
+#2830 r9.510564804077148 * r8 + r2.119999885559082 - r6 ,
+#2835 r8.090169906616211 * r6 + r-4.800000190734863 - r7 ,
+#2840 0! 0" 0# 0$ 0% 0' r5.877852439880371 * r4 + r6.979999542236328 - r8 ,
+#2845 r3.090169906616211 * r2 + r-5.260000228881836 - r9 ,
+#2850 1! 1" 1# 1$ 1% 1' r-10 ) r-1.07830817842533e-13 * r-6.864722955661137e-14 + r-5.900000095367432 - r-10 ,
+#2855 r-3.090169906616211 * r-2 + r-8.819999694824219 - r-9 ,
+#2860 r-5.877852439880371 * r-4 + r-5.660000324249268 - r-8 ,
+#2865 r-8.090169906616211 * r-6 + r0.3599996566772461 - r-7 ,
+#2870 r-9.510564804077148 * r-8 + r8.899999618530273 - r-6 ,
+#2875 r10 ) r-10 * r-10 + r5.659999847412109 - r-5 ,
+#2880 0" 0# 0& r-9.510564804077148 * r-8 + r7.459999084472656 - r-4 ,
+#2885 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r-0.8400001525878906 - r-3 ,
+#2890 r-5.877852439880371 * r-4 + r7.459999084472656 - r-2 ,
+#2895 r-3.090169906616211 * r-2 + r2.739999771118164 - r-1 ,
+#2900 1! 0" 1$ 0% 0& 1' r-10 ) r-2.841923473894531e-13 * r-1.80922456378442e-13 + r-4.220000267028809 - r-7.105427357601002e-14 ,
+#2905 1" 1% 1& r3.090169906616211 * r2 + r-0.3400001525878906 - r1 ,
+#2910 r5.877852439880371 * r4 + r2.139999389648438 - r2 ,
+#2915 r8.090169906616211 * r6 + r-0.4400005340576172 - r3 ,
+#2920 0! 0' r9.510564804077148 * r8 + r5.139999389648438 - r4 ,
+#2925 0" 0# 0$ 0% 0& r10 ) r10 * r10 + r-3.720000267028809 - r5 ,
+#2930 r9.510564804077148 * r8 + r-0.5799999237060547 - r6 ,
+#2935 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r4.579999923706055 - r7 ,
+#2940 1! 1' r5.877852439880371 * r4 + r-8 - r8 ,
+#2945 r3.090169906616211 * r2 + r-0.8200006484985352 - r9 ,
+#2950 r-10 ) r1.077812969083047e-13 * r6.861570637844636e-14 + r2.359999656677246 - r-10 ,
+#2955 r-3.090169906616211 * r-2 + r-1.239999771118164 - r-9 ,
+#2960 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r-9.5 - r-8 ,
+#2965 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-2.240000247955322 - r-7 ,
+#2970 r-9.510564804077148 * r-8 + r-8.520000457763672 - r-6 ,
+#2975 0$ r10 ) r-10 * r-10 + r-5.340000152587891 - r-5 ,
+#2980 1! 0" 0% 0& 1' r-9.510564804077148 * r-8 + r-6.860000133514404 - r-4 ,
+#2985 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r3.619999885559082 - r-3 ,
+#2990 r-5.877852439880371 * r-4 + r-0.1400003433227539 - r-2 ,
+#2995 r-3.090169906616211 * r-2 + r-2.840000152587891 - r-1 ,
+#3000 0! 0" 0# 0$ 0% 0& 0' r-10 ) r6.862974002031647e-14 * r4.369105039781288e-14 + r-4.599999904632568 - r0 ,
+#3005 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r3.979999542236328 - r1 ,
+#3010 r5.877852439880371 * r4 + r-1.659999847412109 - r2 ,
+#3015 0% r8.090169906616211 * r6 + r6.779998779296875 - r3 ,
+#3020 1! 0" 0# 1$ 1% 0& 0' r9.510564804077148 * r8 + r1.380000114440918 - r4 ,
+#3025 1" 1# 1& 1' r10 ) r10 * r10 + r-2.740000247955322 - r5 ,
+#3030 r9.510564804077148 * r8 + r2.439999580383301 - r6 ,
+#3035 r8.090169906616211 * r6 + r5.880000114440918 - r7 ,
+#3040 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r-6.539999961853027 - r8 ,
+#3045 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r6.940000534057617 - r9 ,
+#3050 r-10 ) r3.917631735510241e-14 * r2.494041926378188e-14 + r-1.380000114440918 - r-10 ,
+#3055 r-3.090169906616211 * r-2 + r-0.7600002288818359 - r-9 ,
+#3060 1! 0" 0# 0$ 0% 0& 1' r-5.877852439880371 * r-4 + r3.639999389648438 - r-8 ,
+#3065 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r-2.200000286102295 - r-7 ,
+#3070 r-9.510564804077148 * r-8 + r-4.160000324249268 - r-6 ,
+#3075 r10 ) r-10 * r-10 + r5.819999694824219 - r-5 ,
+#3080 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r-8.859999656677246 - r-4 ,
+#3085 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-7.699999809265137 - r-3 ,
+#3090 0# 1$ 0% r-5.877852439880371 * r-4 + r0.4200000762939453 - r-2 ,
+#3095 0" 1# 1% 0& r-3.090169906616211 * r-2 + r-6.860000133514404 - r-1 ,
+#3100 0! 1" 1& 0' r-10 ) r-1.469823747305213e-13 * r-9.357188553724485e-14 + r1.479999542236328 - r0 ,
+#3105 1! 1' r3.090169906616211 * r2 + r-0.1800003051757812 - r1 ,
+#3110 r5.877852439880371 * r4 + r8.939998626708984 - r2 ,
+#3115 r8.090169906616211 * r6 + r9.020000457763672 - r3 ,
+#3120 r9.510564804077148 * r8 + r-5.380000114440918 - r4 ,
+#3125 r10 ) r10 * r10 + r-9.579999923706055 - r5 ,
+#3130 r9.510564804077148 * r8 + r0.7399997711181641 - r6 ,
+#3135 r8.090169906616211 * r6 + r4.799999237060547 - r7 ,
+#3140 r5.877852439880371 * r4 + r-8.920000076293945 - r8 ,
+#3145 r3.090169906616211 * r2 + r-9.399999618530273 - r9 ,
+#3150 r-10 ) r-2.942866219809992e-14 * r-1.873486785088259e-14 + r-8.039999961853027 - r-10 ,
+#3155 r-3.090169906616211 * r-2 + r-3.5 - r-9 ,
+#3160 0! 0" 0# 0$ 0% 0' r-5.877852439880371 * r-4 + r-8.380000114440918 - r-8 ,
+#3165 r-8.090169906616211 * r-6 + r0.3199996948242188 - r-7 ,
+#3170 1! 1" 1# 1$ 1% 1' r-9.510564804077148 * r-8 + r-6 ,
+#3175 r10 ) r-10 * r-10 + r-9.960000038146973 - r-5 ,
+#3180 r-9.510564804077148 * r-8 + r-5.380000114440918 - r-4 ,
+#3185 r-8.090169906616211 * r-6 + r-7.220000267028809 - r-3 ,
+#3190 r-5.877852439880371 * r-4 + r5.920000076293945 - r-2 ,
+#3195 r-3.090169906616211 * r-2 + r-1.920000076293945 - r-1 ,
+#3200 0" 0# 0& r-10 ) r2.058396991267211e-13 * r1.3104162123901e-13 + r-3.240000247955322 - r0 ,
+#3205 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r1.59999942779541 - r1 ,
+#3210 r5.877852439880371 * r4 + r-5.639999866485596 - r2 ,
+#3215 r8.090169906616211 * r6 + r-9.579999923706055 - r3 ,
+#3220 1! 0" 1$ 0% 0& 1' r9.510564804077148 * r8 + r9.399999618530273 - r4 ,
+#3225 1" 1% 1& r10 ) r10 * r10 + r7.239999771118164 - r5 ,
+#3230 r9.510564804077148 * r8 + r6.239999771118164 - r6 ,
+#3235 r8.090169906616211 * r6 + r-2.420000076293945 - r7 ,
+#3240 0! 0' r5.877852439880371 * r4 + r9.539999008178711 - r8 ,
+#3245 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r3.699999809265137 - r9 ,
+#3250 r-10 ) r1.861834525527378e-13 * r1.185280714723069e-13 + r0.7199993133544922 - r-10 ,
+#3255 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r8.079999923706055 - r-9 ,
+#3260 1! 1' r-5.877852439880371 * r-4 + r-6.480000019073486 - r-8 ,
+#3265 r-8.090169906616211 * r-6 + r-0.3400001525878906 - r-7 ,
+#3270 r-9.510564804077148 * r-8 + r-5.860000133514404 - r-6 ,
+#3275 r10 ) r-10 * r-10 + r5.179999351501465 - r-5 ,
+#3280 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r7.139999389648438 - r-4 ,
+#3285 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r4.880000114440918 - r-3 ,
+#3290 r-5.877852439880371 * r-4 + r-0.02000045776367188 - r-2 ,
+#3295 0$ r-3.090169906616211 * r-2 + r8.219999313354492 - r-1 ,
+#3300 1! 0" 0% 0& 1' r-10 ) r-9.772414777083679e-15 * r-6.221312578465329e-15 + r-7.460000038146973 - r0 ,
+#3305 1" 1$ 1% 1& r3.090169906616211 * r2 + r9 - r1 ,
+#3310 r5.877852439880371 * r4 + r-5.28000020980835 - r2 ,
+#3315 r8.090169906616211 * r6 + r1.199999809265137 - r3 ,
+#3320 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r6.35999870300293 - r4 ,
+#3325 1" 1# 1% 1& 1' r10 ) r10 * r10 + r-7.900000095367432 - r5 ,
+#3330 r9.510564804077148 * r8 + r1.25999927520752 - r6 ,
+#3335 0% r8.090169906616211 * r6 + r-9.020000457763672 - r7 ,
+#3340 1! 0" 0# 1$ 1% 0& 0' r5.877852439880371 * r4 + r-5.119999885559082 - r8 ,
+#3345 1" 1# 1& 1' r3.090169906616211 * r2 + r4.219999313354492 - r9 ,
+#3350 r-10 ) r-1.666386213045046e-13 * r-1.060854420802115e-13 + r6.100000381469727 - r-10 ,
+#3355 r-3.090169906616211 * r-2 + r8.680000305175781 - r-9 ,
+#3360 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r-4.180000305175781 - r-8 ,
+#3365 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-2.5 - r-7 ,
+#3370 r-9.510564804077148 * r-8 + r9.100000381469727 - r-6 ,
+#3375 r10 ) r-10 * r-10 + r2.279999732971191 - r-5 ,
+#3380 1! 0" 0# 0$ 0% 0& 1' r-9.510564804077148 * r-8 + r1.779999732971191 - r-4 ,
+#3385 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r5.359999656677246 - r-3 ,
+#3390 r-5.877852439880371 * r-4 + r9.85999870300293 - r-2 ,
+#3395 r-3.090169906616211 * r-2 + r8.35999870300293 - r-1 ,
+#3400 0! 0" 0# 0$ 0% 0& 0' r-10 ) r-2.253845303749544e-13 * r-1.434842506311054e-13 + r6.100000381469727 - r0 ,
+#3405 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r7.639999389648438 - r1 ,
+#3410 0# 1$ 0% r5.877852439880371 * r4 + r6.440000534057617 - r2 ,
+#3415 0" 1# 1% 0& r8.090169906616211 * r6 + r9.639999389648438 - r3 ,
+#3420 0! 1" 1& 0' r9.510564804077148 * r8 + r4.340000152587891 - r4 ,
+#3425 1! 1' r10 ) r10 * r10 + r-9.399999618530273 - r5 ,
+#3430 r9.510564804077148 * r8 + r-8.140000343322754 - r6 ,
+#3435 r8.090169906616211 * r6 + r1.479999542236328 - r7 ,
+#3440 r5.877852439880371 * r4 + r-7.480000019073486 - r8 ,
+#3445 r3.090169906616211 * r2 + r1.859999656677246 - r9 ,
+#3450 r-10 ) r4.897349344633317e-14 * r3.117749385484619e-14 + r-0.2800006866455078 - r-10 ,
+#3455 r-3.090169906616211 * r-2 + r-4.940000057220459 - r-9 ,
+#3460 r-5.877852439880371 * r-4 + r0.8599996566772461 - r-8 ,
+#3465 r-8.090169906616211 * r-6 + r-8.520000457763672 - r-7 ,
+#3470 r-9.510564804077148 * r-8 + r6.279998779296875 - r-6 ,
+#3475 r10 ) r-10 * r-10 + r4.25999927520752 - r-5 ,
+#3480 0! 0" 0# 0$ 0% 0' r-9.510564804077148 * r-8 + r-6.420000076293945 - r-4 ,
+#3485 r-8.090169906616211 * r-6 + r-2.460000038146973 - r-3 ,
+#3490 1! 1" 1# 1$ 1% 1' r-5.877852439880371 * r-4 + r5.239999771118164 - r-2 ,
+#3495 r-3.090169906616211 * r-2 + r5.5 - r-1 ,
+#3500 r-10 ) r1.27437543482288e-13 * r8.112926292141304e-14 + r-8.239999771118164 - r0 ,
+#3505 r3.090169906616211 * r2 + r8.379999160766602 - r1 ,
+#3510 r5.877852439880371 * r4 + r4.199999809265137 - r2 ,
+#3515 r8.090169906616211 * r6 + r4.639999389648438 - r3 ,
+#3520 0" 0# 0& r9.510564804077148 * r8 + r-4.12000036239624 - r4 ,
+#3525 0! 1" 1# 0$ 1& 0' r10 ) r10 * r10 + r-9.659999847412109 - r5 ,
+#3530 r9.510564804077148 * r8 + r-3.079999923706055 - r6 ,
+#3535 r8.090169906616211 * r6 + r-5.300000190734863 - r7 ,
+#3540 1! 0" 1$ 0% 0& 1' r5.877852439880371 * r4 + r-7.260000228881836 - r8 ,
+#3545 1" 1% 1& r3.090169906616211 * r2 + r3.819999694824219 - r9 ,
+#3550 r-10 ) r-1.963148780093505e-14 * r-1.249779325981828e-14 + r-6.940000057220459 - r-10 ,
+#3555 r-3.090169906616211 * r-2 + r8.85999870300293 - r-9 ,
+#3560 0! 0' r-5.877852439880371 * r-4 + r1.460000038146973 - r-8 ,
+#3565 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r-3.440000057220459 - r-7 ,
+#3570 r-9.510564804077148 * r-8 + r8.5 - r-6 ,
+#3575 1" 1# 1$ 1% 1& r10 ) r-10 * r-10 + r-4.180000305175781 - r-5 ,
+#3580 1! 1' r-9.510564804077148 * r-8 + r4.199999809265137 - r-4 ,
+#3585 r-8.090169906616211 * r-6 + r-9.640000343322754 - r-3 ,
+#3590 r-5.877852439880371 * r-4 + r-5.660000324249268 - r-2 ,
+#3595 r-3.090169906616211 * r-2 + r6.719999313354492 - r-1 ,
+#3600 0" 0# 0$ 0% 0& r-10 ) r-8.817457126854972e-14 * r-5.613367301364469e-14 + r9.260000228881836 - r0 ,
+#3605 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r-8.899999618530273 - r1 ,
+#3610 r5.877852439880371 * r4 + r-8.199999809265137 - r2 ,
+#3615 0$ r8.090169906616211 * r6 + r7.159999847412109 - r3 ,
+#3620 1! 0" 0% 0& 1' r9.510564804077148 * r8 + r-7.400000095367432 - r4 ,
+#3625 1" 1$ 1% 1& r10 ) r10 * r10 + r8.079999923706055 - r5 ,
+#3630 r9.510564804077148 * r8 + r1.420000076293945 - r6 ,
+#3635 r8.090169906616211 * r6 + r3.219999313354492 - r7 ,
+#3640 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r2.659999847412109 - r8 ,
+#3645 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r3.699999809265137 - r9 ,
+#3650 r-10 ) r-8.823646566007148e-14 * r-5.617308037448275e-14 + r5.779999732971191 - r-10 ,
+#3655 0% r-3.090169906616211 * r-2 + r-8.539999961853027 - r-9 ,
+#3660 1! 0" 0# 1$ 1% 0& 0' r-5.877852439880371 * r-4 + r2.079999923706055 - r-8 ,
+#3665 1" 1# 1& 1' r-8.090169906616211 * r-6 + r7.020000457763672 - r-7 ,
+#3670 r-9.510564804077148 * r-8 + r6.100000381469727 - r-6 ,
+#3675 r10 ) r-10 * r-10 + r-5 - r-5 ,
+#3680 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r7.35999870300293 - r-4 ,
+#3685 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r0.05999946594238281 - r-3 ,
+#3690 r-5.877852439880371 * r-4 + r-0.3000001907348633 - r-2 ,
+#3695 r-3.090169906616211 * r-2 + r-9.880000114440918 - r-1 ,
+#3700 1! 0" 0# 0$ 0% 0& 1' r-10 ) r-1.95695900212815e-14 * r-1.245838759304611e-14 + r-6.100000381469727 - r0 ,
+#3705 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r2.779999732971191 - r1 ,
+#3710 r5.877852439880371 * r4 + r8.979999542236328 - r2 ,
+#3715 r8.090169906616211 * r6 + r-7.600000381469727 - r3 ,
+#3720 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r9.340000152587891 - r4 ,
+#3725 1! 1" 1# 1% 1& 1' r10 ) r10 * r10 + r-5.480000019073486 - r5 ,
+#3730 0# 1$ 0% r9.510564804077148 * r8 + r5.25999927520752 - r6 ,
+#3735 0" 1# 1% 0& r8.090169906616211 * r6 + r3.539999961853027 - r7 ,
+#3740 0! 1" 1& 0' r5.877852439880371 * r4 + r1.920000076293945 - r8 ,
+#3745 1! 1' r3.090169906616211 * r2 + r9.619998931884766 - r9 ,
+#3750 r-10 ) r1.273756490907663e-13 * r8.108985217244319e-14 + r7.299999237060547 - r-10 ,
+#3755 r-3.090169906616211 * r-2 + r1.199999809265137 - r-9 ,
+#3760 r-5.877852439880371 * r-4 + r-9.279999732971191 - r-8 ,
+#3765 r-8.090169906616211 * r-6 + r9.100000381469727 - r-7 ,
+#3770 r-9.510564804077148 * r-8 + r5.399999618530273 - r-6 ,
+#3775 r10 ) r-10 * r-10 + r0.3599996566772461 - r-5 ,
+#3780 r-9.510564804077148 * r-8 + r-5.78000020980835 - r-4 ,
+#3785 r-8.090169906616211 * r-6 + r-3.160000324249268 - r-3 ,
+#3790 r-5.877852439880371 * r-4 + r0.6399993896484375 - r-2 ,
+#3795 r-3.090169906616211 * r-2 + r-6.079999923706055 - r-1 ,
+#3800 0! 0" 0# 0$ 0% 0' r-10 ) r4.903539122598673e-14 * r3.121689782755246e-14 + r-2.420000076293945 - r0 ,
+#3805 r3.090169906616211 * r2 + r-3.579999923706055 - r1 ,
+#3810 1! 1" 1# 1$ 1% 1' r5.877852439880371 * r4 + r-4.599999904632568 - r2 ,
+#3815 r8.090169906616211 * r6 + r9.680000305175781 - r3 ,
+#3820 r9.510564804077148 * r8 + r-6.560000419616699 - r4 ,
+#3825 r10 ) r10 * r10 + r-1.460000038146973 - r5 ,
+#3830 r9.510564804077148 * r8 + r-5.320000171661377 - r6 ,
+#3835 r8.090169906616211 * r6 + r-9.199999809265137 - r7 ,
+#3840 0" 0# 0& r5.877852439880371 * r4 + r-4.340000152587891 - r8 ,
+#3845 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r-8.560000419616699 - r9 ,
+#3850 r-10 ) r5.877066953756394e-14 * r3.74145701399764e-14 + r-2.039999961853027 - r-10 ,
+#3855 r-3.090169906616211 * r-2 + r6.600000381469727 - r-9 ,
+#3860 1! 0" 1$ 0% 0& 1' r-5.877852439880371 * r-4 + r-8.739999771118164 - r-8 ,
+#3865 1" 1% 1& r-8.090169906616211 * r-6 + r-3.059999942779541 - r-7 ,
+#3870 r-9.510564804077148 * r-8 + r9 - r-6 ,
+#3875 r10 ) r-10 * r-10 + r-9.399999618530273 - r-5 ,
+#3880 0! 0' r-9.510564804077148 * r-8 + r1.460000038146973 - r-4 ,
+#3885 0" 0# 0$ 0% 0& r-8.090169906616211 * r-6 + r4.279999732971191 - r-3 ,
+#3890 r-5.877852439880371 * r-4 + r-8.819999694824219 - r-2 ,
+#3895 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r0.4399995803833008 - r-1 ,
+#3900 1! 1' r-10 ) r-1.665767269129828e-13 * r-1.060460381075053e-13 + r-9.060000419616699 - r0 ,
+#3905 r3.090169906616211 * r2 + r8.479999542236328 - r1 ,
+#3910 r5.877852439880371 * r4 + r-8.359999656677246 - r2 ,
+#3915 r8.090169906616211 * r6 + r-1.300000190734863 - r3 ,
+#3920 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r-5.360000133514404 - r4 ,
+#3925 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r-5.920000076293945 - r5 ,
+#3930 r9.510564804077148 * r8 + r9.079999923706055 - r6 ,
+#3935 0$ r8.090169906616211 * r6 + r-1.140000343322754 - r7 ,
+#3940 1! 0" 0% 0& 1' r5.877852439880371 * r4 + r7.959999084472656 - r8 ,
+#3945 1" 1$ 1% 1& r3.090169906616211 * r2 + r-0.2800006866455078 - r9 ,
+#3950 r-10 ) r-2.940514043196785e-13 * r-1.871989434125421e-13 + r2.799999237060547 - r-10 ,
+#3955 r-3.090169906616211 * r-2 + r-4.440000057220459 - r-9 ,
+#3960 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r-6.820000171661377 - r-8 ,
+#3965 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-4.760000228881836 - r-7 ,
+#3970 r-9.510564804077148 * r-8 + r-6 ,
+#3975 0% r10 ) r-10 * r-10 + r3.659999847412109 - r-5 ,
+#3980 1! 0" 0# 1$ 1% 0& 0' r-9.510564804077148 * r-8 + r-9.180000305175781 - r-4 ,
+#3985 1" 1# 1& 1' r-8.090169906616211 * r-6 + r6.959999084472656 - r-3 ,
+#3990 r-5.877852439880371 * r-4 + r4.460000038146973 - r-2 ,
+#3995 r-3.090169906616211 * r-2 + r-3.519999980926514 - r-1 ,
+#4000 0" 0# 0$ 0% 0& r-10 ) r-9.79717405835169e-14 * r-6.23707492987749e-14 + r-4.559999942779541 - r0 ,
+#4005 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r-7.559999942779541 - r1 ,
+#4010 r5.877852439880371 * r4 + r-6.920000076293945 - r2 ,
+#4015 r8.090169906616211 * r6 + r-3.300000190734863 - r3 ,
+#4020 1! 0" 0# 0$ 0% 0& 1' r9.510564804077148 * r8 + r6.420000076293945 - r4 ,
+#4025 1" 1# 1$ 1% 1& r10 ) r10 * r10 + r-0.8600006103515625 - r5 ,
+#4030 r9.510564804077148 * r8 + r-2.700000286102295 - r6 ,
+#4035 r8.090169906616211 * r6 + r4.939999580383301 - r7 ,
+#4040 0! 0" 0# 0$ 0% 0& 0' r5.877852439880371 * r4 + r-6.579999923706055 - r8 ,
+#4045 1! 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r5.519999504089355 - r9 ,
+#4050 0# 1$ 0% r-10 ) r2.057778047351994e-13 * r1.310022104900402e-13 + r-4.619999885559082 - r-10 ,
+#4055 0" 1# 1% 0& r-3.090169906616211 * r-2 + r-5.639999866485596 - r-9 ,
+#4060 0! 1" 1& 0' r-5.877852439880371 * r-4 + r4.019999504089355 - r-8 ,
+#4065 1! 1' r-8.090169906616211 * r-6 + r4.059999465942383 - r-7 ,
+#4070 r-9.510564804077148 * r-8 + r3.059999465942383 - r-6 ,
+#4075 r10 ) r-10 * r-10 + r8.659999847412109 - r-5 ,
+#4080 r-9.510564804077148 * r-8 + r8.139999389648438 - r-4 ,
+#4085 r-8.090169906616211 * r-6 + r9.180000305175781 - r-3 ,
+#4090 r-5.877852439880371 * r-4 + r4.559999465942383 - r-2 ,
+#4095 r-3.090169906616211 * r-2 + r6.119998931884766 - r-1 ,
+#4100 r-10 ) r2.548503400499891e-13 * r1.622427642537436e-13 + r5.939999580383301 - r0 ,
+#4105 r3.090169906616211 * r2 + r4.399999618530273 - r1 ,
+#4110 r5.877852439880371 * r4 + r-8.319999694824219 - r2 ,
+#4115 r8.090169906616211 * r6 + r-3.840000152587891 - r3 ,
+#4120 0! 0" 0# 0$ 0% 0' r9.510564804077148 * r8 + r-3.320000171661377 - r4 ,
+#4125 r10 ) r10 * r10 + r3.960000038146973 - r5 ,
+#4130 1! 1" 1# 1$ 1% 1' r9.510564804077148 * r8 + r9.819999694824219 - r6 ,
+#4135 r8.090169906616211 * r6 + r-2.480000019073486 - r7 ,
+#4140 r5.877852439880371 * r4 + r7.959999084472656 - r8 ,
+#4145 r3.090169906616211 * r2 + r4.299999237060547 - r9 ,
+#4150 r-10 ) r-1.47044269122043e-13 * r-9.361128950995112e-14 + r-8.960000038146973 - r-10 ,
+#4155 r-3.090169906616211 * r-2 + r-6.579999923706055 - r-9 ,
+#4160 0" 0# 0& r-5.877852439880371 * r-4 + r-6.220000267028809 - r-8 ,
+#4165 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r1.179999351501465 - r-7 ,
+#4170 r-9.510564804077148 * r-8 + r0.119999885559082 - r-6 ,
+#4175 r10 ) r-10 * r-10 + r-9.800000190734863 - r-5 ,
+#4180 1! 0" 1$ 0% 0& 1' r-9.510564804077148 * r-8 + r-9.680000305175781 - r-4 ,
+#4185 1" 1% 1& r-8.090169906616211 * r-6 + r-5.519999980926514 - r-3 ,
+#4190 r-5.877852439880371 * r-4 + r-7.819999694824219 - r-2 ,
+#4195 r-3.090169906616211 * r-2 + r0.7799997329711914 - r-1 ,
+#4200 0! 0' r-10 ) r3.923821513475596e-14 * r2.497982493055405e-14 + r-10 - r0 ,
+#4205 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r-2.440000057220459 - r1 ,
+#4210 r5.877852439880371 * r4 + r-7.819999694824219 - r2 ,
+#4215 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r-8.940000534057617 - r3 ,
+#4220 1! 1' r9.510564804077148 * r8 + r-8.380000114440918 - r4 ,
+#4225 r10 ) r10 * r10 + r-7.720000267028809 - r5 ,
+#4230 r9.510564804077148 * r8 + r-3.240000247955322 - r6 ,
+#4235 r8.090169906616211 * r6 + r9.779998779296875 - r7 ,
+#4240 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r-1.480000495910645 - r8 ,
+#4245 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r-8.659999847412109 - r9 ,
+#4250 r-10 ) r6.856783885253112e-14 * r4.365164303697482e-14 + r-7.060000419616699 - r-10 ,
+#4255 0$ r-3.090169906616211 * r-2 + r-5.539999961853027 - r-9 ,
+#4260 1! 0" 0% 0& 1' r-5.877852439880371 * r-4 + r5.739999771118164 - r-8 ,
+#4265 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r-5.380000114440918 - r-7 ,
+#4270 r-9.510564804077148 * r-8 + r0.6399993896484375 - r-6 ,
+#4275 r10 ) r-10 * r-10 + r-7.559999942779541 - r-5 ,
+#4280 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r-4.380000114440918 - r-4 ,
+#4285 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r7.5 - r-3 ,
+#4290 r-5.877852439880371 * r-4 + r7 - r-2 ,
+#4295 0% r-3.090169906616211 * r-2 + r-6.420000076293945 - r-1 ,
+#4300 1! 0" 0# 1$ 1% 0& 0' r-10 ) r-1.763739030042136e-13 * r-1.122831076163719e-13 + r1.800000190734863 - r0 ,
+#4305 1" 1# 1& 1' r3.090169906616211 * r2 + r-4.920000076293945 - r1 ,
+#4310 r5.877852439880371 * r4 + r-3 - r2 ,
+#4315 r8.090169906616211 * r6 + r-7.380000114440918 - r3 ,
+#4320 0" 0# 0$ 0% 0& r9.510564804077148 * r8 + r6.260000228881836 - r4 ,
+#4325 0! 1" 1# 1$ 1% 1& 0' r10 ) r10 * r10 + r7.139999389648438 - r5 ,
+#4330 r9.510564804077148 * r8 + r-0.119999885559082 - r6 ,
+#4335 r8.090169906616211 * r6 + r-6.380000114440918 - r7 ,
+#4340 1! 0" 0# 0$ 0% 0& 1' r5.877852439880371 * r4 + r-8.380000114440918 - r8 ,
+#4345 1" 1# 1$ 1% 1& r3.090169906616211 * r2 + r2.059999465942383 - r9 ,
+#4350 r-10 ) r2.841799603796324e-13 * r1.809145823601643e-13 + r4.399999618530273 - r-10 ,
+#4355 r-3.090169906616211 * r-2 + r-1.340000152587891 - r-9 ,
+#4360 0! 0" 0# 0$ 0% 0& 0' r-5.877852439880371 * r-4 + r9.639999389648438 - r-8 ,
+#4365 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r-6.380000114440918 - r-7 ,
+#4370 0# 1$ 0% r-9.510564804077148 * r-8 + r-0.2600002288818359 - r-6 ,
+#4375 0" 1# 1% 0& r10 ) r-10 * r-10 + r-1.699999809265137 - r-5 ,
+#4380 0! 1" 1& 0' r-9.510564804077148 * r-8 + r-4.079999923706055 - r-4 ,
+#4385 1! 1' r-8.090169906616211 * r-6 + r6.5 - r-3 ,
+#4390 r-5.877852439880371 * r-4 + r-1.920000076293945 - r-2 ,
+#4395 r-3.090169906616211 * r-2 + r4.439999580383301 - r-1 ,
+#4400 r-10 ) r1.764481708530288e-13 * r1.12330399159883e-13 + r7.840000152587891 - r0 ,
+#4405 r3.090169906616211 * r2 + r1.019999504089355 - r1 ,
+#4410 r5.877852439880371 * r4 + r-4.059999942779541 - r2 ,
+#4415 r8.090169906616211 * r6 + r-9.359999656677246 - r3 ,
+#4420 r9.510564804077148 * r8 + r-7.320000171661377 - r4 ,
+#4425 r10 ) r10 * r10 + r-6.380000114440918 - r5 ,
+#4430 r9.510564804077148 * r8 + r0.119999885559082 - r6 ,
+#4435 r8.090169906616211 * r6 + r-1.699999809265137 - r7 ,
+#4440 0! 0" 0# 0$ 0% 0' r5.877852439880371 * r4 + r-8.859999656677246 - r8 ,
+#4445 r3.090169906616211 * r2 + r4.159999847412109 - r9 ,
+#4450 1! 1" 1# 1$ 1% 1' r-10 ) r-6.864212025387353e-14 * r-4.369893119235413e-14 + r1.899999618530273 - r-10 ,
+#4455 r-3.090169906616211 * r-2 + r9.979999542236328 - r-9 ,
+#4460 r-5.877852439880371 * r-4 + r9.239999771118164 - r-8 ,
+#4465 r-8.090169906616211 * r-6 + r-4.059999942779541 - r-7 ,
+#4470 r-9.510564804077148 * r-8 + r-0.3400001525878906 - r-6 ,
+#4475 r10 ) r-10 * r-10 + r5.519999504089355 - r-5 ,
+#4480 0" 0# 0& r-9.510564804077148 * r-8 + r-6.920000076293945 - r-4 ,
+#4485 0! 1" 1# 0$ 1& 0' r-8.090169906616211 * r-6 + r9.539999008178711 - r-3 ,
+#4490 r-5.877852439880371 * r-4 + r-3.820000171661377 - r-2 ,
+#4495 r-3.090169906616211 * r-2 + r1.739999771118164 - r-1 ,
+#4500 1! 0" 1$ 0% 0& 1' r-10 ) r-3.916393712154534e-14 * r-2.493253677517474e-14 + r8.639999389648438 - r0 ,
+#4505 1" 1% 1& r3.090169906616211 * r2 + r-2.360000133514404 - r1 ,
+#4510 r5.877852439880371 * r4 + r-9.579999923706055 - r2 ,
+#4515 r8.090169906616211 * r6 + r-4.680000305175781 - r3 ,
+#4520 0! 0' r9.510564804077148 * r8 + r1.25999927520752 - r4 ,
+#4525 0" 0# 0$ 0% 0& r10 ) r10 * r10 + r7.19999885559082 - r5 ,
+#4530 r9.510564804077148 * r8 + r3.639999389648438 - r6 ,
+#4535 1" 1# 1$ 1% 1& r8.090169906616211 * r6 + r-5.78000020980835 - r7 ,
+#4540 1! 1' r5.877852439880371 * r4 + r3.699999809265137 - r8 ,
+#4545 r3.090169906616211 * r2 + r-8.279999732971191 - r9 ,
+#4550 r-10 ) r1.469700012732278e-13 * r9.35640047427036e-14 + r-4.300000190734863 - r-10 ,
+#4555 r-3.090169906616211 * r-2 + r8.600000381469727 - r-9 ,
+#4560 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r9.799999237060547 - r-8 ,
+#4565 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r1.659999847412109 - r-7 ,
+#4570 r-9.510564804077148 * r-8 + r-3.720000267028809 - r-6 ,
+#4575 0$ r10 ) r-10 * r-10 + r-0.4800004959106445 - r-5 ,
+#4580 1! 0" 0% 0& 1' r-9.510564804077148 * r-8 + r-7.680000305175781 - r-4 ,
+#4585 1" 1$ 1% 1& r-8.090169906616211 * r-6 + r6.399999618530273 - r-3 ,
+#4590 r-5.877852439880371 * r-4 + r7.840000152587891 - r-2 ,
+#4595 r-3.090169906616211 * r-2 + r0.5 - r-1 ,
+#4600 0! 0" 0# 0$ 0% 0& 0' r-10 ) r-2.547760450961195e-13 * r-1.621954659339689e-13 + r0.5599994659423828 - r0 ,
+#4605 1" 1# 1% 1& 1' r3.090169906616211 * r2 + r6.779998779296875 - r1 ,
+#4610 r5.877852439880371 * r4 + r0.5 - r2 ,
+#4615 0% r8.090169906616211 * r6 + r-0.1999998092651367 - r3 ,
+#4620 1! 0" 0# 1$ 1% 0& 0' r9.510564804077148 * r8 + r-7.279999732971191 - r4 ,
+#4625 1" 1# 1& 1' r10 ) r10 * r10 + r-2.800000190734863 - r5 ,
+#4630 r9.510564804077148 * r8 + r2.359999656677246 - r6 ,
+#4635 r8.090169906616211 * r6 + r2.859999656677246 - r7 ,
+#4640 0" 0# 0$ 0% 0& r5.877852439880371 * r4 + r-3.260000228881836 - r8 ,
+#4645 0! 1" 1# 1$ 1% 1& 0' r3.090169906616211 * r2 + r8.559999465942383 - r9 ,
+#4650 r-10 ) r3.625821160240655e-13 * r2.308269406777613e-13 + r1.639999389648438 - r10 ,
+#4655 r-3.090169906616211 * r-2 + r2.420000076293945 - r-9 ,
+#4660 1! 0" 0# 0$ 0% 0& 1' r-5.877852439880371 * r-4 + r-3.800000190734863 - r-8 ,
+#4665 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r9.100000381469727 - r-7 ,
+#4670 r-9.510564804077148 * r-8 + r7.760000228881836 - r-6 ,
+#4675 r10 ) r-10 * r-10 + r-5.5 - r-5 ,
+#4680 0! 0" 0# 0$ 0% 0& 0' r-9.510564804077148 * r-8 + r6.299999237060547 - r-4 ,
+#4685 1! 1" 1# 1% 1& 1' r-8.090169906616211 * r-6 + r1.399999618530273 - r-3 ,
+#4690 0# 1$ 0% r-5.877852439880371 * r-4 + r-1.260000228881836 - r-2 ,
+#4695 0" 1# 1% 0& r-3.090169906616211 * r-2 + r7.059999465942383 - r-1 ,
+#4700 0! 1" 1& 0' r-10 ) r9.804602198485932e-14 * r6.241803406602242e-14 + r-9.840000152587891 - r0 ,
+#4705 1! 1' r3.090169906616211 * r2 + r4.439999580383301 - r1 ,
+#4710 r5.877852439880371 * r4 + r5.659999847412109 - r2 ,
+#4715 r8.090169906616211 * r6 + r-3 - r3 ,
+#4720 r9.510564804077148 * r8 + r3.139999389648438 - r4 ,
+#4725 r10 ) r10 * r10 + r-8.060000419616699 - r5 ,
+#4730 r9.510564804077148 * r8 + r6.539999008178711 - r6 ,
+#4735 r8.090169906616211 * r6 + r-7.480000019073486 - r7 ,
+#4740 r5.877852439880371 * r4 + r-4.619999885559082 - r8 ,
+#4745 r3.090169906616211 * r2 + r-8.579999923706055 - r9 ,
+#4750 r-10 ) r9.760035390559557e-15 * r6.213431783924075e-15 + r3.019999504089355 - r-10 ,
+#4755 r-3.090169906616211 * r-2 + r-7.019999980926514 - r-9 ,
+#4760 0! 0" 0# 0$ 0% 0' r-5.877852439880371 * r-4 + r8.19999885559082 - r-8 ,
+#4765 r-8.090169906616211 * r-6 + r0.5599994659423828 - r-7 ,
+#4770 1! 1" 1# 1$ 1% 1' r-9.510564804077148 * r-8 + r2.779999732971191 - r-6 ,
+#4775 r10 ) r-10 * r-10 + r-2.039999961853027 - r-5 ,
+#4780 r-9.510564804077148 * r-8 + r7.760000228881836 - r-4 ,
+#4785 r-8.090169906616211 * r-6 + r2.199999809265137 - r-3 ,
+#4790 r-5.877852439880371 * r-4 + r-2.140000343322754 - r-2 ,
+#4795 r-3.090169906616211 * r-2 + r1.539999961853027 - r-1 ,
+#4800 0" 0# 0& r-10 ) r-1.175660859897149e-13 * r-7.484490186903531e-14 + r7.799999237060547 - r-1.4210854715202e-13 ,
+#4805 0! 1" 1# 0$ 1& 0' r3.090169906616211 * r2 + r9.520000457763672 - r1 ,
+#4810 r5.877852439880371 * r4 + r-6.019999980926514 - r2 ,
+#4815 r8.090169906616211 * r6 + r1.039999961853027 - r3 ,
+#4820 1! 0" 1$ 0% 0& 1' r9.510564804077148 * r8 + r8.619998931884766 - r4 ,
+#4825 1" 1% 1& r10 ) r10 * r10 + r-8.260000228881836 - r5 ,
+#4830 r9.510564804077148 * r8 + r5.539999961853027 - r6 ,
+#4835 r8.090169906616211 * r6 + r-8.020000457763672 - r7 ,
+#4840 0! 0' r5.877852439880371 * r4 + r3.139999389648438 - r8 ,
+#4845 0" 0# 0$ 0% 0& r3.090169906616211 * r2 + r1.319999694824219 - r9 ,
+#4850 r-10 ) r2.253721433651337e-13 * r1.434763630603006e-13 + r9.039999008178711 - r-10 ,
+#4855 1" 1# 1$ 1% 1& r-3.090169906616211 * r-2 + r-9.659999847412109 - r-9 ,
+#4860 1! 1' r-5.877852439880371 * r-4 + r2.819999694824219 - r-8 ,
+#4865 r-8.090169906616211 * r-6 + r4.699999809265137 - r-7 ,
+#4870 r-9.510564804077148 * r-8 + r-2.640000343322754 - r-6 ,
+#4875 r10 ) r-10 * r-10 + r-4.039999961853027 - r-5 ,
+#4880 0" 0# 0$ 0% 0& r-9.510564804077148 * r-8 + r-6.320000171661377 - r-4 ,
+#4885 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-6.100000381469727 - r-3 ,
+#4890 r-5.877852439880371 * r-4 + r5.519999504089355 - r-2 ,
+#4895 0$ r-3.090169906616211 * r-2 + r6.100000381469727 - r-1 ,
+#4900 1! 0" 0% 0& 1' r-10 ) r-3.331782007405526e-13 * r-2.12107837804093e-13 + r-4.680000305175781 - r0 ,
+#4905 1" 1$ 1% 1& r3.090169906616211 * r2 + r-1.440000534057617 - r1 ,
+#4910 r5.877852439880371 * r4 + r9.079999923706055 - r2 ,
+#4915 r8.090169906616211 * r6 + r0.5599994659423828 - r3 ,
+#4920 0! 0" 0# 0$ 0% 0& 0' r9.510564804077148 * r8 + r-3.840000152587891 - r4 ,
+#4925 1" 1# 1% 1& 1' r10 ) r10 * r10 + r1.859999656677246 - r5 ,
+#4930 r9.510564804077148 * r8 + r-4.440000057220459 - r6 ,
+#4935 0% r8.090169906616211 * r6 + r-6.060000419616699 - r7 ,
+#4940 1! 0" 0# 1$ 1% 0& 0' r5.877852439880371 * r4 + r1.09999942779541 - r8 ,
+#4945 1" 1# 1& 1' r3.090169906616211 * r2 + r3.439999580383301 - r9 ,
+#4950 r-10 ) r-1.274499304921087e-13 * r-8.113714371595429e-14 + r5.479999542236328 - r-10 ,
+#4955 r-3.090169906616211 * r-2 + r-1.100000381469727 - r-9 ,
+#4960 0" 0# 0$ 0% 0& r-5.877852439880371 * r-4 + r-10 - r-8 ,
+#4965 0! 1" 1# 1$ 1% 1& 0' r-8.090169906616211 * r-6 + r-3.5 - r-7 ,
+#4970 r-9.510564804077148 * r-8 + r9.939998626708984 - r-6 ,
+#4975 r10 ) r-10 * r-10 + r-4.340000152587891 - r-5 ,
+#4980 1! 0" 0# 0$ 0% 0& 1' r-9.510564804077148 * r-8 + r-1.760000228881836 - r-4 ,
+#4985 1" 1# 1$ 1% 1& r-8.090169906616211 * r-6 + r-7.460000038146973 - r-3 ,
+#4990 r-5.877852439880371 * r-4 + r-2.360000133514404 - r-2 ,
+#4995 r-3.090169906616211 * r-2 + r-1.579999923706055 - r-1 ,
+#5000
+

diff --git a/misc/vcd/vectors-integers.vcd b/misc/vcd/vectors-integers.vcd
new file mode 100644 (file)
index 0000000..7280a7c
--- /dev/null
+++ b/misc/vcd/vectors-integers.vcd
@@ -0,0 +1,1162 @@
+$comment
+       provided by user Cerpin via IRC on 2019-10-27
+         per download link http://0x0.st/zYZS.vcd
+       demonstrates: bit vectors, multi-bit integers,
+         nested modules, identical names for several VCD
+         variables, results in some 520 sigrok channels
+$end
+$date
+       Sat Oct 26 18:25:04 2019
+$end
+$version
+       Icarus Verilog
+$end
+$timescale
+       1s
+$end
+$scope module tb_uwam_psf2 $end
+$var wire 80 ! tssamp_o [79:0] $end
+$var reg 1 " bit_i $end
+$var reg 1 # clk_i $end
+$var reg 1 $ rst_i $end
+$var integer 32 % i [31:0] $end
+$scope module dut $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 80 & tssamp_o [79:0] $end
+$var reg 6 ' period_count [5:0] $end
+$var integer 32 ( i [31:0] $end
+$scope begin cmpacc[0] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 ) tap_i [7:0] $end
+$var wire 8 * tapcoeff_i [7:0] $end
+$var reg 8 + samp [7:0] $end
+$var reg 8 , tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[1] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 - tap_i [7:0] $end
+$var wire 8 . tapcoeff_i [7:0] $end
+$var reg 8 / samp [7:0] $end
+$var reg 8 0 tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[2] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 1 tap_i [7:0] $end
+$var wire 8 2 tapcoeff_i [7:0] $end
+$var reg 8 3 samp [7:0] $end
+$var reg 8 4 tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[3] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 5 tap_i [7:0] $end
+$var wire 8 6 tapcoeff_i [7:0] $end
+$var reg 8 7 samp [7:0] $end
+$var reg 8 8 tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[4] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 9 tap_i [7:0] $end
+$var wire 8 : tapcoeff_i [7:0] $end
+$var reg 8 ; samp [7:0] $end
+$var reg 8 < tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[5] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 = tap_i [7:0] $end
+$var wire 8 > tapcoeff_i [7:0] $end
+$var reg 8 ? samp [7:0] $end
+$var reg 8 @ tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[6] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 A tap_i [7:0] $end
+$var wire 8 B tapcoeff_i [7:0] $end
+$var reg 8 C samp [7:0] $end
+$var reg 8 D tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[7] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 E tap_i [7:0] $end
+$var wire 8 F tapcoeff_i [7:0] $end
+$var reg 8 G samp [7:0] $end
+$var reg 8 H tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[8] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 I tap_i [7:0] $end
+$var wire 8 J tapcoeff_i [7:0] $end
+$var reg 8 K samp [7:0] $end
+$var reg 8 L tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$scope begin cmpacc[9] $end
+$scope module psf_node $end
+$var wire 1 " bit_i $end
+$var wire 1 # clk_i $end
+$var wire 1 $ rst_i $end
+$var wire 8 M tap_i [7:0] $end
+$var wire 8 N tapcoeff_i [7:0] $end
+$var reg 8 O samp [7:0] $end
+$var reg 8 P tap_o [7:0] $end
+$upscope $end
+$upscope $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
+bx P
+bx O
+bx N
+b0 M
+bx L
+bx K
+bx J
+b0 I
+bx H
+bx G
+bx F
+b0 E
+bx D
+bx C
+bx B
+b0 A
+bx @
+bx ?
+bx >
+b0 =
+bx <
+bx ;
+bx :
+b0 9
+bx 8
+bx 7
+bx 6
+b0 5
+bx 4
+bx 3
+bx 2
+b0 1
+bx 0
+bx /
+bx .
+b0 -
+bx ,
+bx +
+bx *
+b0 )
+b1010 (
+bx '
+bx &
+bx %
+1$
+0#
+x"
+bx !
+$end
+#2
+b1010 (
+b0 ,
+b0 0
+b0 4
+b0 8
+b0 <
+b0 @
+b0 D
+b0 H
+b0 L
+b0 !
+b0 &
+b0 P
+b100000 '
+1#
+#4
+0#
+#6
+1#
+#8
+b11111110 +
+b11111101 /
+b11111101 3
+b11111101 7
+b11111101 ;
+b11111110 ?
+b11111111 C
+b0 G
+b10000001 K
+b10000001 O
+b1111111 N
+b1111111 J
+b0 F
+b1 B
+b10 >
+b11 :
+b11 6
+b11 2
+b11 .
+b10 *
+b1010 (
+0"
+b0 %
+0$
+0#
+#10
+b11111111 O
+b10000010 G
+b10000100 C
+b10000110 ?
+b10000111 ;
+b10001000 7
+b10000111 3
+b10000110 /
+b10000011 +
+b1 N
+b1 I
+b1111110 F
+b1 E
+b1111100 B
+b1 A
+b1111010 >
+b1 =
+b1111001 :
+b1 9
+b1111000 6
+b1 5
+b1111001 2
+b1 1
+b1111010 .
+b1 -
+b1111101 *
+b1010 (
+b11111110 ,
+b11111101 0
+b11111101 4
+b11111101 8
+b11111101 <
+b11111110 @
+b11111111 D
+b10000001 L
+b10000001100000010000000011111111111111101111110111111101111111011111110111111110 !
+b10000001100000010000000011111111111111101111110111111101111111011111110111111110 &
+b10000001 P
+b10000 '
+1#
+#12
+b1111101 +
+b1111010 /
+b1111001 3
+b1111000 7
+b1111001 ;
+b1111010 ?
+b1111100 C
+b1111110 G
+b1111111 K
+b1 O
+1"
+b1 %
+0#
+#14
+b110 K
+b1100 G
+b10010 C
+b11000 ?
+b11110 ;
+b100011 7
+b100111 3
+b101010 /
+b101011 +
+b1 M
+b110 J
+b1100 F
+b0 E
+b10010 B
+b11000 >
+b11110 :
+b100011 6
+b100111 2
+b101010 .
+b0 -
+b101011 *
+b1 )
+b1010 (
+b1000 '
+b1 P
+b10000000 L
+b1111111 H
+b1111101 D
+b1111011 @
+b1111010 <
+b1111001 8
+b1111010 4
+b1111011 0
+b1100000000111111101111101011110110111101001111001011110100111101101111101 !
+b1100000000111111101111101011110110111101001111001011110100111101101111101 &
+b1111101 ,
+1#
+#16
+b11010101 +
+b11010110 /
+b11011001 3
+b11011101 7
+b11100010 ;
+b11101000 ?
+b11101110 C
+b11110100 G
+b11111010 K
+b11111111 O
+0"
+b10 %
+0#
+#18
+b11010110 O
+b11011001 K
+b11011101 G
+b11100010 C
+b11101110 ;
+b11110100 7
+b11111010 3
+b11111111 /
+b10000011 +
+b101010 N
+b100111 J
+b0 I
+b100011 F
+b1 E
+b11110 B
+b0 =
+b10010 :
+b1100 6
+b0 5
+b110 2
+b1 .
+b1 -
+b1111101 *
+b0 )
+b1010 (
+b11010110 ,
+b11010110 0
+b11011010 4
+b11011110 8
+b11100011 <
+b11101001 @
+b11101111 D
+b11110100 H
+b11111011 L
+b111110111111010011101111111010011110001111011110110110101101011011010110 !
+b111110111111010011101111111010011110001111011110110110101101011011010110 &
+b0 P
+b100 '
+1#
+#20
+b1111101 +
+b1 /
+b110 3
+b1100 7
+b10010 ;
+b11000 ?
+b11110 C
+b100011 G
+b100111 K
+b101010 O
+1"
+b11 %
+0#
+#22
+b1111010 O
+b1111001 K
+b1111000 G
+b1111001 C
+b1111010 ?
+b1111100 ;
+b1111110 7
+b1111111 3
+b10 +
+b1111010 N
+b1111001 J
+b1111000 F
+b0 E
+b1111001 B
+b1111010 >
+b1 =
+b1111100 :
+b1111110 6
+b1 5
+b1111111 2
+b0 -
+b10 *
+b1 )
+b1010 (
+b10 '
+b101011 P
+b100111 L
+b100100 H
+b11111 D
+b11000 @
+b10011 <
+b1100 8
+b111 4
+b10 0
+b101011001001110010010000011111000110000001001100001100000001110000001001111101 !
+b101011001001110010010000011111000110000001001100001100000001110000001001111101 &
+b1111101 ,
+1#
+#24
+b100 %
+0#
+#26
+b11 O
+b11 K
+b11 G
+b11 C
+b10 ?
+b1 ;
+b0 7
+b1111111 /
+b1111111 +
+b11 N
+b0 M
+b11 J
+b1 I
+b11 F
+b11 B
+b0 A
+b10 >
+b0 =
+b1 :
+b0 9
+b0 6
+b0 5
+b0 1
+b1111111 .
+b1 -
+b1111111 *
+b1010 (
+b11 ,
+b1 0
+b10000000 4
+b1111111 8
+b1111101 <
+b1111011 @
+b1111010 D
+b1111000 H
+b1111001 L
+b1111011011110010111100001111010011110110111110101111111100000000000000100000011 !
+b1111011011110010111100001111010011110110111110101111111100000000000000100000011 &
+b1111011 P
+b1 '
+1#
+#28
+b101 %
+0#
+#30
+b1111111 O
+b1111111 K
+b0 G
+b1 C
+b11 ;
+b11 7
+b11 3
+b11 /
+b10 +
+b1111111 N
+b1111111 J
+b0 I
+b0 F
+b1 E
+b1 B
+b11 :
+b11 6
+b11 2
+b11 .
+b0 -
+b10 *
+b0 )
+b1010 (
+b100000 '
+b11 P
+b100 L
+b11 H
+b11 D
+b10 @
+b1 <
+b0 8
+b1111111 4
+b10000000 0
+b11000001000000001100000011000000100000000100000000011111111000000010000000 !
+b11000001000000001100000011000000100000000100000000011111111000000010000000 &
+b10000000 ,
+1#
+#32
+b110 %
+0#
+#34
+b1 O
+b1111110 G
+b1111100 C
+b1111010 ?
+b1111001 ;
+b1111000 7
+b1111001 3
+b1111010 /
+b1111101 +
+b1 N
+b1 M
+b1 I
+b1111110 F
+b0 E
+b1111100 B
+b1111010 >
+b1111001 :
+b1111000 6
+b1111001 2
+b1111010 .
+b1 -
+b1111101 *
+b1010 (
+b10 ,
+b11 0
+b11 4
+b11 8
+b11 <
+b1 D
+b1 H
+b1111111 L
+b1111111011111110000000100000001000000100000001100000011000000110000001100000010 !
+b1111111011111110000000100000001000000100000001100000011000000110000001100000010 &
+b1111111 P
+b10000 '
+1#
+#36
+b111 %
+0#
+#38
+b110 K
+b1100 G
+b10010 C
+b11000 ?
+b11110 ;
+b100011 7
+b100111 3
+b101010 /
+b101011 +
+b110 J
+b1100 F
+b10010 B
+b1 A
+b11000 >
+b1 =
+b11110 :
+b1 9
+b100011 6
+b1 5
+b100111 2
+b1 1
+b101010 .
+b0 -
+b101011 *
+b1 )
+b1010 (
+b1000 '
+b10 P
+b10000000 L
+b1111110 H
+b1111100 D
+b1111010 @
+b1111001 <
+b1111000 8
+b1111001 4
+b1111011 0
+b10100000000111111001111100011110100111100101111000011110010111101101111101 !
+b10100000000111111001111100011110100111100101111000011110010111101101111101 &
+b1111101 ,
+1#
+#40
+b11010101 +
+b11010110 /
+b11011001 3
+b11011101 7
+b11100010 ;
+b11101000 ?
+b11101110 C
+b11110100 G
+b11111010 K
+b11111111 O
+0"
+b1000 %
+0#
+#42
+b11010110 O
+b11011001 K
+b11011101 G
+b11100010 C
+b11101110 ;
+b11110100 7
+b11111010 3
+b11111111 /
+b10000011 +
+b101010 N
+b100111 J
+b0 I
+b100011 F
+b1 E
+b11110 B
+b0 =
+b10010 :
+b1100 6
+b0 5
+b110 2
+b1 .
+b1 -
+b1111101 *
+b0 )
+b1010 (
+b11010110 ,
+b11010110 0
+b11011010 4
+b11011110 8
+b11100011 <
+b11101001 @
+b11101111 D
+b11110100 H
+b11111011 L
+b111110111111010011101111111010011110001111011110110110101101011011010110 !
+b111110111111010011101111111010011110001111011110110110101101011011010110 &
+b0 P
+b100 '
+1#
+#44
+b1001 %
+0#
+#46
+b10000110 O
+b10000111 K
+b10001000 G
+b10000111 C
+b10000110 ?
+b10000100 ;
+b10000010 7
+b10000001 3
+b11111110 +
+b1111010 N
+b0 M
+b1111001 J
+b1111000 F
+b1111001 B
+b0 A
+b1111010 >
+b1111100 :
+b0 9
+b1111110 6
+b1111111 2
+b0 1
+b10 *
+b1 )
+b1010 (
+b10 '
+b11010111 P
+b11011001 L
+b11011110 H
+b11100011 D
+b11101000 @
+b11101111 <
+b11110100 8
+b11111011 4
+b0 0
+b11010111110110011101111011100011111010001110111111110100111110110000000010000011 !
+b11010111110110011101111011100011111010001110111111110100111110110000000010000011 &
+b10000011 ,
+1#
+#48
+b1010 %
+0#
+#50
+b11111101 O
+b11111101 K
+b11111101 G
+b11111101 C
+b11111110 ?
+b11111111 ;
+b0 7
+b10000001 /
+b10000001 +
+b11 N
+b11 J
+b11 F
+b11 B
+b1 A
+b10 >
+b1 =
+b1 :
+b1 9
+b0 6
+b1 5
+b1 1
+b1111111 .
+b1111111 *
+b1010 (
+b11111111 ,
+b10000001 4
+b10000010 8
+b10000100 <
+b10000110 @
+b10000111 D
+b10001001 H
+b10000111 L
+b10000110100001111000100110000111100001101000010010000010100000010000000011111111 !
+b10000110100001111000100110000111100001101000010010000010100000010000000011111111 &
+b10000110 P
+b1 '
+1#
+#52
+b1011 %
+0#
+#54
+b10000001 O
+b10000001 K
+b0 G
+b11111111 C
+b11111101 ;
+b11111101 7
+b11111101 3
+b11111101 /
+b11111110 +
+b1111111 N
+b1 M
+b1111111 J
+b0 F
+b1 B
+b0 A
+b0 =
+b11 :
+b0 9
+b11 6
+b0 5
+b11 2
+b0 1
+b11 .
+b10 *
+b0 )
+b1010 (
+b100000 '
+b11111101 P
+b11111101 L
+b11111110 H
+b11111110 D
+b11111111 @
+b0 <
+b1 8
+b10000010 4
+b10000010 0
+b11111101111111011111111011111110111111110000000000000001100000101000001010000010 !
+b11111101111111011111111011111110111111110000000000000001100000101000001010000010 &
+b10000010 ,
+1#
+#56
+b10 +
+b11 /
+b11 3
+b11 7
+b11 ;
+b10 ?
+b1 C
+b1111111 K
+b1111111 O
+1"
+b1100 %
+0#
+#58
+b1 O
+b1111110 G
+b1111100 C
+b1111010 ?
+b1111001 ;
+b1111000 7
+b1111001 3
+b1111010 /
+b1111101 +
+b1 N
+b0 M
+b1111110 F
+b0 E
+b1111100 B
+b1111010 >
+b1111001 :
+b1111000 6
+b1111001 2
+b1111010 .
+b1111101 *
+b1010 (
+b10 ,
+b100 0
+b11 4
+b11 8
+b11 <
+b10 @
+b1 D
+b1 H
+b1111111 L
+b10000000011111110000000100000001000000100000001100000011000000110000010000000010 !
+b10000000011111110000000100000001000000100000001100000011000000110000010000000010 &
+b10000000 P
+b10000 '
+1#
+#60
+b1101 %
+0#
+#62
+b110 K
+b1100 G
+b10010 C
+b11000 ?
+b11110 ;
+b100011 7
+b100111 3
+b101010 /
+b101011 +
+b1 M
+b110 J
+b1 I
+b1100 F
+b10010 B
+b1 A
+b11000 >
+b1 =
+b11110 :
+b1 9
+b100011 6
+b1 5
+b100111 2
+b1 1
+b101010 .
+b0 -
+b101011 *
+b1 )
+b1010 (
+b1000 '
+b1 P
+b1111110 H
+b1111100 D
+b1111010 @
+b1111001 <
+b1111000 8
+b1111001 4
+b1111011 0
+b1011111110111111001111100011110100111100101111000011110010111101101111101 !
+b1011111110111111001111100011110100111100101111000011110010111101101111101 &
+b1111101 ,
+1#
+#64
+b11010101 +
+b11010110 /
+b11011001 3
+b11011101 7
+b11100010 ;
+b11101000 ?
+b11101110 C
+b11110100 G
+b11111010 K
+b11111111 O
+0"
+b1110 %
+0#
+#66
+b11010110 O
+b11011001 K
+b11011101 G
+b11100010 C
+b11101110 ;
+b11110100 7
+b11111010 3
+b11111111 /
+b10000011 +
+b101010 N
+b100111 J
+b0 I
+b100011 F
+b1 E
+b11110 B
+b0 =
+b10010 :
+b1100 6
+b0 5
+b110 2
+b1 .
+b1 -
+b1111101 *
+b0 )
+b1010 (
+b11010110 ,
+b11010110 0
+b11011010 4
+b11011110 8
+b11100011 <
+b11101001 @
+b11101111 D
+b11110100 H
+b11111011 L
+b111110111111010011101111111010011110001111011110110110101101011011010110 !
+b111110111111010011101111111010011110001111011110110110101101011011010110 &
+b0 P
+b100 '
+1#
+#68
+b1111 %
+0#
+#70
+b10000110 O
+b10000111 K
+b10001000 G
+b10000111 C
+b10000110 ?
+b10000100 ;
+b10000010 7
+b10000001 3
+b11111110 +
+b1111010 N
+b0 M
+b1111001 J
+b1111000 F
+b1111001 B
+b0 A
+b1111010 >
+b1111100 :
+b0 9
+b1111110 6
+b1111111 2
+b0 1
+b10 *
+b1 )
+b1010 (
+b10 '
+b11010111 P
+b11011001 L
+b11011110 H
+b11100011 D
+b11101000 @
+b11101111 <
+b11110100 8
+b11111011 4
+b0 0
+b11010111110110011101111011100011111010001110111111110100111110110000000010000011 !
+b11010111110110011101111011100011111010001110111111110100111110110000000010000011 &
+b10000011 ,
+1#
+#72
+b10000 %
+0#
+#74
+b11111101 O
+b11111101 K
+b11111101 G
+b11111101 C
+b11111110 ?
+b11111111 ;
+b0 7
+b10000001 /
+b10000001 +
+b11 N
+b11 J
+b11 F
+b11 B
+b1 A
+b10 >
+b1 =
+b1 :
+b1 9
+b0 6
+b1 5
+b1 1
+b1111111 .
+b1111111 *
+b1010 (
+b11111111 ,
+b10000001 4
+b10000010 8
+b10000100 <
+b10000110 @
+b10000111 D
+b10001001 H
+b10000111 L
+b10000110100001111000100110000111100001101000010010000010100000010000000011111111 !
+b10000110100001111000100110000111100001101000010010000010100000010000000011111111 &
+b10000110 P
+b1 '
+1#
+#76
+b10001 %
+0#
+#78
+b10000001 O
+b10000001 K
+b0 G
+b11111111 C
+b11111101 ;
+b11111101 7
+b11111101 3
+b11111101 /
+b11111110 +
+b1111111 N
+b1 M
+b1111111 J
+b0 F
+b1 B
+b0 A
+b0 =
+b11 :
+b0 9
+b11 6
+b0 5
+b11 2
+b0 1
+b11 .
+b10 *
+b0 )
+b1010 (
+b100000 '
+b11111101 P
+b11111101 L
+b11111110 H
+b11111110 D
+b11111111 @
+b0 <
+b1 8
+b10000010 4
+b10000010 0
+b11111101111111011111111011111110111111110000000000000001100000101000001010000010 !
+b11111101111111011111111011111110111111110000000000000001100000101000001010000010 &
+b10000010 ,
+1#
+#80
+b10 +
+b11 /
+b11 3
+b11 7
+b11 ;
+b10 ?
+b1 C
+b1111111 K
+b1111111 O
+1"
+b10010 %
+0#
+#82
+b1 O
+b1111110 G
+b1111100 C
+b1111010 ?
+b1111001 ;
+b1111000 7
+b1111001 3
+b1111010 /
+b1111101 +
+b1 N
+b0 M
+b1111110 F
+b0 E
+b1111100 B
+b1111010 >
+b1111001 :
+b1111000 6
+b1111001 2
+b1111010 .
+b1111101 *
+b1010 (
+b10 ,
+b100 0
+b11 4
+b11 8
+b11 <
+b10 @
+b1 D
+b1 H
+b1111111 L
+b10000000011111110000000100000001000000100000001100000011000000110000010000000010 !
+b10000000011111110000000100000001000000100000001100000011000000110000010000000010 &
+b10000000 P
+b10000 '
+1#
+#84
+b10011 %
+0#
+#86
+b110 K
+b1100 G
+b10010 C
+b11000 ?
+b11110 ;
+b100011 7
+b100111 3
+b101010 /
+b101011 +
+b1 M
+b110 J
+b1 I
+b1100 F
+b10010 B
+b1 A
+b11000 >
+b1 =
+b11110 :
+b1 9
+b100011 6
+b1 5
+b100111 2
+b1 1
+b101010 .
+b0 -
+b101011 *
+b1 )
+b1010 (
+b1000 '
+b1 P
+b1111110 H
+b1111100 D
+b1111010 @
+b1111001 <
+b1111000 8
+b1111001 4
+b1111011 0
+b1011111110111111001111100011110100111100101111000011110010111101101111101 !
+b1011111110111111001111100011110100111100101111000011110010111101101111101 &
+b1111101 ,
+1#
+#88
+b10100 %
+0#

diff --git a/nfc/iso_iec_15693/README b/nfc/iso_iec_15693/README
new file mode 100644 (file)
index 0000000..86cbde1
--- /dev/null
+++ b/nfc/iso_iec_15693/README
@@ -0,0 +1,35 @@
+-------------------------------------------------------------------------------
+NFC ISO/IEC 15693 vicinity reader / tag capture with demodulation
+-------------------------------------------------------------------------------
+
+This is an example of an NFC ISO/IEC 15693 vicinity reader / tag capture
+with demodulation.
+
+
+Hardware setup for the capture
+------------------------------
+
+* HydraBus v1.2 + HydraNFC Shield v1.1
+ * Using firmware HydraFW (HydraBus) v0.9-beta-92-g3c34dfd 2019-10-12
+Tag ISO/IEC 15693 Vicinity ICODE SLI/SLIX (uID RW)
+* CH1 connected to HydraBus/HydraNFC PA5
+ * Capture HydraNFC reader clock 13.56MHz
+* CH2 connected to “Calibration Coil ISO 10373-6”
+ * Capture NFC signal between NFC Reader & NFC Vicinity Tag
+* Impedance Adapter 50 Ohm (also called Rigol Impedance Adjuster 50 Ohm)
+  used on CH2 with "Calibration Coil ISO 10373-6"
+ * PL-50 (50 Ohms +/-1%, 2 WATT, DC - 1GHz)
+* PicoScope 3406DMSO (8bits @ 1 GS/s, Memory 512MS)
+* Picoscope v6.x software on Windows 7 SP1 64bits
+
+NFC ISO/IEC 15693 Vicinity read UID capture was demodulated with an Octave
+script which creates CH3 & CH4 and all channels are displayed with PulseView.
+
+
+Capture details
+---------------
+
+CH1: connected to HydraBus/HydraNFC PA5 (capture HydraNFC reader Clock 13.56MHz)
+CH2: connected to "Calibration Coil ISO 10373-6" (capture NFC signal between Reader & Tag)
+CH3: clock reconstructed from CH1 / CH2 to decode CH4
+CH4: filtered data envelope reconstructed from from CH1 / CH2

diff --git a/nfc/iso_iec_15693/nfc_15693_hydranfc_read_uid.sr b/nfc/iso_iec_15693/nfc_15693_hydranfc_read_uid.sr
new file mode 100644 (file)
index 0000000..f73455b
Binary files /dev/null and b/nfc/iso_iec_15693/nfc_15693_hydranfc_read_uid.sr differ

diff --git a/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_All_Registers_SpaceA_B.sr b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_All_Registers_SpaceA_B.sr
new file mode 100644 (file)
index 0000000..626536c
Binary files /dev/null and b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_All_Registers_SpaceA_B.sr differ

diff --git a/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443A_NFC-A.sr b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443A_NFC-A.sr
new file mode 100644 (file)
index 0000000..947fa4e
Binary files /dev/null and b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443A_NFC-A.sr differ

diff --git a/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443B_NFC-B.sr b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443B_NFC-B.sr
new file mode 100644 (file)
index 0000000..0674be3
Binary files /dev/null and b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO14443B_NFC-B.sr differ

diff --git a/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO15693_NFC-V.sr b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO15693_NFC-V.sr
new file mode 100644 (file)
index 0000000..15c9339
Binary files /dev/null and b/nfc/st25r39xx/HydraBus_v1_HydraNFC_Shield_v2_ST25R3916_Read_UID_ISO15693_NFC-V.sr differ

diff --git a/nfc/st25r39xx/README b/nfc/st25r39xx/README
new file mode 100644 (file)
index 0000000..2cb765a
--- /dev/null
+++ b/nfc/st25r39xx/README
@@ -0,0 +1,130 @@
+--------------------------------------------------------------------------------------------------------
+Dumps of HydraNFC Shield v2 (STMicroelectronics ST25R3916 NFC chipset communication using SPI + IRQ pin)
+--------------------------------------------------------------------------------------------------------
+
+Dumps of HydraNFC Shield v2 (STMicroelectronics ST25R3916 NFC chipset communication using SPI + IRQ pin)
+Those dumps are intended to be analyzed with st25r3916_spi decoder
+
+Hardware setup for the capture
+------------------------------
+
+* HydraBus v1 Rev1.4 + HydraNFC Shield v2 R1.4
+ * Using firmware (https://github.com/hydrabus/hydrafw_hydranfc_shield_v2) HydraFW (HydraBus v1/HydraNFC Shield v2) v0.1-beta-11-g682a268 2020-07-13
+ * HydraBus SPI Master is configured with signal 0_CLK @10.5MHz, CLK Polarity=0, CLK Phase=1, Bit order=Send/receive MSB first
+
+Tag ISO/IEC 14443-A (106 kbps) ST25TA02K-P (CLOUD-ST25TA MB1207-B) NFC Forum Type 4 Tag (https://www.st.com/cloud-st25ta)
+ * Read UID of the tag
+ * nfc-a scan
+ * NFC-A UID:02A20071C84F90
+
+Tag ISO/IEC 14443-B
+ * Read UID of the tag (nfc-b scan)
+ * nfc-b scan
+ * NFC-B UID:00422099
+
+Tag ISO/IEC 15693 Vicinity ST25 (5cm x 5cm Tag)
+ * Read UID of the tag
+  * nfc-v scan
+  * NFC-V UID:E0022300265F64F2
+
+ST25R3916 Registers Space A & B after init
+ * Read all ST25R3916 Registers Space A & B
+  * show registers
+  * ST25R3916 Registers space A:
+       *       0x00    : 0x07
+       *       0x01    : 0x3c
+       *       0x02    : 0x83
+       *       0x03    : 0x08
+       *       0x04    : 0x00
+       *       0x05    : 0x00
+       *       0x06    : 0x00
+       *       0x07    : 0x00
+       *       0x08    : 0x50
+       *       0x09    : 0x00
+       *       0x0a    : 0x00
+       *       0x0b    : 0x08
+       *       0x0c    : 0x2d
+       *       0x0d    : 0xd8
+       *       0x0e    : 0x00
+       *       0x0f    : 0x0c
+       *       0x10    : 0x00
+       *       0x11    : 0x00
+       *       0x12    : 0x00
+       *       0x13    : 0x84
+       *       0x14    : 0x6c
+       *       0x15    : 0x80
+       *       0x16    : 0xff
+       *       0x17    : 0xff
+       *       0x18    : 0xff
+       *       0x19    : 0xfb
+       *       0x1a    : 0x00
+       *       0x1b    : 0x00
+       *       0x1c    : 0x00
+       *       0x1d    : 0x00
+       *       0x1e    : 0x00
+       *       0x1f    : 0x00
+       *       0x20    : 0x00
+       *       0x21    : 0x00
+       *       0x22    : 0x00
+       *       0x23    : 0x00
+       *       0x24    : 0x00
+       *       0x25    : 0xdf
+       *       0x26    : 0x49
+       *       0x27    : 0x45
+       *       0x28    : 0x70
+       *       0x29    : 0x5f
+       *       0x2a    : 0x11
+       *       0x2b    : 0x00
+       *       0x2c    : 0x00
+       *       0x2d    : 0x00
+       *       0x2e    : 0x00
+       *       0x2f    : 0x00
+       *       0x30    : 0x00
+       *       0x31    : 0x12
+       *       0x32    : 0x00
+       *       0x33    : 0x00
+       *       0x34    : 0x00
+       *       0x35    : 0x00
+       *       0x36    : 0x00
+       *       0x37    : 0x00
+       *       0x38    : 0x00
+       *       0x39    : 0x00
+       *       0x3a    : 0x00
+       *       0x3b    : 0x00
+       *       0x3c    : 0x00
+       *       0x3d    : 0x00
+       *       0x3e    : 0x00
+       *       0x3f    : 0x2a
+       *       ST25R3916 Registers space B:
+       *       0x00    : 0x40
+       *       0x01    : 0x00
+       *       0x02    : 0x0c
+       *       0x03    : 0x93
+       *       0x04    : 0x00
+       *       0x05    : 0x00
+       *       0x06    : 0x33
+       *       0x07    : 0x10
+       *       0x08    : 0x7c
+       *       0x09    : 0x80
+       *       0x0a    : 0x04
+       *       0x0b    : 0xe0
+       *       0x0c    : 0x00
+       *       0x0d    : 0x00
+       *       0x0e    : 0x00
+       *       0x0f    : 0x00
+
+Capture details for all types of Tags
+-------------------------------------
+0_CLK:  HydraBus v1/STM32F405 PB10 SPI2 Master CLK out connected to HydraNFC Shield v2/ST25R3916 SPI Slave SCLK pin30 in
+1_MISO: HydraBus v1/STM32F405 PC2 SPI2 Master MISO in connected to HydraNFC Shield v2/ST25R3916 SPI Slave MISO pin32 out
+2_MOSI: HydraBus v1/STM32F405 PC3 SPI2 Master MOSI out connected to HydraNFC Shield v2/ST25R3916 SPI Slave MOSI pin31 in
+3_CS#:  HydraBus v1/STM32F405 PC1 SPI2 Master CS out connected to HydraNFC Shield v2/ST25R3916 SPI Slave BSS pin29 in
+4_IRQ:  HydraBus v1/STM32F405 PA1 IRQ Input in connected to HydraNFC Shield v2/ST25R3916 IRQ pin27 out
+
+SPI / ST25R3916 Configuration:
+CS# Polarity active-low
+Clock polarity 0
+Clock phase 1
+Bit order msb-first
+Word size 8
+

diff --git a/pjon/README b/pjon/README
new file mode 100644 (file)
index 0000000..507bcd4
--- /dev/null
+++ b/pjon/README
@@ -0,0 +1,10 @@
+-------------------------------------------------------------------------------
+PJON protocol stack, project homepage https://www.pjon.org/
+-------------------------------------------------------------------------------
+
+This is a collection of example PJON communication. Subdirectories contain
+different types of communication (link layers, or setups).
+
+PJON protocol and PJDL link layer specs:
+https://www.pjon.org/PJON-protocol-specification-v3.2.php
+https://www.pjon.org/PJDL-specification-v4.1.php

diff --git a/pjon/pjdl/README b/pjon/pjdl/README
new file mode 100644 (file)
index 0000000..25423e9
--- /dev/null
+++ b/pjon/pjdl/README
@@ -0,0 +1,40 @@
+-------------------------------------------------------------------------------
+PJON over PJDL
+-------------------------------------------------------------------------------
+
+This is a collection of example PJON communication which uses the PJDL
+link layer. Which does serial communication on a single wire, and the
+reference library happens to implement it by means of software bitbang
+(which affects the timing of signals on the wire).
+
+
+Logic analyzer setup
+--------------------
+
+The capture was taken with a logic analyzer at a samplerate of 4MSa/s.
+Communication is done on a single channel.
+
+  Probe       PJDL
+  ----------------
+  1           data
+
+
+pjon-pjdl-glitch-and-ack-and-failed-ack.sr
+------------------------------------------
+
+Two STM32F103 (Blue Pill boards) run the example code which resides in
+the examples/ARDUINO/Local/SoftwareBitBang/SendAndReceive/Device1/ and
+Device2/ directories. Communication mode 1 translates to 44us and 116us
+for data and pad bits. Device addresses are 44 and 45. The letter 'B' is
+sent as the payload data in both directions. Synchronous responses get
+requested, but one device won't respond. The capture also contains a few
+glitches which as a byproduct exercise the decoder's robustness, and
+recovery after synchronization loss.
+
+
+pjon-pjdl-incomplete-frame-missing-ack-repetitive.sr
+----------------------------------------------------
+
+This is a longer capture taken from the above setup. Some of the glitches
+happen to fall into a PJON frame's period and can prevent or can disturb
+the accumulation of the frame's content.

diff --git a/pjon/pjdl/pjon-pjdl-glitch-and-ack-and-failed-ack.sr b/pjon/pjdl/pjon-pjdl-glitch-and-ack-and-failed-ack.sr
new file mode 100644 (file)
index 0000000..e130f90
Binary files /dev/null and b/pjon/pjdl/pjon-pjdl-glitch-and-ack-and-failed-ack.sr differ

diff --git a/pjon/pjdl/pjon-pjdl-incomplete-frame-missing-ack-repetitive.sr b/pjon/pjdl/pjon-pjdl-incomplete-frame-missing-ack-repetitive.sr
new file mode 100644 (file)
index 0000000..c6aaf62
Binary files /dev/null and b/pjon/pjdl/pjon-pjdl-incomplete-frame-missing-ack-repetitive.sr differ

diff --git a/ps2/keyboard/README b/ps2/keyboard/README
index 47ddf17ca4548852f6691c5dea27d953dae34f96..640324cd017c5513ea298234ccb70eedb345fbfe 100644 (file)
--- a/ps2/keyboard/README
+++ b/ps2/keyboard/README
@@ -7,8 +7,8 @@ This is a collection of PS/2 keyboard communication examples.
 A random PS/2 keyboard and a random PC mainboard were used as data source.
 
 For details see:
-http://www.computer-engineering.org/ps2protocol/
-http://www.computer-engineering.org/ps2keyboard/
+https://web.archive.org/web/20161231114842/http://www.computer-engineering.org/ps2protocol/
+https://www.avrfreaks.net/sites/default/files/PS2%20Keyboard.pdf
 
 
 Logic analyzer setup
@@ -28,3 +28,18 @@ ps2_keyboard_asdfgh.sr
 This file contains a sequence of keypresses on a standard PS/2 keyboard:
 a, s, d, f, g. The dump contains the "make code" and "break code" of each key.
 
+After each transmission, the receiving controller appears to pull the clock
+line low for more than 100 microseconds. This inhibits transmission until the
+clock line is released, presumably because the receiving controller needs time
+to process data. Due to this, additional very short clock pulses can be
+observed, as the controller starts inhibiting communication only shortly after
+packets are received.
+
+
+ps2_keyboard_asdfgh_no_inhibit.sr
+---------------------------------
+
+The keys a, s, d, f and g pressed on a random PS/2 keyboard.
+
+In this dump, the receiving end was passive, without inhibiting communication.
+Thus only clock pulses produced by the keyboard can be observed.

diff --git a/ps2/keyboard/ps2_keyboard_asdfgh_no_inhibit.sr b/ps2/keyboard/ps2_keyboard_asdfgh_no_inhibit.sr
new file mode 100644 (file)
index 0000000..3a33f85
Binary files /dev/null and b/ps2/keyboard/ps2_keyboard_asdfgh_no_inhibit.sr differ

diff --git a/sae-j1850/vpw/P01_bench_by_itself/P01_bench_by_itself.sr b/sae-j1850/vpw/P01_bench_by_itself/P01_bench_by_itself.sr
new file mode 100644 (file)
index 0000000..c58d63a
Binary files /dev/null and b/sae-j1850/vpw/P01_bench_by_itself/P01_bench_by_itself.sr differ

diff --git a/sae-j1850/vpw/P01_bench_by_itself/README b/sae-j1850/vpw/P01_bench_by_itself/README
new file mode 100644 (file)
index 0000000..70b915d
--- /dev/null
+++ b/sae-j1850/vpw/P01_bench_by_itself/README
@@ -0,0 +1,124 @@
+------------------------------------------------------------
+J1850 VPW transmission from GM P01 Powertrain Control Module
+------------------------------------------------------------
+
+Captured by pman92 - 2 May 2020
+
+This is a capture of data from a General Motors "P01" Powertrain Control
+Module. The control module was wired on the bench in a minimal setup
+with nothing else connected. An ignition switch was included to provide
+ignition power to the PCM. The following information was then obtained
+from the module with PCMHammer 012 and an X-Pro VT interface (see
+https://github.com/LegacyNsfw/PcmHacks/wiki/PCM-Hammer and
+https://obdxpro.com/x-pro-vt/).
+
+  VIN: 6H8WHY19F2L857286
+  OS ID: 12202088
+  Calibration ID: 92113609
+  Hardware ID: 9386530
+  Serial Number: 2EB2TZJT2070
+  Broad Cast Code: DFNN
+  MEC: 0
+
+An Arduino was connected to the data line via a basic interface circuit
+that used a voltage comparator to monitor the J1850 VPW bus voltage
+(high or low). The Arduino was programmed using pin change interrupts to
+measure the time difference between changes of bus state (active or
+passive). The Arduino would watch for SOF signals and then count the
+following bus state/time changes to calculate the data within the packet.
+It would calculate and confirm the checksum matched to ensure the data
+was OK. It would then transmit the complete received packet back to the
+PC via USB and was displayed on the Arduino serial monitor. The returned
+data included a timestamp. If a checksum didn't match, an error message
+would be returned instead of the relavent data packet.
+
+
+Logic analyzer setup
+--------------------
+
+The capture was taken with a Saleae Logic 8 Channel clone at 16MHz for
+50M samples. The ignition switch on the bench wiring was turned on and
+the PCM started transmitting data.
+
+  Probe   VPW
+  -------------
+  1       data
+
+
+Capture verification
+--------------------
+
+1. Arduino checksum calculation and confirmation
+
+J1850 VPW packets contain a checksum. If a bad or incorrect checksum was
+found, an error message would be transmitted back to the PC by the Arduino
+instead of that data packet/frame. No error messages were recorded during
+the capturing of this data, so the Arduino checksum calculations were all
+correct, and it considered the data intact.
+
+2. Visual inspection of first data packet in Pulseview
+
+The first data packet (+616.8ms to +622.1ms) was visually inspected in
+PulseView and the bit values written down by hand. They were then split
+into groups of 8 bit values, which were converted each to a single hex
+value. The single hex values of the first data packet were then confirmed
+to match the hex values that the Arduino had returned as the first packet.
+
+3. Timing between first and last data
+
+There is a total of 33 packets visible. PulseView shows the first packet
+ending at 622ms, and the last packet ends at 3059ms, meaning 2437ms between
+the "end of the first" and "end of the last" packets in the capture. The
+Arduino also returned a time stamp of when the packet was processed and
+sent to the PC. Between the first and 33rd packet, the difference in
+Arduino time stamps was 2438ms. The difference of only 1ms confirms the
+PulseView capture and Arduino are looking at the same range of data.
+
+NOTE that there are glitches within the capture. There is a series of
+short glitches/pulses around 506-507ms within the capture. I'm unsure of
+the cause, but this was around the time when the ignition switch on the
+bench was turned on. Maybe it was noise caused by the switch or maybe it
+was noise coming from the PCM when it powered up. Either way this could
+be a good example to make sure the decoder can ignore/skip bad data or
+glitches.
+
+
+Data
+----
+
+The Arduino returned the following data packets, written in hex, from
+first to last within the PulseView capture:
+
+  68 13 10 11 00 46
+  68 EA 10 0A 01 AE
+  88 15 10 01 C8
+  88 1B 10 10 00 00 46
+  8A EA 10 20 8A 00 10
+  A9 CE 10 07 69
+  A8 F3 10 11 02 2B
+  C8 3B 10 3C 04 48
+  68 EA 10 0A 01 AE
+  88 15 10 01 C8
+  8A EA 10 20 8A 00 10
+  A9 CE 10 07 69
+  49 92 10 01 BE
+  49 92 10 01 BE
+  8A EA 10 20 82 00 4A
+  8A EA 10 20 82 00 4A
+  68 49 10 10 0B CF
+  68 EA 10 0A 01 AE
+  88 15 10 01 C8
+  8A EA 10 20 8A 00 10
+  A9 CE 10 07 69
+  E9 2A 10 3C EE
+  49 92 10 01 BE
+  E9 2A 10 3C EE
+  8A EA 10 20 82 00 4A
+  68 EA 10 0A 01 AE
+  88 15 10 01 C8
+  8A EA 10 20 8A 00 10
+  A9 CE 10 07 69
+  E8 FF 10 03 B3
+  49 92 10 01 BE
+  E9 2A 10 3C EE
+  8A EA 10 20 82 00 4A

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1.sr
new file mode 100644 (file)
index 0000000..6db3bfd
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1_2.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1_2.sr
new file mode 100644 (file)
index 0000000..06034f6
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd13_r1_2.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd2_r2.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd2_r2.sr
new file mode 100644 (file)
index 0000000..e5eff3f
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd2_r2.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd3_r6.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd3_r6.sr
new file mode 100644 (file)
index 0000000..6a84c25
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd3_r6.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd41_r3.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd41_r3.sr
new file mode 100644 (file)
index 0000000..d9ebf36
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd41_r3.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd51_r1.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd51_r1.sr
new file mode 100644 (file)
index 0000000..c1aa1b3
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd55_r1_acmd51_r1.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1.sr
new file mode 100644 (file)
index 0000000..e97c189
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1_2.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1_2.sr
new file mode 100644 (file)
index 0000000..6fc61ea
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd6_r1_2.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd7_r6.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd7_r6.sr
new file mode 100644 (file)
index 0000000..45fa0a2
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd7_r6.sr differ

diff --git a/sdcard/sd_mode/card_reader/unknown_card/cmd9_r2.sr b/sdcard/sd_mode/card_reader/unknown_card/cmd9_r2.sr
new file mode 100644 (file)
index 0000000..142d8d6
Binary files /dev/null and b/sdcard/sd_mode/card_reader/unknown_card/cmd9_r2.sr differ

diff --git a/sdq/README b/sdq/README
new file mode 100644 (file)
index 0000000..a0a2aa3
--- /dev/null
+++ b/sdq/README
@@ -0,0 +1,14 @@
+------------------------------------------------------------------------
+SDQ (Texas Instruments, battery authentication)
+------------------------------------------------------------------------
+
+See https://www.ti.com/lit/ds/symlink/bq26100.pdf for the Texas Instruments
+bq26100 battery pack authentication. Apple uses SDQ in devices like MagSafe
+or Lightning connectors, as well as in some batteries.
+
+Logic analyzer setup
+--------------------
+
+  Probe      Signal
+  -----------------
+  0          SDQ

diff --git a/sdq/iphone_se_example_data.sr b/sdq/iphone_se_example_data.sr
new file mode 100644 (file)
index 0000000..133acca
Binary files /dev/null and b/sdq/iphone_se_example_data.sr differ

diff --git a/sdq/iphone_se_snippet.sr b/sdq/iphone_se_snippet.sr
new file mode 100644 (file)
index 0000000..e563fdb
Binary files /dev/null and b/sdq/iphone_se_snippet.sr differ

diff --git a/signature/0003.sr b/signature/0003.sr
new file mode 100644 (file)
index 0000000..1d4c666
Binary files /dev/null and b/signature/0003.sr differ

diff --git a/signature/6F9A.sr b/signature/6F9A.sr
new file mode 100644 (file)
index 0000000..c5513c2
Binary files /dev/null and b/signature/6F9A.sr differ

diff --git a/signature/7791.sr b/signature/7791.sr
new file mode 100644 (file)
index 0000000..d001c25
Binary files /dev/null and b/signature/7791.sr differ

diff --git a/signature/README b/signature/README
new file mode 100644 (file)
index 0000000..0d0921c
--- /dev/null
+++ b/signature/README
@@ -0,0 +1,34 @@
+-------------------------------------------------------------------------------
+Signature from Hewlett-Packard Instrument
+-------------------------------------------------------------------------------
+
+These captures contain the valid signature, confirmed with HP's service manual.
+
+Details:
+http://hpmemoryproject.org/an/pdf/an_222.pdf
+https://www.hpl.hp.com/hpjournal/pdfs/IssuePDFs/1977-05.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic (at 6-24MHz):
+
+  Probe       Pin
+  ---------------
+  0           START
+  1           STOP
+  5           DATA
+  7           CLOCK
+
+The sigrok command line used was:
+
+  sigrok-cli -d fx2lafw -c samplerate=24MHz -o <filename> --time 1s
+
+Time, samplerate and <filename> parameters vary depending on the file.
+
+
+unstable1.sr
+------------
+
+This is not valid signature, but useful for regression tests.

diff --git a/signature/UUUU.sr b/signature/UUUU.sr
new file mode 100644 (file)
index 0000000..5e904d9
Binary files /dev/null and b/signature/UUUU.sr differ

diff --git a/signature/unstable1.sr b/signature/unstable1.sr
new file mode 100644 (file)
index 0000000..d322e69
Binary files /dev/null and b/signature/unstable1.sr differ

diff --git a/sle44xx/README b/sle44xx/README
new file mode 100644 (file)
index 0000000..cd60134
--- /dev/null
+++ b/sle44xx/README
@@ -0,0 +1,29 @@
+------------------------------------------------------------------------
+Siemens SLE44xx Chip Card Protocol
+------------------------------------------------------------------------
+
+SLE 4418/4428/4432/4442 memory cards implement a 2-wire protocol for data
+communication (signals CLK and I/O). A RST signal can be used to terminate
+currently pending long memory reads, and resets the card's address counter
+when combined with CLK. The next response data then is the Answer to Reset
+(ATR) which identifies the chip's capabilities, and allows to adjust for
+subsequent communication of more requests.
+
+See the Siemens document for details:
+
+  ICs for Chip Cards
+  Intelligent 256-Byte EEPROM
+  SLE 4432/SLE 4442
+  Data Sheet 07.95
+
+
+Logic analyzer setup
+--------------------
+
+  Probe    SLE44xx
+  ----------------
+  0        I/O
+  1        CLK
+  2        RST
+
+See subdirectories for chip specific example files.

diff --git a/sle44xx/sle4442/README b/sle44xx/sle4442/README
new file mode 100644 (file)
index 0000000..b39d8ac
--- /dev/null
+++ b/sle44xx/sle4442/README
@@ -0,0 +1,54 @@
+-------------------------------------------------------------------------------
+Siemens SLE4442 Chip Card protocol capture
+-------------------------------------------------------------------------------
+
+See the parent directory for more general information. These captures
+correspond to the SLE4442 chip. Each file demonstrates an individual
+operation.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Cypress FX2 no-brand device (at 500kHz):
+
+  Probe       SLE4442 pin
+  -----------------------
+  0           I/O
+  1           CLK
+  2           RST
+
+
+sle4442_atr.sr
+--------------
+
+Reset issued by the reader, ATR (Answer to Reset) response sent by the card.
+
+
+sle4442_psc_correct.sr
+----------------------
+
+Reader reset, correct PSC (Programmable Security Code) sent by the reader to
+the card, and gets accepted.
+
+
+sle4442_psc_wrong.sr
+--------------------
+
+Reader reset, incorrect PSC sent by the reader to the card, and gets refused.
+
+
+sle4442_read_main_memory.sr
+---------------------------
+
+Full read of the card's main memory (complete address range). Includes the
+ATR content at offset 0.
+
+
+sle4442_write_cafe1337_offset_30.sr
+-----------------------------------
+
+Write 0xCA 0xFE 0x13 0x37 to main memory at offset 0x30, then read back
+several main memory regions (starting slightly before the recently written
+address range, and starting from the beginning of the card's memory). Each
+read continues to the end of the card's capacity.

diff --git a/sle44xx/sle4442/sle4442_atr.sr b/sle44xx/sle4442/sle4442_atr.sr
new file mode 100644 (file)
index 0000000..f5ab712
Binary files /dev/null and b/sle44xx/sle4442/sle4442_atr.sr differ

diff --git a/sle44xx/sle4442/sle4442_psc_correct.sr b/sle44xx/sle4442/sle4442_psc_correct.sr
new file mode 100644 (file)
index 0000000..d9c6087
Binary files /dev/null and b/sle44xx/sle4442/sle4442_psc_correct.sr differ

diff --git a/sle44xx/sle4442/sle4442_psc_wrong.sr b/sle44xx/sle4442/sle4442_psc_wrong.sr
new file mode 100644 (file)
index 0000000..09477d3
Binary files /dev/null and b/sle44xx/sle4442/sle4442_psc_wrong.sr differ

diff --git a/sle44xx/sle4442/sle4442_read_main_memory.sr b/sle44xx/sle4442/sle4442_read_main_memory.sr
new file mode 100644 (file)
index 0000000..28b88b4
Binary files /dev/null and b/sle44xx/sle4442/sle4442_read_main_memory.sr differ

diff --git a/sle44xx/sle4442/sle4442_write_cafe1337_offset_30.sr b/sle44xx/sle4442/sle4442_write_cafe1337_offset_30.sr
new file mode 100644 (file)
index 0000000..ea1a6ac
Binary files /dev/null and b/sle44xx/sle4442/sle4442_write_cafe1337_offset_30.sr differ

diff --git a/spdif/more/README b/spdif/more/README
new file mode 100644 (file)
index 0000000..4151499
--- /dev/null
+++ b/spdif/more/README
@@ -0,0 +1,15 @@
+Several .sr files for testing of SPDIF.
+
+Use channel D6 for testing. The test signal is a 44,1kHz 2 channel audio signal (2.822Mbit/s).
+
+spdif_16mhz_44khz.sr:
+Original decoder is lucky to enter the stream with pulses of medium length. OK.
+New decoder recognizes short pulses (width <= 3 samples) and reports an error. OK.
+
+spdif_16mhz_44khz_3.sr:
+Original decoder decodes wrong because of false pulse width detection at the beginning. Fail.
+New decoder recognizes short pulses (width <= 3 samples) and reports an error. OK.
+
+spdif_24mhz_44khz_1.sr:
+Original decoder doesn't find any frames because of long low level phase before the data stream. Fail.
+Now decoder correctly decodes stream after synchronisation (First frame is missed). OK.

diff --git a/spdif/more/spdif_16mhz_44khz.sr b/spdif/more/spdif_16mhz_44khz.sr
new file mode 100644 (file)
index 0000000..036e91f
Binary files /dev/null and b/spdif/more/spdif_16mhz_44khz.sr differ

diff --git a/spdif/more/spdif_16mhz_44khz_3.sr b/spdif/more/spdif_16mhz_44khz_3.sr
new file mode 100644 (file)
index 0000000..e4b0296
Binary files /dev/null and b/spdif/more/spdif_16mhz_44khz_3.sr differ

diff --git a/spdif/more/spdif_24mhz_44khz_1.sr b/spdif/more/spdif_24mhz_44khz_1.sr
new file mode 100644 (file)
index 0000000..d073009
Binary files /dev/null and b/spdif/more/spdif_24mhz_44khz_1.sr differ

diff --git a/spi/ad7920/README b/spi/ad7920/README
new file mode 100644 (file)
index 0000000..6ab75f2
--- /dev/null
+++ b/spi/ad7920/README
@@ -0,0 +1,34 @@
+-------------------------------------------------------------------------------
+Analog Devices AD7920
+-------------------------------------------------------------------------------
+
+This is a set of example captures of an Analog Devices AD7920 12-bit ADC.
+
+Details:
+https://www.analog.com/media/en/technical-documentation/data-sheets/AD7910_7920.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was ADALM2000 (at 5MHz):
+
+  Probe       AD7920
+  ------------------
+  0           CLK
+  1           MISO
+  2           CS#
+
+
+Probing
+-------
+
+The sigrok command line used was:
+
+  sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -C 0-2 -o <file>
+
+
+ad7920_fast_read.sr
+-------------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=10000000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -o ad7920_fast_read.sr -C 0-2

diff --git a/spi/ad7920/ad7920_fast_read.sr b/spi/ad7920/ad7920_fast_read.sr
new file mode 100644 (file)
index 0000000..0658e63
Binary files /dev/null and b/spi/ad7920/ad7920_fast_read.sr differ

diff --git a/spi/adxl345/README b/spi/adxl345/README
new file mode 100644 (file)
index 0000000..b3cdc4f
--- /dev/null
+++ b/spi/adxl345/README
@@ -0,0 +1,41 @@
+-------------------------------------------------------------------------------
+Analog Devices ADXL345
+-------------------------------------------------------------------------------
+
+This is a set of example captures of an Analog Devices ADXL345 accelerometer.
+
+Details:
+https://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was ADALM2000 (at 2MHz):
+
+  Probe       ADXL345
+  -------------------
+  0           CLK (Pin 4)
+  1           MOSI (Pin 2)
+  2           MISO (Pin 3)
+  3           CS# (Pin 1)
+
+
+Probing
+-------
+
+The sigrok command line used was:
+
+  sigrok-cli -i - -I binary:numchannels=16:samplerate=2mhz -C 0-3 -o <file>
+
+
+adxl345_registers.sr
+--------------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=640000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=2mhz -C 0-3 -o adxl345_registers.sr
+
+
+adxl345_axis.sr
+---------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=200000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=2mhz -C 0-3 -o adxl345_axis.sr

diff --git a/spi/adxl345/adxl345_axis.sr b/spi/adxl345/adxl345_axis.sr
new file mode 100644 (file)
index 0000000..25ef9a5
Binary files /dev/null and b/spi/adxl345/adxl345_axis.sr differ

diff --git a/spi/adxl345/adxl345_registers.sr b/spi/adxl345/adxl345_registers.sr
new file mode 100644 (file)
index 0000000..690724c
Binary files /dev/null and b/spi/adxl345/adxl345_registers.sr differ

diff --git a/spi/ltc2422/README b/spi/ltc2422/README
new file mode 100644 (file)
index 0000000..d2894f4
--- /dev/null
+++ b/spi/ltc2422/README
@@ -0,0 +1,34 @@
+-------------------------------------------------------------------------------
+Linear Technology Corporation LTC2422
+-------------------------------------------------------------------------------
+
+This is a set of example captures of an LTC2422 20-bit ADC.
+
+Details:
+https://www.analog.com/media/en/technical-documentation/data-sheets/24212f.pdf
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was ADALM2000 (at 5MHz):
+
+  Probe       LTC2422
+  -------------------
+  0           SCK
+  1           SDO
+  2           CS#
+
+
+Probing
+-------
+
+The sigrok command line used was:
+
+  sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -C 0-2 -o <file>
+
+
+ltc2422_read_adc.sr
+--------------------
+
+m2kcli digital auto -c buffer_size=10000 nb_samples=10000000 format=binary | sigrok-cli -i - -I binary:numchannels=16:samplerate=5mhz -o ltc2422_read_adc.sr -C 0-2

diff --git a/spi/ltc2422/ltc2422_read_adc.sr b/spi/ltc2422/ltc2422_read_adc.sr
new file mode 100644 (file)
index 0000000..486e0e6
Binary files /dev/null and b/spi/ltc2422/ltc2422_read_adc.sr differ

diff --git a/spi/mrf24j40/ecg/README b/spi/mrf24j40/ecg/README
new file mode 100644 (file)
index 0000000..94b4228
--- /dev/null
+++ b/spi/mrf24j40/ecg/README
@@ -0,0 +1,36 @@
+-------------------------------------------------------------------------------
+Microchip MRF24J40MA
+-------------------------------------------------------------------------------
+
+This is a set of captures of the communication of an ECG device using a
+Microchip MRF24J40MA RF chip.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a Saleae Logic (at 12MHz).
+
+  Probe  MRF24J40MA
+  -----------------
+  0      CS#
+  1      SDO (MISO)
+  2      RESET#
+  3      WAKE
+  4      INT
+  5      SDI (MOSI)
+  6      SCK
+  7      CONTROL2 (custom debug signal)
+
+
+mrf24j40ma_no_txfails.sr
+------------------------
+
+This is a capture of a device where there aren't many TX fails (but some
+occasional retries).
+
+
+mrf24j40ma_many_txfails.sr
+--------------------------
+
+This is a capture of another device, where there are many TX fails and retries.

diff --git a/spi/mrf24j40/ecg/mrf24j40ma_many_txfails.sr b/spi/mrf24j40/ecg/mrf24j40ma_many_txfails.sr
new file mode 100644 (file)
index 0000000..314a68a
Binary files /dev/null and b/spi/mrf24j40/ecg/mrf24j40ma_many_txfails.sr differ

diff --git a/spi/mrf24j40/ecg/mrf24j40ma_no_txfails.sr b/spi/mrf24j40/ecg/mrf24j40ma_no_txfails.sr
new file mode 100644 (file)
index 0000000..2b7e1c1
Binary files /dev/null and b/spi/mrf24j40/ecg/mrf24j40ma_no_txfails.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/README b/spi/nes_gamepad/nes_gamepad_generated/README
new file mode 100644 (file)
index 0000000..745149a
--- /dev/null
+++ b/spi/nes_gamepad/nes_gamepad_generated/README
@@ -0,0 +1,165 @@
+-------------------------------------------------------------------------------
+NES Gamepad signalling
+-------------------------------------------------------------------------------
+
+Synthetically generated NES gamepad signalling.
+
+SPI settings are always:
+
+Clock polarity = 1
+Clock phase    = 0
+Bit order      = msb-first
+Word size      = 8
+
+Chip-select is not used and must not be assigned to any channel.
+
+        ___
+   GND |o  \
+   CUP |o o| VCC
+ OUT 0 |o o| D3
+    D1 |o o| D4
+       -----
+NES Gamepad Connector
+
+VCC   - Power 5V
+GND   - Ground
+CUP   - Shift register clock (CLK)
+OUT 0 - Shift register latch (optional)
+D1    - Gamepad data (MISO)
+D3    - Data (unused)
+D4    - Data (unused)
+
+Data pins D3 and D4 are not used by the standard game pad but by special
+controllers like the Nintento Zapper light gun.
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a DreamSourceLab DSLogic Plus (at 10 MHz):
+
+  Probe       NES gamepad
+  -----------------------
+  0           OUT 0
+  1           D1
+  2           CUP
+
+
+a.sr
+----
+
+Button press of button 'A'.
+
+MISO bits: 01111111
+MISO data: 7F
+Button States: A
+
+
+b.sr
+----
+
+Button press of button 'B'.
+
+MISO bits: 10111111
+MISO data: BF
+Button States: B
+
+
+select.sr
+---------
+
+Button press of button 'Select'.
+
+MISO bits: 11011111
+MISO data: DF
+Button States: Select
+
+
+start.sr
+--------
+
+Button press of button 'Start'.
+
+MISO bits: 11101111
+MISO data: EF
+Button States: Start
+
+
+north.sr
+--------
+
+Button press of button 'North'.
+
+MISO bits: 11110111
+MISO data: F7
+Button States: North
+
+
+south.sr
+--------
+
+Button press of button 'South'.
+
+MISO bits: 11111011
+MISO data: FB
+Button States: South
+
+
+west.sr
+-------
+
+Button press of button 'West'.
+
+MISO bits: 11111101
+MISO data: FD
+Button States: West
+
+
+east.sr
+-------
+
+Button press of button 'East'.
+
+MISO bits: 11111110
+MISO data: FE
+Button States: East
+
+
+a_b.sr
+------
+
+Button press of button 'A' and 'B'.
+
+MISO bits: 00111111
+MISO data: 3F
+Button States: A + B
+
+
+b_select_west.sr
+----------------
+
+Button press of button 'B' and 'Select' and 'West'.
+
+MISO bits: 10011101
+MISO data: 9D
+Button States: B + Select + West
+
+
+no_button.sr
+------------
+
+Controller connected but no button pressed.
+
+MISO bits: 11111111
+MISO data: FF
+Button States: No button is pressed
+
+
+unconnected.sr
+--------------
+
+Gamepad not connected.
+
+MISO bits: 00000000
+MISO data: 00
+Button States: Gamepad is not connected.

diff --git a/spi/nes_gamepad/nes_gamepad_generated/a.sr b/spi/nes_gamepad/nes_gamepad_generated/a.sr
new file mode 100644 (file)
index 0000000..9d6e964
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/a.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/a_b.sr b/spi/nes_gamepad/nes_gamepad_generated/a_b.sr
new file mode 100644 (file)
index 0000000..825b953
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/a_b.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/b.sr b/spi/nes_gamepad/nes_gamepad_generated/b.sr
new file mode 100644 (file)
index 0000000..db54ba3
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/b.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/b_select_west.sr b/spi/nes_gamepad/nes_gamepad_generated/b_select_west.sr
new file mode 100644 (file)
index 0000000..9dbc313
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/b_select_west.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/east.sr b/spi/nes_gamepad/nes_gamepad_generated/east.sr
new file mode 100644 (file)
index 0000000..a7e3ba6
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/east.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/no_button.sr b/spi/nes_gamepad/nes_gamepad_generated/no_button.sr
new file mode 100644 (file)
index 0000000..438bb4c
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/no_button.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/north.sr b/spi/nes_gamepad/nes_gamepad_generated/north.sr
new file mode 100644 (file)
index 0000000..0a72b9c
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/north.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/select.sr b/spi/nes_gamepad/nes_gamepad_generated/select.sr
new file mode 100644 (file)
index 0000000..2224fd7
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/select.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/south.sr b/spi/nes_gamepad/nes_gamepad_generated/south.sr
new file mode 100644 (file)
index 0000000..76d2c9b
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/south.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/start.sr b/spi/nes_gamepad/nes_gamepad_generated/start.sr
new file mode 100644 (file)
index 0000000..b5e60a7
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/start.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/unconnected.sr b/spi/nes_gamepad/nes_gamepad_generated/unconnected.sr
new file mode 100644 (file)
index 0000000..2364d46
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/unconnected.sr differ

diff --git a/spi/nes_gamepad/nes_gamepad_generated/west.sr b/spi/nes_gamepad/nes_gamepad_generated/west.sr
new file mode 100644 (file)
index 0000000..e03e113
Binary files /dev/null and b/spi/nes_gamepad/nes_gamepad_generated/west.sr differ

diff --git a/spi/nrf905/nrf905operation.sr b/spi/nrf905/nrf905operation.sr
new file mode 100644 (file)
index 0000000..3b5d3ff
Binary files /dev/null and b/spi/nrf905/nrf905operation.sr differ

diff --git a/spi/sqi/README b/spi/sqi/README
new file mode 100644 (file)
index 0000000..89736fc
--- /dev/null
+++ b/spi/sqi/README
@@ -0,0 +1,48 @@
+------------------------------------------------------------------------
+SQI communication (multi-I/O SPI)
+------------------------------------------------------------------------
+
+This capture demonstrates SQI communication, which is a form of SPI data
+exchange where transmitters use multiple I/O data lines in parallel to
+communicate the same amount of data in fewer clock cycles.
+
+In contrast to e.g. QuadSPI flash memory chips which may change the data
+line count or clock scheme several times within a transaction, SQI keeps
+the clock and the number of data lines used by the transmitter consistent
+across the full length of the SPI transaction. Only the direction of data
+lines could change, when e.g. a master first transmits a request which
+the slave then responds to, while both use the same number of data lines.
+Full duplex communication as with the traditional MISO/MOSI scheme is
+not possible with SQI.
+
+
+Logic analyzer setup
+--------------------
+
+The capture was taken at a samplerate of 100MHz.
+
+  Probe       SPI
+  ----------------------------
+  2           SCK (clock)
+  3           CS (select)
+  4           IO0 (data, LSB)
+  5           IO1
+  6           IO2
+  7           IO3 (data, MSB)
+
+
+sqi-four-data-lines-one-transfer.sr
+-----------------------------------
+
+This capture uses four I/O data lines. Data gets sampled at the rising
+clock edge (single data rate). Data is sent in MSB first order. The SPI
+transaction's data byte sequence is:
+
+  80 00 00 10 22 42 4f 4f 54 00 80 00 00 a8 85 77 00 20 4e 00 00
+
+
+sqi-four-data-lines-three-transfers.sr
+--------------------------------------
+
+This capture was constructed from the above single-transfer example
+capture. The SPI transfer is repeated three times.

diff --git a/spi/sqi/sqi-four-data-lines-one-transfer.sr b/spi/sqi/sqi-four-data-lines-one-transfer.sr
new file mode 100644 (file)
index 0000000..be47f9b
Binary files /dev/null and b/spi/sqi/sqi-four-data-lines-one-transfer.sr differ

diff --git a/spi/sqi/sqi-four-data-lines-three-transfers.sr b/spi/sqi/sqi-four-data-lines-three-transfers.sr
new file mode 100644 (file)
index 0000000..d75222a
Binary files /dev/null and b/spi/sqi/sqi-four-data-lines-three-transfers.sr differ

diff --git a/stepper_motor/grbl_cnc/README b/stepper_motor/grbl_cnc/README
new file mode 100644 (file)
index 0000000..ab45f55
--- /dev/null
+++ b/stepper_motor/grbl_cnc/README
@@ -0,0 +1,22 @@
+-------------------------------------------------------------------------------
+Grbl CNC
+-------------------------------------------------------------------------------
+
+This is a set of captures of a CNC running the Arduino-based g-code-parser
+and CNC milling controller "Grbl".
+
+Details:
+https://github.com/gnea/grbl
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was an FX2 based device (at 2MHz):
+
+  Probe       Target
+  ------------------
+  0           EN
+  1           STEP (Y axis)
+  2           TX
+  3           RX

diff --git a/stepper_motor/grbl_cnc/grbl_cnc_1.sr b/stepper_motor/grbl_cnc/grbl_cnc_1.sr
new file mode 100644 (file)
index 0000000..5644422
Binary files /dev/null and b/stepper_motor/grbl_cnc/grbl_cnc_1.sr differ

diff --git a/stepper_motor/grbl_cnc/grbl_cnc_2.sr b/stepper_motor/grbl_cnc/grbl_cnc_2.sr
new file mode 100644 (file)
index 0000000..190f5b9
Binary files /dev/null and b/stepper_motor/grbl_cnc/grbl_cnc_2.sr differ

diff --git a/stepper_motor/grbl_cnc/grbl_cnc_3.sr b/stepper_motor/grbl_cnc/grbl_cnc_3.sr
new file mode 100644 (file)
index 0000000..914c99f
Binary files /dev/null and b/stepper_motor/grbl_cnc/grbl_cnc_3.sr differ

diff --git a/tdm_audio/README b/tdm_audio/README
new file mode 100644 (file)
index 0000000..c49e8ff
--- /dev/null
+++ b/tdm_audio/README
@@ -0,0 +1,35 @@
+-------------------------------------------------------------------------------
+TDM Audio
+-------------------------------------------------------------------------------
+
+This is a set of captures of TDM audio.
+
+Details:
+https://hackaday.io/project/2984-teensy-audio-library/log/57537-tdm-support-for-many-channel-audio-io
+https://www.analog.com/media/en/technical-documentation/technical-articles/MS-2275.pdf
+
+
+Logic analyser setup
+--------------------
+
+The logic analyser used was a Saleae Logic16 (at 50MHz):
+
+  Probe       TDM Audio
+  ---------------------
+  3           Bitclk
+  2           Framesync
+  1           Data
+
+
+tdm-4ch-16bit-cap1.sr
+---------------------
+
+4 channels, 16 bits per sample.
+Data is set of 0x1100 0x3322 0x5544 0x7766 0x9988 0xbbaa 0xddcc 0xffee.
+
+
+tdm-8ch-16bit-cap1.sr
+---------------------
+
+8 channels, 16 bits per sample
+Data is byte 0x12 repeated.

diff --git a/tdm_audio/tdm-4ch-16bit-cap1.sr b/tdm_audio/tdm-4ch-16bit-cap1.sr
new file mode 100644 (file)
index 0000000..87dc181
Binary files /dev/null and b/tdm_audio/tdm-4ch-16bit-cap1.sr differ

diff --git a/tdm_audio/tdm-8ch-16bit-cap1.sr b/tdm_audio/tdm-8ch-16bit-cap1.sr
new file mode 100644 (file)
index 0000000..24089f2
Binary files /dev/null and b/tdm_audio/tdm-8ch-16bit-cap1.sr differ

diff --git a/uart/amulet_lcd/README b/uart/amulet_lcd/README
new file mode 100644 (file)
index 0000000..74101ad
--- /dev/null
+++ b/uart/amulet_lcd/README
@@ -0,0 +1,41 @@
+-------------------------------------------------------------------------------
+Amulet Technologies LCD UART protocol
+-------------------------------------------------------------------------------
+
+This is a dump of Amulet LCD UART protocol for Barco Encore Small Controller
+video mixer controller.
+
+Amulet LCDs have their own processor, flash and RAM. They work by displaying
+pages created with GemStudio and have an "ASCII" protocol for selecting the
+page and updating strings and other variables for widgets.
+
+Details:
+https://www.amulettechnologies.com/index.php/products/display-modules
+https://www.amulettechnologies.com/index.php/support/documentation/send/9-users-guide/34-users-guide
+(protocol definition starts on page 159)
+
+
+Logic analyzer setup
+--------------------
+
+The logic analyzer used was a DreamSourceLabs DSLogic (at 10MHz):
+
+It was connected on the 5V logic level UART line between the Amulet
+display and the main CPU board.
+
+  Probe       UART
+  ----------------
+  0           RX (on the Amulet display)
+  1           TX (on the Amulet display)
+
+
+Data
+----
+
+The communication is UART (115200/8n1).
+
+bootup.sr contains the display initialization at controller bootup, since all
+of the pages are on the display flash no proprietary firmware is present.
+
+menu_changes.sr is a capture of cycling between different menu pages using
+buttons on the controller keyboard.

diff --git a/uart/amulet_lcd/bootup.sr b/uart/amulet_lcd/bootup.sr
new file mode 100644 (file)
index 0000000..842e7dd
Binary files /dev/null and b/uart/amulet_lcd/bootup.sr differ

diff --git a/uart/amulet_lcd/menu_changes.sr b/uart/amulet_lcd/menu_changes.sr
new file mode 100644 (file)
index 0000000..811dd75
Binary files /dev/null and b/uart/amulet_lcd/menu_changes.sr differ

diff --git a/uart/errors/ampel64_4800_8n1_frame_errors.sr b/uart/errors/ampel64_4800_8n1_frame_errors.sr
new file mode 100644 (file)
index 0000000..0cf3914
Binary files /dev/null and b/uart/errors/ampel64_4800_8n1_frame_errors.sr differ

diff --git a/uart/errors/ampel64_4800_8n1_ok.sr b/uart/errors/ampel64_4800_8n1_ok.sr
new file mode 100644 (file)
index 0000000..7195269
Binary files /dev/null and b/uart/errors/ampel64_4800_8n1_ok.sr differ

diff --git a/uart/errors/ampel64_4800_8n2_ok.sr b/uart/errors/ampel64_4800_8n2_ok.sr
new file mode 100644 (file)
index 0000000..0e3217e
Binary files /dev/null and b/uart/errors/ampel64_4800_8n2_ok.sr differ

diff --git a/uart/errors/glitch_0x0a.sr b/uart/errors/glitch_0x0a.sr
new file mode 100644 (file)
index 0000000..3660e95
Binary files /dev/null and b/uart/errors/glitch_0x0a.sr differ

diff --git a/uart/errors/glitch_0x20.sr b/uart/errors/glitch_0x20.sr
new file mode 100644 (file)
index 0000000..59d28bd
Binary files /dev/null and b/uart/errors/glitch_0x20.sr differ

diff --git a/uart/errors/glitch_0x20_2.sr b/uart/errors/glitch_0x20_2.sr
new file mode 100644 (file)
index 0000000..c2b2898
Binary files /dev/null and b/uart/errors/glitch_0x20_2.sr differ

diff --git a/uart/errors/glitch_0x30.sr b/uart/errors/glitch_0x30.sr
new file mode 100644 (file)
index 0000000..50851a9
Binary files /dev/null and b/uart/errors/glitch_0x30.sr differ

diff --git a/uart/errors/glitch_0x43.sr b/uart/errors/glitch_0x43.sr
new file mode 100644 (file)
index 0000000..d3516ad
Binary files /dev/null and b/uart/errors/glitch_0x43.sr differ

diff --git a/uart/errors/glitch_0x43_2.sr b/uart/errors/glitch_0x43_2.sr
new file mode 100644 (file)
index 0000000..de0c171
Binary files /dev/null and b/uart/errors/glitch_0x43_2.sr differ

diff --git a/uart/errors/glitch_0x45.sr b/uart/errors/glitch_0x45.sr
new file mode 100644 (file)
index 0000000..5b6d794
Binary files /dev/null and b/uart/errors/glitch_0x45.sr differ

diff --git a/uart/errors/glitch_0x45_2.sr b/uart/errors/glitch_0x45_2.sr
new file mode 100644 (file)
index 0000000..814affe
Binary files /dev/null and b/uart/errors/glitch_0x45_2.sr differ

diff --git a/uart/errors/glitch_0x45_3.sr b/uart/errors/glitch_0x45_3.sr
new file mode 100644 (file)
index 0000000..fae99a4
Binary files /dev/null and b/uart/errors/glitch_0x45_3.sr differ

diff --git a/uart/errors/glitch_0x48.sr b/uart/errors/glitch_0x48.sr
new file mode 100644 (file)
index 0000000..fa4bb74
Binary files /dev/null and b/uart/errors/glitch_0x48.sr differ

diff --git a/uart/errors/glitch_0x49.sr b/uart/errors/glitch_0x49.sr
new file mode 100644 (file)
index 0000000..0ff79e9
Binary files /dev/null and b/uart/errors/glitch_0x49.sr differ

diff --git a/uart/errors/glitch_0x4c.sr b/uart/errors/glitch_0x4c.sr
new file mode 100644 (file)
index 0000000..2e0e361
Binary files /dev/null and b/uart/errors/glitch_0x4c.sr differ

diff --git a/uart/errors/glitch_0x4f.sr b/uart/errors/glitch_0x4f.sr
new file mode 100644 (file)
index 0000000..ee9c8ca
Binary files /dev/null and b/uart/errors/glitch_0x4f.sr differ

diff --git a/uart/errors/glitch_0x4f_0x4b_0x0a.sr b/uart/errors/glitch_0x4f_0x4b_0x0a.sr
new file mode 100644 (file)
index 0000000..9a65421
Binary files /dev/null and b/uart/errors/glitch_0x4f_0x4b_0x0a.sr differ

diff --git a/uart/errors/glitch_0x4f_2.sr b/uart/errors/glitch_0x4f_2.sr
new file mode 100644 (file)
index 0000000..789a7c0
Binary files /dev/null and b/uart/errors/glitch_0x4f_2.sr differ

diff --git a/uart/errors/glitch_0x53.sr b/uart/errors/glitch_0x53.sr
new file mode 100644 (file)
index 0000000..0b1912c
Binary files /dev/null and b/uart/errors/glitch_0x53.sr differ

diff --git a/uart/trekstor_ebr30_a/trekstor_ebr30_a_uart.sr b/uart/trekstor_ebr30_a/trekstor_ebr30_a_uart.sr
index d9d87e6e72770fe8c1596b3fcb392d35b09bd7cb..cc07b18cf99c0b8a66b8b5ad26d711130fb3119f 100644 (file)
Binary files a/uart/trekstor_ebr30_a/trekstor_ebr30_a_uart.sr and b/uart/trekstor_ebr30_a/trekstor_ebr30_a_uart.sr differ

diff --git a/xy2-100/xy2-100_16Mhz_Testfile.sr b/xy2-100/xy2-100_16Mhz_Testfile.sr
new file mode 100644 (file)
index 0000000..8702f3e
Binary files /dev/null and b/xy2-100/xy2-100_16Mhz_Testfile.sr differ

diff --git a/xy2-100/xy2-100_4MHz_Testfile.sr b/xy2-100/xy2-100_4MHz_Testfile.sr
new file mode 100644 (file)
index 0000000..c679991
Binary files /dev/null and b/xy2-100/xy2-100_4MHz_Testfile.sr differ