X-Git-Url: https://sigrok.org/gitweb/?p=sigrok-dumps.git;a=blobdiff_plain;f=i2s%2F2ch-16bit-16khz%2FREADME;h=7cf3a8ced78e7e1c531b4680ce60275469fcae18;hp=2c24397ce912c1ff24c9c8701c71d587fa1b7b4b;hb=d8a0e7a8001659ad69f9b556e97563560738c967;hpb=fb21eed8341bf0c1063d3dce03d1da980e555bbe

diff --git a/i2s/2ch-16bit-16khz/README b/i2s/2ch-16bit-16khz/README
index 2c24397..7cf3a8c 100644
--- a/i2s/2ch-16bit-16khz/README
+++ b/i2s/2ch-16bit-16khz/README
@@ -2,18 +2,17 @@
 I2S Master 2-channel 16-bit 16-kHz
 -------------------------------------------------------------------------------
 
-This is an example of an I2S master with a playing a recording of the BBC
+This is an example of an I2S master playing a recording of the BBC
 shipping forecast through one channel, and the other channel disconnected.
 
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a EE Electronics ESLA201A at a 
-sample rate of 16MHz. The logic analyzer probes were connected to the I2S
-pins like this:
+The logic analyzer used was an EE Electronics ESLA201A (at 12MHz):
 
-  Probe       Signal
-  ------------------------
+  Probe       I2S pin
+  -------------------
   0           Clock
   1           Frame Select
   2           Data
+