X-Git-Url: https://sigrok.org/gitweb/?p=sigrok-dumps.git;a=blobdiff_plain;f=dcc%2Feasycontrol%2FREADME;fp=dcc%2Feasycontrol%2FREADME;h=72699c3d68bd59a0090292d647551c98a8c5bde3;hp=0000000000000000000000000000000000000000;hb=455bdc6edec647ef3147eec4291ecf6a0fba74e4;hpb=91e85d43a637083c9d9839d0566a2698a2100d44 diff --git a/dcc/easycontrol/README b/dcc/easycontrol/README new file mode 100644 index 0000000..72699c3 --- /dev/null +++ b/dcc/easycontrol/README @@ -0,0 +1,34 @@ +------------------------------------------------------------------------------- +DCC model train captures +------------------------------------------------------------------------------- + +These captures contain data that was recorded on a model railway setup that +is based on the tams elektronik EasyControl controller. The booster used was +a self-built tams elektronik B-2 booster. + + +Logic analyzer setup +-------------------- + +The logic analyzer used was a Saleae Logic clone (samplerate 1MHz). The +signal was captured via a simple voltage clamping circuit. + + Probe DCC + ------------------- + 1 Data + + +Captures +-------- + +Since the controller continuously resends the data, the captures do +contain more than what is stated here. + + Capture Action + ---------------------------------------------------------------------- + decoder_2_light.sr switch light on train with address 2 + decoder_45_light.sr switch light on train with address 45 + decoder_120_121.sr switch state of decoder 120, 121 + decoder_133.sr switch state of decoder 133 + decoder_140.sr switch state of decoder 140 + decoder_310.sr switch state of decoder 310