X-Git-Url: https://sigrok.org/gitweb/?p=pulseview.git;a=blobdiff_plain;f=test%2Flogicdatasnapshot.cpp;h=4e31bfae8f0a1d21fb10e324043f6f17fb9307b3;hp=9d647e6cbb3e0510c45f3844ed2aa91f57e67d53;hb=b3f22de060b73f15ad3eb2dabee04a0b4f5d947e;hpb=910b16ec9fb9bce36311620164eb08218fda29b1 diff --git a/test/logicdatasnapshot.cpp b/test/logicdatasnapshot.cpp index 9d647e6c..4e31bfae 100644 --- a/test/logicdatasnapshot.cpp +++ b/test/logicdatasnapshot.cpp @@ -1,5 +1,5 @@ /* - * This file is part of the sigrok project. + * This file is part of the PulseView project. * * Copyright (C) 2012 Joel Holdsworth * @@ -23,6 +23,7 @@ #include +#include "../extdef.h" #include "../logicdatasnapshot.h" using namespace std; @@ -254,8 +255,8 @@ BOOST_AUTO_TEST_CASE(LargeData) } //----- Test LogicDataSnapshot::get_subsampled_edges -----// + // Check in normal case vector edges; - s.get_subsampled_edges(edges, 0, Length-1, 1, 7); BOOST_CHECK_EQUAL(edges.size(), 32); @@ -267,6 +268,12 @@ BOOST_AUTO_TEST_CASE(LargeData) } BOOST_CHECK_EQUAL(edges[31].first, 999999); + + // Check in very low zoom case + edges.clear(); + s.get_subsampled_edges(edges, 0, Length-1, 50e6f, 7); + + BOOST_CHECK_EQUAL(edges.size(), 2); } BOOST_AUTO_TEST_CASE(Pulses) @@ -291,6 +298,7 @@ BOOST_AUTO_TEST_CASE(Pulses) } LogicDataSnapshot s(logic); + delete[] (uint8_t*)logic.data; //----- Check the mip-map -----// // Check mip map level 0 @@ -322,9 +330,10 @@ BOOST_AUTO_TEST_CASE(Pulses) //----- Test get_subsampled_edges at reduced scale -----// s.get_subsampled_edges(edges, 0, Length-1, 16.0f, 2); - BOOST_REQUIRE_EQUAL(edges.size(), Cycles + 1); + BOOST_REQUIRE_EQUAL(edges.size(), Cycles + 2); - for(int i = 0; i < edges.size(); i++) + BOOST_CHECK_EQUAL(0, false); + for(int i = 1; i < edges.size(); i++) BOOST_CHECK_EQUAL(edges[i].second, false); } @@ -340,19 +349,20 @@ BOOST_AUTO_TEST_CASE(LongPulses) //----- Create a LogicDataSnapshot -----// sr_datafeed_logic logic; - logic.unitsize = 1; + logic.unitsize = 8; logic.length = Length; - logic.data = (uint64_t*)new uint8_t[Length]; - uint8_t *p = (uint8_t*)logic.data; + logic.data = (uint64_t*)new uint64_t[Length]; + uint64_t *p = (uint64_t*)logic.data; for(int i = 0; i < Cycles; i++) { for(j = 0; j < PulseWidth; j++) - *p++ = 0xFF; + *p++ = ~0; for(j; j < Period; j++) - *p++ = 0x00; + *p++ = 0; } LogicDataSnapshot s(logic); + delete[] (uint64_t*)logic.data; //----- Check the mip-map -----// // Check mip map level 0 @@ -365,14 +375,14 @@ BOOST_AUTO_TEST_CASE(LongPulses) for(j = 0; i < s._mip_map[0].length && j < 2; j++) { BOOST_TEST_MESSAGE( "Testing mip_map[0].data[" << i << "]"); - BOOST_CHECK_EQUAL(s.get_subsample(0, i++) & 0xFF, 0xFF); + BOOST_CHECK_EQUAL(s.get_subsample(0, i++), ~0); } for(j; i < s._mip_map[0].length && j < Period/LogicDataSnapshot::MipMapScaleFactor; j++) { BOOST_TEST_MESSAGE( "Testing mip_map[0].data[" << i << "]"); - BOOST_CHECK_EQUAL(s.get_subsample(0, i++) & 0xFF, 0x00); + BOOST_CHECK_EQUAL(s.get_subsample(0, i++), 0); } } @@ -402,13 +412,66 @@ BOOST_AUTO_TEST_CASE(LongPulses) edges.clear(); s.get_subsampled_edges(edges, 0, Length-1, 17.0f, 2); - for(int i = 0; i < Cycles; i++) { - BOOST_CHECK_EQUAL(edges[i].first, i * Period); - BOOST_CHECK_EQUAL(edges[i].second, false); + BOOST_CHECK_EQUAL(edges[0].first, 0); + BOOST_CHECK_EQUAL(edges[0].second, true); + BOOST_CHECK_EQUAL(edges[1].first, 16); + BOOST_CHECK_EQUAL(edges[1].second, false); + + for(int i = 1; i < Cycles; i++) { + BOOST_CHECK_EQUAL(edges[i+1].first, i * Period); + BOOST_CHECK_EQUAL(edges[i+1].second, false); } BOOST_CHECK_EQUAL(edges.back().first, Length-1); BOOST_CHECK_EQUAL(edges.back().second, false); } +BOOST_AUTO_TEST_CASE(LisaMUsbHid) +{ + /* This test was created from the beginning of the USB_DM signal in + * sigrok-dumps-usb/lisa_m_usbhid/lisa_m_usbhid.sr + */ + + const int Edges[] = { + 7028, 7033, 7036, 7041, 7044, 7049, 7053, 7066, 7073, 7079, + 7086, 7095, 7103, 7108, 7111, 7116, 7119, 7124, 7136, 7141, + 7148, 7162, 7500 + }; + const int Length = Edges[countof(Edges) - 1]; + + bool state = false; + int lastEdgePos = 0; + + //----- Create a LogicDataSnapshot -----// + sr_datafeed_logic logic; + logic.unitsize = 1; + logic.length = Length; + logic.data = new uint8_t[Length]; + uint8_t *data = (uint8_t*)logic.data; + + for(int i = 0; i < countof(Edges); i++) { + const int edgePos = Edges[i]; + memset(&data[lastEdgePos], state ? 0x02 : 0, + edgePos - lastEdgePos - 1); + + lastEdgePos = edgePos; + state = !state; + } + + LogicDataSnapshot s(logic); + delete[] (uint64_t*)logic.data; + + vector edges; + + + /* The trailing edge of the pulse train is falling in the source data. + * Check this is always true at different scales + */ + + edges.clear(); + s.get_subsampled_edges(edges, 0, Length-1, 33.333332f, 1); + BOOST_CHECK_EQUAL(edges[edges.size() - 2].second, false); +} + + BOOST_AUTO_TEST_SUITE_END()