X-Git-Url: https://sigrok.org/gitweb/?p=pulseview.git;a=blobdiff_plain;f=test%2FCMakeLists.txt;h=aefe1432b14307a97a307ceb8b1975f1e7b16bc2;hp=5ab5afa4a22c1ff839796d83064036462038f763;hb=4640a84e926ac4b82e2a1b6ef9fc80ef44c2bd3c;hpb=f54e68b03d5d24c7787962fcc701d8d52b0ec8ab diff --git a/test/CMakeLists.txt b/test/CMakeLists.txt index 5ab5afa4..aefe1432 100644 --- a/test/CMakeLists.txt +++ b/test/CMakeLists.txt @@ -24,6 +24,7 @@ set(pulseview_TEST_SOURCES ${PROJECT_SOURCE_DIR}/pv/globalsettings.cpp ${PROJECT_SOURCE_DIR}/pv/logging.cpp ${PROJECT_SOURCE_DIR}/pv/mainwindow.cpp + ${PROJECT_SOURCE_DIR}/pv/metadata_obj.cpp ${PROJECT_SOURCE_DIR}/pv/session.cpp ${PROJECT_SOURCE_DIR}/pv/storesession.cpp ${PROJECT_SOURCE_DIR}/pv/util.cpp @@ -34,6 +35,7 @@ set(pulseview_TEST_SOURCES ${PROJECT_SOURCE_DIR}/pv/data/analogsegment.cpp ${PROJECT_SOURCE_DIR}/pv/data/logic.cpp ${PROJECT_SOURCE_DIR}/pv/data/logicsegment.cpp + ${PROJECT_SOURCE_DIR}/pv/data/mathsignal.cpp ${PROJECT_SOURCE_DIR}/pv/data/segment.cpp ${PROJECT_SOURCE_DIR}/pv/data/signalbase.cpp ${PROJECT_SOURCE_DIR}/pv/data/signaldata.cpp @@ -61,6 +63,7 @@ set(pulseview_TEST_SOURCES ${PROJECT_SOURCE_DIR}/pv/views/trace/cursorpair.cpp ${PROJECT_SOURCE_DIR}/pv/views/trace/flag.cpp ${PROJECT_SOURCE_DIR}/pv/views/trace/header.cpp + ${PROJECT_SOURCE_DIR}/pv/views/trace/mathsignal.cpp ${PROJECT_SOURCE_DIR}/pv/views/trace/marginwidget.cpp ${PROJECT_SOURCE_DIR}/pv/views/trace/logicsignal.cpp ${PROJECT_SOURCE_DIR}/pv/views/trace/ruler.cpp @@ -104,9 +107,11 @@ set(pulseview_TEST_SOURCES set(pulseview_TEST_HEADERS ${PROJECT_SOURCE_DIR}/pv/application.hpp ${PROJECT_SOURCE_DIR}/pv/devicemanager.hpp + ${PROJECT_SOURCE_DIR}/pv/exprtk.hpp ${PROJECT_SOURCE_DIR}/pv/globalsettings.hpp ${PROJECT_SOURCE_DIR}/pv/logging.hpp ${PROJECT_SOURCE_DIR}/pv/mainwindow.hpp + ${PROJECT_SOURCE_DIR}/pv/metadata_obj.hpp ${PROJECT_SOURCE_DIR}/pv/session.hpp ${PROJECT_SOURCE_DIR}/pv/storesession.hpp ${PROJECT_SOURCE_DIR}/pv/binding/device.hpp @@ -114,6 +119,7 @@ set(pulseview_TEST_HEADERS ${PROJECT_SOURCE_DIR}/pv/data/analogsegment.hpp ${PROJECT_SOURCE_DIR}/pv/data/logic.hpp ${PROJECT_SOURCE_DIR}/pv/data/logicsegment.hpp + ${PROJECT_SOURCE_DIR}/pv/data/mathsignal.hpp ${PROJECT_SOURCE_DIR}/pv/data/signalbase.hpp ${PROJECT_SOURCE_DIR}/pv/devices/device.hpp ${PROJECT_SOURCE_DIR}/pv/dialogs/connect.hpp @@ -135,6 +141,7 @@ set(pulseview_TEST_HEADERS ${PROJECT_SOURCE_DIR}/pv/views/trace/flag.hpp ${PROJECT_SOURCE_DIR}/pv/views/trace/header.hpp ${PROJECT_SOURCE_DIR}/pv/views/trace/logicsignal.hpp + ${PROJECT_SOURCE_DIR}/pv/views/trace/mathsignal.hpp ${PROJECT_SOURCE_DIR}/pv/views/trace/marginwidget.hpp ${PROJECT_SOURCE_DIR}/pv/views/trace/ruler.hpp ${PROJECT_SOURCE_DIR}/pv/views/trace/signal.hpp