X-Git-Url: https://sigrok.org/gitweb/?p=pulseview.git;a=blobdiff_plain;f=pv%2Fdata%2Flogicsegment.hpp;h=c450f0a905d9a96391e5ca759a65f06279acc225;hp=43fd41126617bd0b9d76dbc0f8bbf7875c5569bd;hb=c70e34649be658e7a443d5e68abe16dd55d53bf2;hpb=26a883ede0bcf68d087eda5dd2082890d36c7aef

diff --git a/pv/data/logicsegment.hpp b/pv/data/logicsegment.hpp
index 43fd4112..c450f0a9 100644
--- a/pv/data/logicsegment.hpp
+++ b/pv/data/logicsegment.hpp
@@ -25,6 +25,8 @@
 #include <utility>
 #include <vector>
 
+#include <QObject>
+
 namespace sigrok {
 	class Logic;
 }
@@ -40,14 +42,18 @@ struct LongPulses;
 namespace pv {
 namespace data {
 
+class Logic;
+
 typedef struct {
 	uint64_t sample_index, chunk_num, chunk_offs;
 	uint8_t* chunk;
 	uint8_t* value;
 } SegmentLogicDataIterator;
 
-class LogicSegment : public Segment
+class LogicSegment : public QObject, public Segment
 {
+	Q_OBJECT
+
 private:
 	struct MipMapLevel
 	{
@@ -67,7 +73,7 @@ public:
 	typedef std::pair<int64_t, bool> EdgePair;
 
 public:
-	LogicSegment(std::shared_ptr<sigrok::Logic> logic, uint64_t samplerate);
+	LogicSegment(pv::data::Logic& owner, std::shared_ptr<sigrok::Logic> data, uint64_t samplerate);
 
 	virtual ~LogicSegment();
 
@@ -75,9 +81,9 @@ public:
 
 	const uint8_t* get_samples(int64_t start_sample, int64_t end_sample) const;
 
-	SegmentLogicDataIterator* begin_sample_iteration(uint64_t start) const;
-	void continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase) const;
-	void end_sample_iteration(SegmentLogicDataIterator* it) const;
+	SegmentLogicDataIterator* begin_sample_iteration(uint64_t start);
+	void continue_sample_iteration(SegmentLogicDataIterator* it, uint64_t increase);
+	void end_sample_iteration(SegmentLogicDataIterator* it);
 
 private:
 	uint64_t unpack_sample(const uint8_t *ptr) const;
@@ -110,6 +116,8 @@ private:
 	static uint64_t pow2_ceil(uint64_t x, unsigned int power);
 
 private:
+	Logic& owner_;
+
 	struct MipMapLevel mip_map_[ScaleStepCount];
 	uint64_t last_append_sample_;